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Author SHA1 Message Date
Sascha Hauer cad14480bf ARM: create a second level page table entry for the exception vectors
Often enough the exception vectors are not on TEXT_BASE (for example
on i.MX SoCs in internal boot mode), so the board specific code did
not map the exception vectors to 0x0 but whatever happens to be on
TEXT_BASE. Also, the current section-only mapping requires the
exception vectors to be on a 1MB boundary.
Instead, create the possibility to create second level tables and
use this to map a copy of the exception vectors in a board
independent way.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-03-10 14:49:47 +01:00
Sascha Hauer 9a139cd653 ARM mx51 babbage: Use device functions
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-11-02 18:11:08 +01:00
Sascha Hauer f550cfe4e1 ARM i.MX51: Add babbage board support
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-11 13:22:14 +02:00