This is the first part of the start-up code. The source code origin is
U-boot and is slightly modified to have e500v2 CPU support in 32-bit
mode only.
It includes the power-up entry point, CPU initialization code and
exports definition for D-cache flush and I-cache invalidate.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch/ppc/Kconfig is reworked to make the configuration environment
architecture neutral. All MPC5200 configuration is moved to the
MPC5200 architecture specific configuration file. These modifications
are reflected in the PCM030 board support.
arch/ppc/Makefile compilation directives are updated in preparation
for the introduction of future cpus/machines.
lib/time.c is moved to the architecture specific directory and the
building instructions updated in the Make files. The file is
cleaned up of unused code.
The definition of L1_CACHE_... is updated and CACHELINE_SIZE is
defined in ppc/include/asm/cache.h for future use by the mpc85xx.
The file mach-mpc5xxx/pci_mpc5200.c and mach-mpc5xxx/start.S are
updated accordingly.
The declaration of search_exception_table is moved in
include/asm/common.h because it is used across architectures.
mach-mpc5xxx/traps.c is also updated to reflect this change.
The definition of exception in asm/ppc_asm.tmpl is updated for future
use by the mpc85xx. The file starts.S in mach-mpc5xxx is updated
accordingly.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move platform independent header files to arch/ppc/include/asm, leaving
those in asm/arch*.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Renaud Barbier
Jean-Christophe PLAGNIOL-VILLARD