According to commit f6b6f3c7b2bb7d6277801882afdced6f2b10fc17 from
git://git.freescale.com/imx/uboot-imx.git:
Also set Prefetch offset to 15, since it improves
memcpy performance by 35%. Don't enable Incr double
Linefill enable since it adversely affects memcpy
performance by about 32MB/s and reads by 90MB/s. Tested
with 4K to 16MB sized src and dst aligned buffer.
This commit ports those chagnes from U-Boot.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
I.MX6Q Plus parts have r3p2 revision of PL310 so double linefill
errata no longer applies for all of the i.MX6Q SoCs. Change the code to
use PL310's revision inforation to determine if workaround needs to be
applied.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use constants instead of magic numbers for PL301 registers bits in
imx6_mmu_init()
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Call clk_enable on mmdc_ch0_axi_podf in order to properly increase
reference counters for all of the nodes in this particular clock
path. Otherwise it becomes possible for peripherals, located on other
branches stemming from "periph", to shut down the whole clock tree (up
to "pll2_bus") when they try to manage their own local clocks.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make sure that Barebox specific .dtsi files are included after .dtsi
files imported from Linux kernel. This way those local .dtsi files can
reference phandles defined in Linux kernel files.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We already have MIPS_CONF_M macro in <asm/mipsregs.h> so
we have no need in homebrew CONFIG_M macro.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The power button is not part of the CPU module and can be triggered
wrongly on other baseboards. Disable it since we do not need it
currently.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The TX6 boards come with 3 different PMIC variants from which we
currently only support the ltc3673. Detect the other two by i2c
address and set them up correctly. The code is based on the karo
U-Boot port.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a re-application of fix 17644b55.
arm_cpu_lowlevel_init() will set the processor mode to 0x13 (supervisor).
When this function is entered via a different processor mode, register
banking will happen to lr (r14), resulting in an invalid return address.
This fix will preserve the return address manually.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The device tree for the 801x variant only contains displays. The
displays are not part of the SoM, but instead of the baseboard,
so they should be described in a baseboard dts. With this patch
we rather include the common tx6x dtsi file and drop 801x from
the barebox device tree names.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX6q variant is basically the same as the i.MX6dl variant, just
with another SoC and the usual i.MX6q/i.MX6dl adjustments.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The TX6 board come with either NAND flash or eMMC as primary
storage medium. This adds support for the eMMC variants.
We can detect if we have NAND or eMMC by looking at the
bootsource which will be configured accordingly. This
way we can modify the device tree during runtime and do
not have to create a new image.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The stuff we currently have in the i.MX6q dts file can be reused for
the i.MX6dl variants, so factor out a common dtsi file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Remove the fixed malloc area size from the defconfig and allow
barebox to calculate the size dynamically.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Upstream has dropped those from the base dtsi, as long as we can't
fully switch to the upstream board DT add the correct alias to the
barebox copy.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
v7: eof whitespace fixes
A Patch for supporting the Terasic DE0 NANO-SoC with barebox.
The pretty similar Socrates Board was taken as a starting point with pulling
in the memory timings/pinmux from
http://rocketboards.org/foswiki/view/Documentation/AtlasSoCCompileHardwareDesign
Signed-off-by: Tim Sander <tim@krieglstein.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since 253fb33 (input: gpio-keys: convert to input framework) the
gpio-buttons are registered with the input framework which has the
side effect that they are activated during boot and no longer have
to be activated manually by activating the input device console.
This reveals that the gpio-button polarities are wrong: The autoboot
is no longer running through since a gpio button press is wrongly
detected.
Fix the polarities in the barebox dts for now to get back a working
board. A proper fix has been sent upstream to the kernel. Once this
has landed and propagated back to barebox this patch can be reverted.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When the kernel load address is chosen by the user/image we need
to check if the kernel needs to relocate itself before decompression.
If that's the case the spacing behind the kernel must allow for this
relocation without overwriting anything placed behind the kernel.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of having the same logic for uImage and zImage types duplicated
in the code, split it out into a separate function. This does not change
the behavior of the calculation.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
