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9 Commits

Author SHA1 Message Date
Wolfgang Denk cf48eb9abd Some code cleanup 2006-04-16 10:51:58 +02:00
Stefan Roese 62534beb2f Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)
405 SDRAM: - The SDRAM parameters can now be defined in the board
             config file and the 405 SDRAM controller values will
             be calculated upon bootup (see PPChameleonEVB).
             When those settings are not defined in the board
             config file, the register setup will be as it is now,
             so this implementation should not break any current
             design using this code.

             Thanks to Andrea Marson from DAVE for this patch.

440 DDR:   - Added function sdram_tr1_set to auto calculate the
             TR1 value for the DDR.
           - Added ECC support (see p3p440).

Patch by Stefan Roese, 17 Mar 2006
2006-03-31 14:32:07 +02:00
Stefan Roese 5568e613ee Add support for Prodrive P3P440 board:
- Added onboard PPC440 DDR autodetection in cpu/ppc/sdram.c
- CFG_FLASH_QUIET_TEST added to use the common CFI driver
  for bank autodetection
Patch by Stefan Roese, 22 Nov 2005
2005-11-22 13:20:42 +01:00
stroese de8d5a3600 cpu/ppc4xx/sdram.c rewritten now using get_ram_size() 2004-07-15 14:41:13 +00:00
stroese 342f551bc9 Disable memory controller before setting first values. 2003-09-12 08:49:58 +00:00
wdenk 8bde7f776c * Code cleanup:
- remove trailing white space, trailing empty lines, C++ comments, etc.
  - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)

* Patches by Kenneth Johansson, 25 Jun 2003:
  - major rework of command structure
    (work done mostly by Michal Cendrowski and Joakim Kristiansen)
2003-06-27 21:31:46 +00:00
wdenk e5ad56b13b Cleanup: remove trailing white space 2003-02-11 01:49:43 +00:00
stroese 6177445dab Added 4MByte and 128MByte onboard SDRAM 2003-02-10 16:26:37 +00:00
wdenk c609719b8d Initial revision 2002-11-03 00:24:07 +00:00