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Author SHA1 Message Date
Lucas Stach e231d265ea tegra: add -fno-jump-tables to lowlevel code
Lowlevel code runs when not relocated yet, so we have to make extra sure
not to emit jump-tables with absolute adresses when evaluating switch
statements.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-02-19 11:03:48 +01:00
Lucas Stach c05a80c825 tegra: fix PBL build
Drop useless BUG(), we are too early for them to be of any use.
Make sure we build the AVP code as ARMv4 even in PBL case.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-10-02 10:24:04 +02:00
Lucas Stach c16730e3c6 tegra: add new clock framework driver
This removes the existing Tegra CAR driver and replaces it with code
ported from the Linux clock framework.

In the current state only the relevant PLLs are supported, but this is
no functional regression from the existing code.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-07-02 08:36:09 +02:00
Lucas Stach 55d9b65d48 tegra: add generic debug UART support
ODMdata tells us which UART to use for debugging purposes. This is
agreed upon in both the upstream Linux kernel and U-Boot, so do it the
same way in barebox.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Tested-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-04-14 10:45:29 +02:00
Lucas Stach 789c55b8bd tegra: add common lowlevel startup
All Tegra20 boards have a common startup sequence. Also there is an
agreement on how to find out about the installed amount of RAM and other
information needed by early startup. So as there is really no need to do
any lowlevel stuff per board, we can just do it at the ARCH level.

This also enables the first stage loading of barebox by detecting the
currently running CPU and booting the main CPU cluster if neccesary.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Tested-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-04-14 10:45:24 +02:00
Lucas Stach e368a84a86 tegra: add T20 power management controller driver
Currently only implements system wide reset functionality.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Tested-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-04-14 10:45:19 +02:00
Lucas Stach 6be47ca3bd tegra: add T20 timer driver
Replace the ad-hoc clocksource implementation with a proper driver for
the Tegra 20 timer. This driver is able to do the required hardware
initialisation itself.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Tested-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-04-14 10:45:13 +02:00
Lucas Stach b8e1313f0d tegra: add driver for the clock and reset module
Only a basic set of clocks is supported. This is a temporary solution
and will go away as soon as the port of the Tegra common clock code from
the Linux kernel is ready to go.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Tested-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-04-14 10:45:07 +02:00
Antony Pavlov cdf00414e5 ARM: initial Tegra support
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-29 10:39:17 +02:00