48b5b23286
TLB support for the 85xx CPUs has been upgraded to support the MMUv2 page size definitions. This has been imported from U-Boot version git-9407c3fc. This allows for future CPUs to make use of the new MMU support. Also the definition of MAX_MEM_MAPPED has been changed to avoid type casting with "min" macro. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
41 lines
1.1 KiB
C
41 lines
1.1 KiB
C
/*
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* Copyright 2012 GE Intelligent Platforms, Inc.
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* Copyright 2009-2011 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef _ASM_CONFIG_H_
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#define _ASM_CONFIG_H_
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#ifdef CONFIG_MPC85xx
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#include <mach/config_mpc85xx.h>
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#endif
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#ifndef MAX_MEM_MAPPED
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#if defined(CONFIG_E500)
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#define MAX_MEM_MAPPED (2ULL << 30)
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#endif
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#endif
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/*
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* Provide a default boot page translation virtual address that lines up with
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* Freescale's default e500 reset page.
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*/
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#if (defined(CONFIG_E500) && defined(CONFIG_MP))
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#ifndef BPTR_VIRT_ADDR
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#define BPTR_VIRT_ADDR 0xfffff000
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#endif
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#endif
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#endif /* _ASM_CONFIG_H_ */
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