It is required for Rockchip SoCs where clock settings registers have write-enable mask in high word. Signed-off-by: Andrey Panov <rockford@yandex.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
104 lines
2.4 KiB
C
104 lines
2.4 KiB
C
/*
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* clk-mux.c - generic barebox clock support. Based on Linux clk support
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*
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* Copyright (c) 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <io.h>
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#include <malloc.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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struct clk_mux {
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struct clk clk;
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void __iomem *reg;
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int shift;
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int width;
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};
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#define to_clk_mux(_clk) container_of(_clk, struct clk_mux, clk)
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static int clk_mux_get_parent(struct clk *clk)
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{
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struct clk_mux *m = container_of(clk, struct clk_mux, clk);
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int idx = readl(m->reg) >> m->shift & ((1 << m->width) - 1);
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return idx;
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}
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static int clk_mux_set_parent(struct clk *clk, u8 idx)
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{
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struct clk_mux *m = container_of(clk, struct clk_mux, clk);
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u32 val;
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val = readl(m->reg);
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val &= ~(((1 << m->width) - 1) << m->shift);
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val |= idx << m->shift;
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if (clk->flags & CLK_MUX_HIWORD_MASK)
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val |= ((1 << m->width) - 1) << (m->shift + 16);
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writel(val, m->reg);
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return 0;
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}
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static struct clk_ops clk_mux_ops = {
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.set_rate = clk_parent_set_rate,
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.round_rate = clk_parent_round_rate,
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.get_parent = clk_mux_get_parent,
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.set_parent = clk_mux_set_parent,
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};
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struct clk *clk_mux_alloc(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char **parents, u8 num_parents,
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unsigned flags)
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{
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struct clk_mux *m = xzalloc(sizeof(*m));
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m->reg = reg;
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m->shift = shift;
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m->width = width;
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m->clk.ops = &clk_mux_ops;
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m->clk.name = name;
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m->clk.flags = flags;
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m->clk.parent_names = parents;
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m->clk.num_parents = num_parents;
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return &m->clk;
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}
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void clk_mux_free(struct clk *clk_mux)
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{
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struct clk_mux *m = to_clk_mux(clk_mux);
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free(m);
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}
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struct clk *clk_mux(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char **parents, u8 num_parents, unsigned flags)
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{
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struct clk *m;
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int ret;
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m = clk_mux_alloc(name, reg, shift, width, parents, num_parents, flags);
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ret = clk_register(m);
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if (ret) {
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free(to_clk_mux(m));
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return ERR_PTR(ret);
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}
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return m;
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}
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