Based on the same commit in the Kernel: | commit 828b1716459d00b3d57d4309d25a8d1ea241116a | Author: Shawn Guo <shawn.guo@linaro.org> | Date: Thu Jul 11 13:58:36 2013 +0800 | | ARM: dts: imx: share pad macro names between imx6q and imx6dl | | The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board | design can work with either chip plugged into the socket, e.g. sabresd | and sabreauto boards. | | We currently define pin groups in imx6q.dtsi and imx6dl.dtsi | respectively because the pad macro names are different between two | chips. This brings a maintenance burden on having the same label point | to the same pin group defined in two places. | | The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs | pad macro names. Then the pin groups becomes completely common between | imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the | long term maintenance of imx6q/dt pin settings becomes easier. | | Unfortunately, the change brings some dramatic diff stat, but it's all | about DTS file, and the ultimate net diff stat is good. | | Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
386 lines
7.4 KiB
Text
386 lines
7.4 KiB
Text
/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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#include "imx6q.dtsi"
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/ {
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model = "Data Modul RealQ7 Board";
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compatible = "dmo,imx6q-realq7", "fsl,imx6q";
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chosen {
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linux,stdout-path = "/soc/aips-bus@02100000/serial@021e8000";
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environment-emmc {
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compatible = "barebox,environment";
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device-path = &usdhc4, "partname:barebox-environment";
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status = "disabled";
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};
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environment-spi {
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compatible = "barebox,environment";
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device-path = &flash, "partname:barebox-environment";
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status = "disabled";
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};
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};
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aliases {
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stmpe0 = &stmpe_1;
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stmpe1 = &stmpe_2;
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gpio7 = &stmpe_gpio_1;
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gpio8 = &stmpe_gpio_2;
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};
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memory {
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reg = <0x10000000 0x80000000>;
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};
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di0 {
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compatible = "fsl,imx-parallel-display";
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interface-pix-fmt = "rgb24";
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crtcs = <&ipu1 0>;
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};
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regulators {
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compatible = "simple-bus";
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reg_2p5v: 2p5v {
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compatible = "regulator-fixed";
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regulator-name = "2P5V";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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reg_3p3v: 3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_usb_otg_vbus: usb_otg_vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio7 12 0>;
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};
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reg_usb_host1: usb_host1_en {
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compatible = "regulator-fixed";
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regulator-name = "usb_host1_en";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio3 31 0>;
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enable-active-high;
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};
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};
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};
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&ecspi5 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi_5_1>;
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fsl,spi-num-chipselects = <1>;
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cs-gpios = <&gpio1 12 0>;
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status = "okay";
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flash: m25p80@0 {
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compatible = "m25p80";
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spi-max-frequency = <40000000>;
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "barebox";
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reg = <0x0 0x80000>;
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};
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partition@1 {
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label = "barebox-environment";
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reg = <0x80000 0x20000>;
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};
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet_1>;
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phy-mode = "rgmii";
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phy-reset-gpios = <&gpio3 23 0>;
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status = "okay";
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};
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&i2c2 {
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status = "okay";
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2
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&pinctrl_stmpe_1_1
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&pinctrl_stmpe_2_1>;
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stmpe_1: stmpe1601@40 {
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compatible = "stmpe1601";
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reg = <0x40>;
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interrupts = <30 0>;
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interrupt-parent = <&gpio3>;
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stmpe_gpio_1: stmpe_gpio {
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compatible = "st,stmpe-gpio";
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};
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};
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stmpe_2: stmpe1601@44 {
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compatible = "stmpe1601";
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reg = <0x44>;
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interrupts = <2 0>;
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interrupt-parent = <&gpio5>;
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stmpe_gpio_2: stmpe_gpio {
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compatible = "st,stmpe-gpio";
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};
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};
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temp1: ad7414@4c {
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compatible = "ad7414";
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reg = <0x4c>;
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};
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temp2: ad7414@4d {
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compatible = "ad7414";
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reg = <0x4d>;
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};
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rtc: m41t62@68 {
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compatible = "m41t62";
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reg = <0x68>;
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};
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pmic: pf0100@08 {
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compatible = "pf0100-regulator";
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reg = <0x08>;
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interrupt-parent = <&gpio3>;
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interrupts = <20 8>;
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regulators {
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reg_vddcore: sw1ab {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-always-on;
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};
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reg_vddsoc: sw1c {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-always-on;
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};
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reg_gen_3v3: sw2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_ddr_1v5a: sw3a {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-always-on;
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};
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reg_ddr_1v5b: sw3b {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-always-on;
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};
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reg_ddr_vtt: sw4 {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-always-on;
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};
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reg_5v_600mA: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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regulator-always-on;
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};
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reg_snvs_3v: vsnvs {
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <3000000>;
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regulator-always-on;
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};
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reg_vrefddr: vrefddr {
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <750000>;
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regulator-always-on;
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};
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reg_vgen1_1v5: vgen1 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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/* not used */
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};
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reg_vgen2_1v2_eth: vgen2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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regulator-always-on;
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};
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reg_vgen3_2v8: vgen3 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_vgen4_1v8: vgen4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_vgen5_1v8_eth: vgen5 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_vgen6_3v3: vgen6 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>, <&pinctrl_pfuze_1>;
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hog {
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pinctrl_hog: hoggrp-1 {
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fsl,pins = <
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MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000
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MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
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>;
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};
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};
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i2c2 {
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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>;
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};
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};
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uart {
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pinctrl_uart1_2: uart1grp-2 {
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fsl,pins = <
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MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
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MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
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>;
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};
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};
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pfuze {
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pinctrl_pfuze_1: pfuze100grp1 {
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fsl,pins = <
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MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x198c0
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>;
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};
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};
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stmpe_1 {
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pinctrl_stmpe_1_1: stmpe1grp-1 {
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fsl,pins = <
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MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000
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>;
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};
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};
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stmpe_2 {
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pinctrl_stmpe_2_1: stmpe2grp-1 {
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fsl,pins = <
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MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000
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>;
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};
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};
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ecspi5 {
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pinctrl_ecspi_5_1: ecspi5rp-1 {
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fsl,pins = <
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MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x80000000
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MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x80000000
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MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x80000000 /* cs0: m25p80 */
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>;
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};
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};
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};
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&sata {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1_2>;
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status = "okay";
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};
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&uart2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2_1>;
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};
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&usbh1 {
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vbus-supply = <®_usb_host1>;
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status = "okay";
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disable-over-current;
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};
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&usbotg {
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vbus-supply = <®_usb_otg_vbus>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg_1>;
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disable-over-current;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3_2>;
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vmmc-supply = <®_3p3v>;
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status = "okay";
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};
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&usdhc4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc4_1>;
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vmmc-supply = <®_3p3v>;
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non-removable;
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bus-width = <8>;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "barebox-environment";
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reg = <0x0 0x80000>;
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};
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};
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