928cc6f4ee
This patch adds arm64 specific codes, which are: - exception support - cache support - rework Makefile to support arm64 Signed-off-by: Raphael Poggi <poggi.raph@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
128 lines
2.1 KiB
ArmAsm
128 lines
2.1 KiB
ArmAsm
/*
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* (C) Copyright 2013
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* David Feng <fenghua@phytium.com.cn>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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#include <asm/ptrace.h>
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#include <linux/linkage.h>
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/*
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* Enter Exception.
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* This will save the processor state that is ELR/X0~X30
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* to the stack frame.
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*/
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.macro exception_entry
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stp x29, x30, [sp, #-16]!
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stp x27, x28, [sp, #-16]!
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stp x25, x26, [sp, #-16]!
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stp x23, x24, [sp, #-16]!
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stp x21, x22, [sp, #-16]!
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stp x19, x20, [sp, #-16]!
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stp x17, x18, [sp, #-16]!
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stp x15, x16, [sp, #-16]!
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stp x13, x14, [sp, #-16]!
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stp x11, x12, [sp, #-16]!
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stp x9, x10, [sp, #-16]!
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stp x7, x8, [sp, #-16]!
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stp x5, x6, [sp, #-16]!
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stp x3, x4, [sp, #-16]!
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stp x1, x2, [sp, #-16]!
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/* Could be running at EL3/EL2/EL1 */
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mrs x11, CurrentEL
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cmp x11, #0xC /* Check EL3 state */
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b.eq 1f
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cmp x11, #0x8 /* Check EL2 state */
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b.eq 2f
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cmp x11, #0x4 /* Check EL1 state */
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b.eq 3f
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3: mrs x1, esr_el3
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mrs x2, elr_el3
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b 0f
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2: mrs x1, esr_el2
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mrs x2, elr_el2
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b 0f
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1: mrs x1, esr_el1
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mrs x2, elr_el1
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0:
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stp x2, x0, [sp, #-16]!
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mov x0, sp
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.endm
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/*
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* Exception vectors.
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*/
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.align 11
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.globl vectors
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vectors:
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.align 7
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b _do_bad_sync /* Current EL Synchronous Thread */
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.align 7
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b _do_bad_irq /* Current EL IRQ Thread */
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.align 7
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b _do_bad_fiq /* Current EL FIQ Thread */
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.align 7
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b _do_bad_error /* Current EL Error Thread */
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.align 7
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b _do_sync /* Current EL Synchronous Handler */
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.align 7
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b _do_irq /* Current EL IRQ Handler */
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.align 7
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b _do_fiq /* Current EL FIQ Handler */
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.align 7
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b _do_error /* Current EL Error Handler */
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_do_bad_sync:
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exception_entry
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bl do_bad_sync
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_do_bad_irq:
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exception_entry
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bl do_bad_irq
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_do_bad_fiq:
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exception_entry
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bl do_bad_fiq
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_do_bad_error:
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exception_entry
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bl do_bad_error
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_do_sync:
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exception_entry
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bl do_sync
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_do_irq:
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exception_entry
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bl do_irq
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_do_fiq:
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exception_entry
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bl do_fiq
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_do_error:
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exception_entry
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bl do_error
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.section .data
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.align 4
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.global arm_ignore_data_abort
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arm_ignore_data_abort:
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.word 0 /* When != 0 data aborts are ignored */
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.global arm_data_abort_occurred
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arm_data_abort_occurred:
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.word 0 /* set != 0 by the data abort handler */
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abort_stack:
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.space 8
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