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superfemto
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master
Author | SHA1 | Date |
---|---|---|
Harald Welte | 7f0d5697b8 | |
Harald Welte | 84e0cf4651 | |
Harald Welte | 422da1f512 | |
Harald Welte | 73a3a2f9cf | |
Harald Welte | 232e003fd9 | |
Harald Welte | e870e73907 | |
Holger Hans Peter Freyther | bbf213491f | |
Holger Hans Peter Freyther | 5e4d31fbaa | |
Harald Welte | bcf372be42 | |
Harald Welte | e04b9c2bbd | |
Harald Welte | 414f59bb67 | |
Harald Welte | 501f464a6a | |
Harald Welte | 7fb9e89144 | |
Harald Welte | 8137eb6fb3 | |
Harald Welte | d4a0749e84 | |
Harald Welte | 3c025df32c | |
Harald Welte | 079c61c3fb | |
Harald Welte | 88d83b7e86 | |
Harald Welte | 77dc4e3967 | |
Harald Welte | 1becfc0df9 | |
Harald Welte | 4d418840df | |
Harald Welte | d03580016e |
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@ -0,0 +1,4 @@
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Header files for sysmoBTS Layer 1 API
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This repository contains the header files required to compile the
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osmo-bts software against the sysmoBTS hardware.
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@ -141,8 +141,9 @@ typedef enum GsmL1_Status_t
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GsmL1_Status_TxBurstFifoUndr = -21, ///< Fifo underrun
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GsmL1_Status_NotSynchronized = -22, ///< Not synchronized
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GsmL1_Status_Unsupported = -23, ///< Unsupported feature
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GsmL1_Status_ClockError = -24, ///< System clock error
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GSML1_STATUS_NUM = 24
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GSML1_STATUS_NUM = 25
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} GsmL1_Status_t;
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@ -183,7 +184,8 @@ typedef enum GsmL1_DevType_t
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GsmL1_DevType_Rxd = 0x01, ///< Monitor type (RX downlink only)
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GsmL1_DevType_Rxu = 0x02, ///< Monitor type (RX uplink only)
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GsmL1_DevType_Txd = 0x04, ///< Jammer type (TX downlink only)
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GsmL1_DevType_Txu = 0x08 ///< Jammer type (TX uplink only)
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GsmL1_DevType_Txu = 0x08, ///< Jammer type (TX uplink only)
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GsmL1_DevType_TxuRxu = 0x0A ///< Loopback type (TX uplink with downlink frame format, Rx uplink)
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} GsmL1_DevType_t;
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@ -0,0 +1,283 @@
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#ifndef PACKET_H__
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#define PACKET_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#define RQT_SUCCESS 0
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enum sbts2050_ids_request {
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SBTS2050_PWR_RQT = 0x00,
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SBTS2050_PWR_STATUS = 0x01,
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SBTS2050_TEMP_RQT = 0x10
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};
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typedef struct
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{
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uint16_t u16Magic; ///< Magic ID (0xCAFE)
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uint8_t u8Id; ///< Command ID
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uint8_t u8Len; ///< Command length in bytes (not including the parity)
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union {
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//
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// Power Supply commands
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//
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// Activate/deactivate power supply
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struct
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{
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uint8_t u1MasterEn :1; ///< Master SF enable (0:disable, 1:enable)
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uint8_t u1SlaveEn :1; ///< Slave SF enable (0:disable, 1:enable)
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uint8_t u1PwrAmpEn :1; ///< PA enable (0:disable, 1:enable)
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} __attribute__((packed)) pwrSetState;
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// Get the status of the power supplies
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struct
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{
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} __attribute__((packed)) pwrGetStatus;
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//
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// Temperature commands
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//
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// Get temperature
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struct
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{
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} __attribute__((packed)) tempGet;
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//
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// Ethernet Swicth commands
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//
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// Reset the ethernet switch
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struct
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{
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} __attribute__((packed)) ethswtReset;
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// Write to the ethernet switch EEPROM
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struct
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{
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uint8_t u8Addr; ///< Write address
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uint8_t u8Data; ///< Write value
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} __attribute__((packed)) ethswtEepromWrite;
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// Read from the ethernet switch EEPROM
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struct
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{
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uint8_t u8Addr; ///< Write address
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} __attribute__((packed)) ethswtEepromRead;
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// Write to the MDIO port of the ethernet switch
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struct
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{
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uint8_t u8Dev; ///< Device address
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uint8_t u8Reg; ///< Register address
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uint16_t u16Data; ///< Write data
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} __attribute__((packed)) ethswtMdioWrite;
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// Read from the MDIO port of the ethernet switch
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struct
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{
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uint8_t u8Dev; ///< Device address
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uint8_t u8Reg; ///< Write address
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} __attribute__((packed)) ethswtMdioRead;
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//
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// Watchdog commands
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//
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// Set the timeout value of the watchdog timer
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struct
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{
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uint8_t u8Timeout; ///< Timout value in seconds (0: disable)
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} __attribute__((packed)) wdtSetTimeout;
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// Trig the watchdog timer
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struct
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{
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} __attribute__((packed)) wdtTrig;
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//
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// Firmware commands
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//
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// Get firmware version
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struct
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{
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} __attribute__((packed)) fwGetVer;
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// Update firmware (enter programming mode)
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struct
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{
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} __attribute__((packed)) fwUpdate;
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// Restart the application
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struct
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{
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} __attribute__((packed)) fwReset;
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// Erase a flash section
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struct
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{
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uint32_t u32Addr; ///< Flash address
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} __attribute__((packed)) fwFlErase;
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// Program flash memory
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struct
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{
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uint32_t u32Addr; ///< Flash address
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uint8_t u8Len; ///< Number of bytes to be programmed
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uint8_t u8Data[128]; ///< Data to be programmed
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} __attribute__((packed)) fwFlProg;
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//
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// Raw payload
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//
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uint8_t raw[0]; ///< Raw command data
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} cmd;
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uint8_t u8Parity; ///< Command parity
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} __attribute__((packed)) cmdpkt_t;
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/****************************************************************************
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* Struct : rsppkt_t
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************************************************************************//**
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*
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* Response packet format (from control board).
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*
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****************************************************************************/
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typedef struct
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{
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uint16_t u16Magic; ///< Magic ID (0xCAFE)
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uint8_t u8Id; ///< Command ID
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uint8_t u8Len; ///< Response length in bytes (not including the parity)
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int8_t i8Error; ///< Error code (0:success, /0:error)
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union {
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//
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// Power Supply commands
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//
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// Activate/deactivate power supply
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struct
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{
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} __attribute__((packed)) pwrSetState;
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// Get the status of the power supplies
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struct
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{
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uint8_t u1MasterEn :1; ///< Master SF enable (0:disable, 1:enable)
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uint8_t u1SlaveEn :1; ///< Slave SF enable (0:disable, 1:enable)
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uint8_t u1PwrAmpEn :1; ///< PA enable (0:disable, 1:enable)
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uint8_t u8MasterV; ///< Master SF voltage (Q3.5)
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uint8_t u8MasterA; ///< Master SF current (Q2.6)
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uint8_t u8SlaveV; ///< Slave SF voltage (Q3.5)
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uint8_t u8SlaveA; ///< Slave SF current (Q2.6)
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uint8_t u8PwrAmpV; ///< PA voltage (Q6.2)
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uint8_t u8PwrAmpA; ///< PA current (Q2.6)
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uint8_t u8PwrAmpBiasV; ///< PA Bias voltage (Q4.4)
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uint8_t u8MainSupplyA; ///< Main supply (24V) current (Q2.6)
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} __attribute__((packed)) pwrGetStatus;
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//
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// Temperature commands
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//
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// Get temperature
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struct
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{
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int8_t i8BrdTemp; ///< Control board temperature
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int8_t i8PaTemp; ///< PA temperature
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} __attribute__((packed)) tempGet;
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//
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// Ethernet Swicth commands
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//
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// Reset the ethernet switch
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struct
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{
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} __attribute__((packed)) ethswtReset;
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// Write to the ethernet switch EEPROM
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struct
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{
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} __attribute__((packed)) ethswtEepromWrite;
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// Read from the ethernet switch EEPROM
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struct
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{
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uint8_t u8Value; ///< Read value
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} __attribute__((packed)) ethswtEepromRead;
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// Write to the MDIO port of the ethernet switch
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struct
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{
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} __attribute__((packed)) ethswtMdioWrite;
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// Read from the MDIO port of the ethernet switch
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struct
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{
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uint16_t u16Data; ///< Read value
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} __attribute__((packed)) ethswtMdioRead;
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//
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// Watchdog commands
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//
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// Set the timeout value of the watchdog timer
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struct
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{
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} __attribute__((packed)) wdtSetTimout;
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// Trig the watchdog timer
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struct
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{
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} __attribute__((packed)) wdtTrig;
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//
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// Firmware commands
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//
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// Get firmware version
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struct
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{
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uint8_t u8Major; ///< Major version number
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uint8_t u8Minor; ///< Minot version number
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} __attribute__((packed)) fwGetVer;
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// Update firmware
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struct
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{
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} __attribute__((packed)) fwUpdate;
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// Restart the application
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struct
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{
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} __attribute__((packed)) fwReset;
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// Erase a flash section
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struct
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{
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} __attribute__((packed)) fwFlErase;
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// Program flash memory
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struct
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{
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} __attribute__((packed)) fwFlProg;
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//
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// Raw payload
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//
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uint8_t raw[0]; ///< Raw command data
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} rsp;
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uint8_t u8Parity; ///< Command parity
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} __attribute__((packed)) rsppkt_t;
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -13,7 +13,7 @@
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#include "gsml1const.h"
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#define SUPERFEMTO_API(x,y,z) ((x << 16) | (y << 8) | z)
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#define SUPERFEMTO_API_VERSION SUPERFEMTO_API(2,1,0)
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#define SUPERFEMTO_API_VERSION SUPERFEMTO_API(5,1,0)
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/****************************************************************************
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* Const *
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@ -64,7 +64,12 @@ typedef enum SuperFemto_PrimId_t
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SuperFemto_PrimId_GetRxCalibTblCnf, ///< CNF: Returns RX level calibration table
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SuperFemto_PrimId_SetRxCalibTblReq, ///< REQ: Set the RX level calibration table
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SuperFemto_PrimId_SetRxCalibTblCnf, ///< CNF: Confirm the use of the new RX level calibration table
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SuperFemto_PrimId_MuteRfReq, ///< REQ: Mute/Unmute the RF section
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SuperFemto_PrimId_MuteRfCnf, ///< CNF: Confirm the mutin/unmiting of the the RF section
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SuperFemto_PrimId_SetRxAttenReq, ///< REQ: Set the RX attenuation
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SuperFemto_PrimId_SetRxAttenCnf, ///< CNF: Confirm the configuration of the RX attenuation
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SuperFemto_PrimId_NUM
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} SuperFemto_PrimId_t;
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/****************************************************************************
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@ -156,7 +161,10 @@ typedef struct SuperFemto_SystemFailureInd
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***************************************************************************/
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typedef struct SuperFemto_ActivateRfReq
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{
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// Timing source (FN/TN)
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// Maximum cell Size
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uint8_t u8MaxCellSize; ///< Maximum cell size in qbits (1 qbit = 138.4 meters, max 90 qbits)
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// Timing source (FN/TN)
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struct
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{
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uint8_t u8TimSrc; ///< Timing source (0:Slave/Get timing from remote master BTS, 1:Master/Generates its own timing)
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@ -168,19 +176,15 @@ typedef struct SuperFemto_ActivateRfReq
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uint8_t u8UsePdtchMsgq; ///< Set to '1' to use a separate MSGQUEUE for PDTCH primitives
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} msgq;
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// TRX RF clock options
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// RF options
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struct
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{
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int iClkCor; ///< Clock correction value in PPB.
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SuperFemto_ClkSrcId_t clkSrc; ///< Clock source (0:None, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:reserved, 6:RX, 7:Edge)
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} rfTrx;
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// RX RF clock options
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struct
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{
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int iClkCor; ///< Clock calibration value in PPB.
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SuperFemto_ClkSrcId_t clkSrc; ///< Clock source (0:None, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:TRX, 6:reserved, 7:Edge)
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} rfRx;
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float fMaxTxPower; ///< Nominal maximum TX power in dBm
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uint8_t u8UseExtAtten; ///< Use the external attenuator to control TX power (0:No, 1:Yes)
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} rfTrx;
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} SuperFemto_ActivateRfReq_t;
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@ -254,20 +258,13 @@ typedef struct SuperFemto_RfClockInfoReq
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***************************************************************************/
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typedef struct SuperFemto_RfClockSetupReq
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{
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// TRX RF clock options
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// RF clock options
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struct
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{
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int iClkCor; ///< Clock correction value in PPB.
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SuperFemto_ClkSrcId_t clkSrc; ///< Clock source (0:None, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:reserved, 6:RX, 7:Edge)
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} rfTrx;
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// RX RF clock options
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struct
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{
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int iClkCor; ///< Clock calibration value in PPB.
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SuperFemto_ClkSrcId_t clkSrc; ///< Clock source (0:None, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:TRX, 6:reserved, 7:Edge)
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} rfRx;
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// RF clock calibration
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struct {
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SuperFemto_ClkSrcId_t clkSrc; ///< Reference clock source (0:Off, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:reserved, 6:reserved, 7:Edge, 8:NL)
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@ -302,19 +299,12 @@ typedef struct SuperFemto_RfClockSetupCnf
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***************************************************************************/
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typedef struct SuperFemto_RfClockInfoCnf
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{
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// TRX RF clock options
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// RF clock options
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struct
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{
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int iClkCor; ///< Clock correction value in PPB.
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SuperFemto_ClkSrcId_t clkSrc; ///< Clock source (0:None, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:reserved, 6:RX, 7:Edge)
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} rfTrx;
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// RX RF clock options
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struct
|
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{
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int iClkCor; ///< Clock calibration value in PPB.
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SuperFemto_ClkSrcId_t clkSrc; ///< Clock source (0:None, 1:OCXO, 2:TCXO, 3:External, 4:GPS PPS, 5:TRX, 6:reserved, 7:Edge)
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} rfRx;
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// RF clock calibration
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struct {
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||||
|
@ -356,6 +346,8 @@ typedef struct SuperFemto_Layer1ResetCnf
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} SuperFemto_Layer1ResetCnf_t;
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||||
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||||
|
||||
|
||||
/****************************************************************************
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||||
* Struct : SuperFemto_GetTxCalibTblReq_t
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||||
************************************************************************//**
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||||
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@ -387,12 +379,19 @@ typedef struct SuperFemto_GetTxCalibTblCnf
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GsmL1_Status_t status;
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||||
GsmL1_FreqBand_t freqBand; ///< GSM Frequency band
|
||||
|
||||
float fGain[80]; ///< Gain setting for output level from +50dBm to -29 dBm
|
||||
float fGainCorrVsArfcn[374]; /**< Gain correction (in dBm) for each ARFCN
|
||||
float fTxGainGmsk[80]; ///< Gain setting for GMSK output level from +50dBm to -29 dBm
|
||||
float fTx8PskCorr; ///< Gain adjustment for 8 PSK (default to +3.25 dB)
|
||||
float fTxExtAttCorr[31]; ///< Gain adjustment for external attenuator (0:@1dB, 1:@2dB, ..., 31:@32dB)
|
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float fTxRollOffCorr[374]; /**< Gain correction for each ARFCN
|
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for GSM-850 : 0=128, 1:129, ..., 123:251, [124-373]:unused
|
||||
for GSM-900 : 0=955, 1:956, ..., 70:1, ..., 317:956, [318-373]:unused
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||||
for DCS-1800: 0=512, 1:513, ..., 373:885
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||||
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
|
||||
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
|
||||
|
||||
uint8_t u8DspMajVer; ///< DSP firmware major version (0 if unkown)
|
||||
uint8_t u8DspMinVer; ///< DSP firmware minor version (0 if unkown)
|
||||
uint8_t u8FpgaMajVer; ///< FPGA firmware major version (0 if unkown)
|
||||
uint8_t u8FpgaMinVer; ///< FPGA firmware minor version (0 if unkown)
|
||||
} SuperFemto_GetTxCalibTblCnf_t;
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -410,12 +409,19 @@ typedef struct SuperFemto_SetTxCalibTblReq
|
|||
{
|
||||
GsmL1_FreqBand_t freqBand; ///< GSM Frequency band
|
||||
|
||||
float fGain[80]; ///< Gain setting for output level from +50dBm to -29 dBm
|
||||
float fGainCorrVsArfcn[374]; /***< Gain correction (in dBm) for each ARFCN
|
||||
float fTxGainGmsk[80]; ///< Gain setting for GMSK output level from +50dBm to -29 dBm
|
||||
float fTx8PskCorr; ///< Gain adjustment for 8 PSK (default to +3.25 dB)
|
||||
float fTxExtAttCorr[31]; ///< Gain adjustment for external attenuator (0:@1dB, 1:@2dB, ..., 31:@32dB)
|
||||
float fTxRollOffCorr[374]; /**< Gain correction for each ARFCN
|
||||
for GSM-850 : 0=128, 1:129, ..., 123:251, [124-373]:unused
|
||||
for GSM-900 : 0=955, 1:956, ..., 70:1, ..., 317:956, [318-373]:unused
|
||||
for DCS-1800: 0=512, 1:513, ..., 373:885
|
||||
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
|
||||
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
|
||||
|
||||
uint8_t u8DspMajVer; ///< DSP firmware major version (0 if unkown)
|
||||
uint8_t u8DspMinVer; ///< DSP firmware minor version (0 if unkown)
|
||||
uint8_t u8FpgaMajVer; ///< FPGA firmware major version (0 if unkown)
|
||||
uint8_t u8FpgaMinVer; ///< FPGA firmware minor version (0 if unkown)
|
||||
} SuperFemto_SetTxCalibTblReq_t;
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -464,13 +470,23 @@ typedef struct SuperFemto_GetRxCalibTblCnf
|
|||
{
|
||||
GsmL1_Status_t status;
|
||||
GsmL1_FreqBand_t freqBand; ///< GSM Frequency band
|
||||
uint8_t bUplink; ///< Direction (0:Downlink, 1:Uplink)
|
||||
|
||||
float fRssiCorrVsArfcn[374]; /***< RSSI correction (in dBm) for each ARFCN
|
||||
uint8_t bUplink; ///< Direction (0:Downlink, 1:Uplink)
|
||||
|
||||
float fExtRxGain; ///< External RX gain
|
||||
float fRxMixGainCorr; ///< Mixer gain error compensation
|
||||
float fRxLnaGainCorr[3]; ///< LNA gain error compensation (1:@-12 dB, 2:@-24 dB, 3:@-36 dB)
|
||||
float fRxRollOffCorr[374]; /***< Frequency roll-off compensation
|
||||
for GSM-850 : 0=128, 1:129, ..., 123:251, [124-373]:unused
|
||||
for GSM-900 : 0=955, 1:956, ..., 70:1, ..., 317:956, [318-373]:unused
|
||||
for DCS-1800: 0=512, 1:513, ..., 373:885
|
||||
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
|
||||
uint8_t u8IqImbalMode; ///< IQ imbalance mode (0:off, 1:on, 2:auto)
|
||||
uint16_t u16IqImbalCorr[4]; ///< IQ imbalance compensation
|
||||
|
||||
uint8_t u8DspMajVer; ///< DSP firmware major version (0 if unkown)
|
||||
uint8_t u8DspMinVer; ///< DSP firmware minor version (0 if unkown)
|
||||
uint8_t u8FpgaMajVer; ///< FPGA firmware major version (0 if unkown)
|
||||
uint8_t u8FpgaMinVer; ///< FPGA firmware minor version (0 if unkown)
|
||||
} SuperFemto_GetRxCalibTblCnf_t;
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -489,11 +505,21 @@ typedef struct SuperFemto_SetRxCalibTblReq
|
|||
GsmL1_FreqBand_t freqBand; ///< GSM Frequency band
|
||||
uint8_t bUplink; ///< Direction (0:Downlink, 1:Uplink)
|
||||
|
||||
float fRssiCorrVsArfcn[374]; /***< RSSI correction (in dBm) for each ARFCN
|
||||
float fExtRxGain; ///< External RX gain
|
||||
float fRxMixGainCorr; ///< Mixer gain error compensation
|
||||
float fRxLnaGainCorr[3]; ///< LNA gain error compensation (1:@-12 dB, 2:@-24 dB, 3:@-36 dB)
|
||||
float fRxRollOffCorr[374]; /***< Frequency roll-off compensation
|
||||
for GSM-850 : 0=128, 1:129, ..., 123:251, [124-373]:unused
|
||||
for GSM-900 : 0=955, 1:956, ..., 70:1, ..., 317:956, [318-373]:unused
|
||||
for DCS-1800: 0=512, 1:513, ..., 373:885
|
||||
for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
|
||||
uint8_t u8IqImbalMode; ///< IQ imbalance mode (0:off, 1:on, 2:auto)
|
||||
uint16_t u16IqImbalCorr[4]; ///< IQ imbalance compensation
|
||||
|
||||
uint8_t u8DspMajVer; ///< DSP firmware major version (0 if unkown)
|
||||
uint8_t u8DspMinVer; ///< DSP firmware minor version (0 if unkown)
|
||||
uint8_t u8FpgaMajVer; ///< FPGA firmware major version (0 if unkown)
|
||||
uint8_t u8FpgaMinVer; ///< FPGA firmware minor version (0 if unkown)
|
||||
} SuperFemto_SetRxCalibTblReq_t;
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -512,6 +538,67 @@ typedef struct SuperFemto_SetRxCalibTblCnf
|
|||
uint8_t bUplink; ///< Direction (0:Downlink, 1:Uplink)
|
||||
} SuperFemto_SetRxCalibTblCnf_t;
|
||||
|
||||
/****************************************************************************
|
||||
* Struct : SuperFemto_MuteRfReq_t
|
||||
************************************************************************//**
|
||||
*
|
||||
* This primitive is used to configure the RF clock sub-system.
|
||||
*
|
||||
* @ingroup superfemto_api_prim_dbg
|
||||
*
|
||||
***************************************************************************/
|
||||
typedef struct SuperFemto_MuteRfReq
|
||||
{
|
||||
uint8_t u8Mute[8]; ///< Timeslot mute flag (0:unmute, 1:mute)
|
||||
|
||||
} SuperFemto_MuteRfReq_t;
|
||||
|
||||
/****************************************************************************
|
||||
* Struct : SuperFemto_MuteRfCnf_t
|
||||
************************************************************************//**
|
||||
*
|
||||
* This primitive is sent back to confirm the configuration of the RF clock sub-system.
|
||||
*
|
||||
* @ingroup superfemto_api_prim_dbg
|
||||
*
|
||||
***************************************************************************/
|
||||
typedef struct SuperFemto_MuteRfCnf
|
||||
{
|
||||
SuperFemto_Status_t status; ///< Status of the MUTE-RF-REQ
|
||||
|
||||
} SuperFemto_MuteRfCnf_t;
|
||||
|
||||
/****************************************************************************
|
||||
* Struct : SuperFemto_SetRxAttenReq_t
|
||||
************************************************************************//**
|
||||
*
|
||||
* This primitive is used to configure the RF receive attenuation.
|
||||
*
|
||||
* @ingroup superfemto_api_prim_dbg
|
||||
*
|
||||
***************************************************************************/
|
||||
typedef struct SuperFemto_SetRxAttenReq
|
||||
{
|
||||
uint8_t u8Atten; ///< RX Attenuation: 0(default), 12, 24, 36 dB
|
||||
|
||||
} SuperFemto_SetRxAttenReq_t;
|
||||
|
||||
/****************************************************************************
|
||||
* Struct : SuperFemto_SetRxAttenCnf_t
|
||||
************************************************************************//**
|
||||
*
|
||||
* This primitive is sent back to confirm the configuration of the RF receive
|
||||
* attenuation.
|
||||
*
|
||||
* @ingroup superfemto_api_prim_dbg
|
||||
*
|
||||
***************************************************************************/
|
||||
typedef struct SuperFemto_SetRxAttenCnf
|
||||
{
|
||||
SuperFemto_Status_t status; ///< Status of the SET-RX-ATTEN-REQ
|
||||
|
||||
} SuperFemto_SetRxAttenCnf_t;
|
||||
|
||||
/****************************************************************************
|
||||
* Struct : SuperFemto_Primt_t
|
||||
************************************************************************//**
|
||||
|
@ -547,6 +634,11 @@ typedef struct SuperFemto_Prim
|
|||
SuperFemto_GetRxCalibTblCnf_t getRxCalibTblCnf; ///< CNF: Returns RX level calibration table
|
||||
SuperFemto_SetRxCalibTblReq_t setRxCalibTblReq; ///< REQ: Set the RX level calibration table
|
||||
SuperFemto_SetRxCalibTblCnf_t setRxCalibTblCnf; ///< CNF: Confirm the use of the new RX level calibration table
|
||||
SuperFemto_MuteRfReq_t muteRfReq; ///< REQ: Mute/Unmute the RF section
|
||||
SuperFemto_MuteRfCnf_t muteRfCnf; ///< CNF: Confirm the mutin/unmiting of the the RF section
|
||||
SuperFemto_SetRxAttenReq_t setRxAttenReq; ///< REQ: Set the RX attenuation
|
||||
SuperFemto_SetRxAttenCnf_t setRxAttenCnf; ///< CNF: Confirm the configuration of the RX attenuation
|
||||
|
||||
} u;
|
||||
|
||||
} SuperFemto_Prim_t;
|
||||
|
|
Loading…
Reference in New Issue