Update to API Release v5.1

The define is used by the sysmobts manager to check for success
of the request

include/gsml1const.h

@@ -141,8 +141,9 @@ typedef enum GsmL1_Status_t
     GsmL1_Status_TxBurstFifoUndr    =  -21, ///< Fifo underrun
     GsmL1_Status_NotSynchronized    =  -22, ///< Not synchronized
     GsmL1_Status_Unsupported        =  -23, ///< Unsupported feature
+    GsmL1_Status_ClockError         =  -24, ///< System clock error
 
-    GSML1_STATUS_NUM                =   24
+    GSML1_STATUS_NUM                =   25
 
 } GsmL1_Status_t;
 
@@ -183,7 +184,8 @@ typedef enum GsmL1_DevType_t
     GsmL1_DevType_Rxd    = 0x01,    ///< Monitor type (RX downlink only)
     GsmL1_DevType_Rxu    = 0x02,    ///< Monitor type (RX uplink only)
     GsmL1_DevType_Txd    = 0x04,    ///< Jammer type (TX downlink only)
-    GsmL1_DevType_Txu    = 0x08     ///< Jammer type (TX uplink only)
+    GsmL1_DevType_Txu    = 0x08,    ///< Jammer type (TX uplink only)
+    GsmL1_DevType_TxuRxu = 0x0A     ///< Loopback type (TX uplink with downlink frame format, Rx uplink)
 
 } GsmL1_DevType_t;
 

include/sbts2050_header.h

@@ -0,0 +1,283 @@
+#ifndef PACKET_H__
+#define PACKET_H__
+
+#ifdef __cplusplus
+	extern "C" {
+#endif
+
+#include <stdint.h>
+
+#define	RQT_SUCCESS	0
+
+enum sbts2050_ids_request {
+	SBTS2050_PWR_RQT = 0x00,
+	SBTS2050_PWR_STATUS = 0x01,
+	SBTS2050_TEMP_RQT = 0x10
+};
+
+typedef struct
+{
+    uint16_t u16Magic;              ///< Magic ID (0xCAFE)
+    uint8_t  u8Id;                  ///< Command ID
+    uint8_t  u8Len;                 ///< Command length in bytes (not including the parity)
+    union {
+        //
+        // Power Supply commands
+        //
+
+        // Activate/deactivate power supply
+        struct
+        {
+            uint8_t u1MasterEn  :1;     ///< Master SF enable (0:disable, 1:enable)
+            uint8_t u1SlaveEn   :1;     ///< Slave SF enable (0:disable, 1:enable)
+            uint8_t u1PwrAmpEn  :1;     ///< PA enable (0:disable, 1:enable)
+        } __attribute__((packed)) pwrSetState;
+
+        // Get the status of the power supplies
+        struct
+        {
+        } __attribute__((packed)) pwrGetStatus;
+
+        //
+        // Temperature commands
+        //
+
+        // Get temperature
+        struct
+        {
+        } __attribute__((packed)) tempGet;
+
+        //
+        // Ethernet Swicth commands
+        //
+
+        // Reset the ethernet switch
+        struct
+        {
+        } __attribute__((packed)) ethswtReset;
+
+        // Write to the ethernet switch EEPROM
+        struct
+        {
+            uint8_t u8Addr;             ///< Write address
+            uint8_t u8Data;             ///< Write value
+        } __attribute__((packed)) ethswtEepromWrite;
+
+        // Read from the ethernet switch EEPROM
+        struct
+        {
+            uint8_t u8Addr;             ///< Write address
+        } __attribute__((packed)) ethswtEepromRead;
+
+        // Write to the MDIO port of the ethernet switch
+        struct
+        {
+            uint8_t  u8Dev;             ///< Device address
+            uint8_t  u8Reg;             ///< Register address
+            uint16_t u16Data;           ///< Write data
+        } __attribute__((packed)) ethswtMdioWrite;
+
+        // Read from the MDIO port of the ethernet switch
+        struct
+        {
+            uint8_t u8Dev;              ///< Device address
+            uint8_t u8Reg;              ///< Write address
+        } __attribute__((packed)) ethswtMdioRead;
+
+        //
+        // Watchdog commands
+        //
+
+        // Set the timeout value of the watchdog timer
+        struct
+        {
+            uint8_t u8Timeout;          ///< Timout value in seconds (0: disable)
+        } __attribute__((packed)) wdtSetTimeout;
+
+        // Trig the  watchdog timer
+        struct
+        {
+        } __attribute__((packed)) wdtTrig;
+
+        //
+        // Firmware commands
+        //
+
+        // Get firmware version
+        struct
+        {
+        } __attribute__((packed)) fwGetVer;
+
+        // Update firmware (enter programming mode)
+        struct
+        {
+        } __attribute__((packed)) fwUpdate;
+
+        // Restart the application
+        struct
+        {
+        } __attribute__((packed)) fwReset;
+
+        // Erase a flash section
+        struct
+        {
+            uint32_t u32Addr;           ///< Flash address
+	} __attribute__((packed)) fwFlErase;
+
+        // Program flash memory
+        struct
+        {
+            uint32_t u32Addr;           ///< Flash address
+            uint8_t  u8Len;             ///< Number of bytes to be programmed
+	    uint8_t  u8Data[128];       ///< Data to be programmed
+        } __attribute__((packed)) fwFlProg;
+
+        //
+        // Raw payload
+        //
+        uint8_t raw[0];                 ///< Raw command data
+    } cmd;
+    uint8_t  u8Parity;              ///< Command parity
+
+} __attribute__((packed)) cmdpkt_t;
+
+
+/****************************************************************************
+ * Struct : rsppkt_t
+ ************************************************************************//**
+ *
+ * Response packet format (from control board).
+ *
+ ****************************************************************************/
+typedef struct
+{
+    uint16_t u16Magic;              ///< Magic ID (0xCAFE)
+    uint8_t  u8Id;                  ///< Command ID
+    uint8_t  u8Len;                 ///< Response length in bytes (not including the parity)
+    int8_t   i8Error;               ///< Error code (0:success, /0:error)
+    union {
+        //
+        // Power Supply commands
+        //
+
+        // Activate/deactivate power supply
+        struct
+        {
+        } __attribute__((packed)) pwrSetState;
+
+        // Get the status of the power supplies
+        struct
+        {
+            uint8_t u1MasterEn  :1;     ///< Master SF enable (0:disable, 1:enable)
+            uint8_t u1SlaveEn   :1;     ///< Slave SF enable (0:disable, 1:enable)
+            uint8_t u1PwrAmpEn  :1;     ///< PA enable (0:disable, 1:enable)
+
+            uint8_t u8MasterV;          ///< Master SF voltage (Q3.5)
+            uint8_t u8MasterA;          ///< Master SF current (Q2.6)
+            uint8_t u8SlaveV;           ///< Slave SF voltage (Q3.5)
+            uint8_t u8SlaveA;           ///< Slave SF current (Q2.6)
+            uint8_t u8PwrAmpV;          ///< PA voltage (Q6.2)
+            uint8_t u8PwrAmpA;          ///< PA current (Q2.6)
+            uint8_t u8PwrAmpBiasV;      ///< PA Bias voltage (Q4.4)
+            uint8_t u8MainSupplyA;      ///< Main supply (24V) current (Q2.6)
+       } __attribute__((packed)) pwrGetStatus;
+
+        //
+        // Temperature commands
+        //
+
+        // Get temperature
+        struct
+        {
+            int8_t  i8BrdTemp;          ///< Control board temperature
+            int8_t  i8PaTemp;           ///< PA temperature
+        } __attribute__((packed)) tempGet;
+
+        //
+        // Ethernet Swicth commands
+        //
+
+        // Reset the ethernet switch
+        struct
+        {
+        } __attribute__((packed)) ethswtReset;
+
+        // Write to the ethernet switch EEPROM
+        struct
+        {
+        } __attribute__((packed)) ethswtEepromWrite;
+
+        // Read from the ethernet switch EEPROM
+        struct
+        {
+            uint8_t u8Value;            ///< Read value
+        } __attribute__((packed)) ethswtEepromRead;
+
+        // Write to the MDIO port of the ethernet switch
+        struct
+        {
+        } __attribute__((packed)) ethswtMdioWrite;
+
+        // Read from the MDIO port of the ethernet switch
+        struct
+        {
+            uint16_t u16Data;           ///< Read value
+        } __attribute__((packed)) ethswtMdioRead;
+
+        //
+        // Watchdog commands
+        //
+
+        // Set the timeout value of the watchdog timer
+        struct
+        {
+        } __attribute__((packed)) wdtSetTimout;
+
+        // Trig the  watchdog timer
+        struct
+        {
+        } __attribute__((packed)) wdtTrig;
+
+        //
+        // Firmware commands
+        //
+
+        // Get firmware version
+        struct
+        {
+            uint8_t u8Major;            ///< Major version number
+            uint8_t u8Minor;            ///< Minot version number
+        } __attribute__((packed)) fwGetVer;
+
+        // Update firmware
+        struct
+        {
+        } __attribute__((packed)) fwUpdate;
+
+        // Restart the application
+        struct
+        {
+        } __attribute__((packed)) fwReset;
+
+        // Erase a flash section
+        struct
+        {
+        } __attribute__((packed)) fwFlErase;
+
+        // Program flash memory
+        struct
+        {
+        } __attribute__((packed)) fwFlProg;
+ 
+        //
+        // Raw payload
+        //
+        uint8_t raw[0];                 ///< Raw command data
+    } rsp;
+    uint8_t  u8Parity;              ///< Command parity
+} __attribute__((packed)) rsppkt_t;
+
+#ifdef __cplusplus
+}
+#endif
+#endif

include/superfemto.h

@@ -13,7 +13,7 @@
 #include "gsml1const.h"
 
 #define SUPERFEMTO_API(x,y,z)    ((x << 16) | (y << 8) | z)
-#define SUPERFEMTO_API_VERSION   SUPERFEMTO_API(3,6,0)
+#define SUPERFEMTO_API_VERSION   SUPERFEMTO_API(5,1,0)
 
 /****************************************************************************
  *                                   Const                                  *
@@ -66,7 +66,10 @@ typedef enum SuperFemto_PrimId_t
     SuperFemto_PrimId_SetRxCalibTblCnf,   ///< CNF: Confirm the use of the new RX level calibration table 
     SuperFemto_PrimId_MuteRfReq,          ///< REQ: Mute/Unmute the RF section
     SuperFemto_PrimId_MuteRfCnf,          ///< CNF: Confirm the mutin/unmiting of the the RF section
+    SuperFemto_PrimId_SetRxAttenReq,      ///< REQ: Set the RX attenuation
+    SuperFemto_PrimId_SetRxAttenCnf,      ///< CNF: Confirm the configuration of the RX attenuation
     SuperFemto_PrimId_NUM
+
 } SuperFemto_PrimId_t;
 
 /****************************************************************************
@@ -158,7 +161,10 @@ typedef struct SuperFemto_SystemFailureInd
  ***************************************************************************/
 typedef struct SuperFemto_ActivateRfReq
 {
-    // Timing source (FN/TN)
+    // Maximum cell Size
+	uint8_t u8MaxCellSize;				///< Maximum cell size in qbits (1 qbit = 138.4 meters, max 90 qbits)
+
+	// Timing source (FN/TN)
     struct
     {
         uint8_t u8TimSrc;               ///< Timing source (0:Slave/Get timing from remote master BTS, 1:Master/Generates its own timing)
@@ -380,7 +386,12 @@ typedef struct SuperFemto_GetTxCalibTblCnf
                                                 for GSM-850 : 0=128, 1:129, ..., 123:251, [124-373]:unused
                                                 for GSM-900 : 0=955, 1:956, ...,  70:1, ..., 317:956, [318-373]:unused
                                                 for DCS-1800: 0=512, 1:513, ..., 373:885
-                                                for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */                                                 
+                                                for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
+
+	uint8_t u8DspMajVer;           	///< DSP firmware major version (0 if unkown)
+	uint8_t u8DspMinVer;           	///< DSP firmware minor version (0 if unkown)
+	uint8_t u8FpgaMajVer;          	///< FPGA firmware major version (0 if unkown)
+	uint8_t u8FpgaMinVer;          	///< FPGA firmware minor version (0 if unkown)
 } SuperFemto_GetTxCalibTblCnf_t;
 
 /****************************************************************************
@@ -405,7 +416,12 @@ typedef struct SuperFemto_SetTxCalibTblReq
                                                 for GSM-850 : 0=128, 1:129, ..., 123:251, [124-373]:unused
                                                 for GSM-900 : 0=955, 1:956, ...,  70:1, ..., 317:956, [318-373]:unused
                                                 for DCS-1800: 0=512, 1:513, ..., 373:885
-                                                for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */                                                   
+                                                for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */
+
+    uint8_t u8DspMajVer;           	///< DSP firmware major version (0 if unkown)
+    uint8_t u8DspMinVer;           	///< DSP firmware minor version (0 if unkown)
+    uint8_t u8FpgaMajVer;          	///< FPGA firmware major version (0 if unkown)
+    uint8_t u8FpgaMinVer;          	///< FPGA firmware minor version (0 if unkown)
 } SuperFemto_SetTxCalibTblReq_t;
 
 /****************************************************************************
@@ -465,7 +481,12 @@ typedef struct SuperFemto_GetRxCalibTblCnf
                                                 for DCS-1800: 0=512, 1:513, ..., 373:885
                                                 for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */                                                
     uint8_t u8IqImbalMode;          ///< IQ imbalance mode (0:off, 1:on, 2:auto)
-    uint16_t u16IqImbalCorr[4];    ///< IQ imbalance compensation
+    uint16_t u16IqImbalCorr[4];    	///< IQ imbalance compensation
+
+    uint8_t u8DspMajVer;           	///< DSP firmware major version (0 if unkown)
+    uint8_t u8DspMinVer;           	///< DSP firmware minor version (0 if unkown)
+    uint8_t u8FpgaMajVer;          	///< FPGA firmware major version (0 if unkown)
+    uint8_t u8FpgaMinVer;          	///< FPGA firmware minor version (0 if unkown)
 } SuperFemto_GetRxCalibTblCnf_t;
 
 /****************************************************************************
@@ -493,7 +514,12 @@ typedef struct SuperFemto_SetRxCalibTblReq
                                                 for DCS-1800: 0=512, 1:513, ..., 373:885
                                                 for PCS-1900: 0=512, 1:513, ..., 298:810, [299-373]:unused */                                                
     uint8_t u8IqImbalMode;          ///< IQ imbalance mode (0:off, 1:on, 2:auto)
-    uint16_t u16IqImbalCorr[4];    ///< IQ imbalance compensation
+    uint16_t u16IqImbalCorr[4];    	///< IQ imbalance compensation
+
+    uint8_t u8DspMajVer;           	///< DSP firmware major version (0 if unkown)
+    uint8_t u8DspMinVer;           	///< DSP firmware minor version (0 if unkown)
+    uint8_t u8FpgaMajVer;          	///< FPGA firmware major version (0 if unkown)
+    uint8_t u8FpgaMinVer;          	///< FPGA firmware minor version (0 if unkown)
 } SuperFemto_SetRxCalibTblReq_t;
 
 /****************************************************************************
@@ -542,6 +568,37 @@ typedef struct SuperFemto_MuteRfCnf
 
 } SuperFemto_MuteRfCnf_t;
 
+/****************************************************************************
+ * Struct : SuperFemto_SetRxAttenReq_t
+ ************************************************************************//**
+ *
+ * This primitive is used to configure the RF receive attenuation.
+ *
+ * @ingroup superfemto_api_prim_dbg
+ *
+ ***************************************************************************/
+typedef struct SuperFemto_SetRxAttenReq
+{
+   uint8_t u8Atten;				///< RX Attenuation: 0(default), 12, 24, 36 dB
+
+} SuperFemto_SetRxAttenReq_t;
+
+/****************************************************************************
+ * Struct : SuperFemto_SetRxAttenCnf_t
+ ************************************************************************//**
+ *
+ * This primitive is sent back to confirm the configuration of the RF receive
+ * attenuation.
+ *
+ * @ingroup superfemto_api_prim_dbg
+ *
+ ***************************************************************************/
+typedef struct SuperFemto_SetRxAttenCnf
+{
+     SuperFemto_Status_t status;   ///< Status of the SET-RX-ATTEN-REQ
+
+} SuperFemto_SetRxAttenCnf_t;
+
 /****************************************************************************
  * Struct : SuperFemto_Primt_t
  ************************************************************************//**
@@ -579,6 +636,8 @@ typedef struct SuperFemto_Prim
         SuperFemto_SetRxCalibTblCnf_t setRxCalibTblCnf; ///< CNF: Confirm the use of the new RX level calibration table
         SuperFemto_MuteRfReq_t        muteRfReq;        ///< REQ: Mute/Unmute the RF section
         SuperFemto_MuteRfCnf_t        muteRfCnf;        ///< CNF: Confirm the mutin/unmiting of the the RF section
+        SuperFemto_SetRxAttenReq_t    setRxAttenReq;    ///< REQ: Set the RX attenuation
+        SuperFemto_SetRxAttenCnf_t    setRxAttenCnf;    ///< CNF: Confirm the configuration of the RX attenuation
 
     } u;