omap: SPL boot devices cleanup and completion

This cleans up the SPL boot devices for omap platforms and introduces support
for missing boot devices.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
This commit is contained in:
Paul Kocialkowski 2015-07-15 16:02:20 +02:00 committed by Tom Rini
parent 60c7c30aa0
commit 62c5674ea1
4 changed files with 91 additions and 70 deletions

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@ -7,51 +7,65 @@
#ifndef _ASM_ARCH_SPL_H_
#define _ASM_ARCH_SPL_H_
#if defined(CONFIG_TI816X)
#define BOOT_DEVICE_XIP 2
#define BOOT_DEVICE_NAND 3
#define BOOT_DEVICE_MMC1 6
#define BOOT_DEVICE_MMC2 5
#define BOOT_DEVICE_UART 0x43
#elif defined(CONFIG_AM43XX)
#define BOOT_DEVICE_NOR 1
#define BOOT_DEVICE_NAND 5
#define BOOT_DEVICE_MMC1 7
#define BOOT_DEVICE_MMC2 8
#define BOOT_DEVICE_SPI 10
#define BOOT_DEVICE_USB 13
#define BOOT_DEVICE_UART 65
#define BOOT_DEVICE_CPGMAC 71
#else
#define BOOT_DEVICE_XIP 2
#define BOOT_DEVICE_NAND 5
#define BOOT_DEVICE_NAND_I2C 6
#if defined(CONFIG_AM33XX)
#define BOOT_DEVICE_MMC1 8
#define BOOT_DEVICE_MMC2 9 /* eMMC or daughter card */
#elif defined(CONFIG_TI814X)
#define BOOT_DEVICE_MMC1 9
#define BOOT_DEVICE_MMC2 8 /* ROM only supports 2nd instance */
#endif
#define BOOT_DEVICE_SPI 11
#define BOOT_DEVICE_UART 65
#define BOOT_DEVICE_USBETH 68
#define BOOT_DEVICE_CPGMAC 70
#endif
#define BOOT_DEVICE_MMC2_2 0xFF
#define BOOT_DEVICE_NONE 0x00
#define BOOT_DEVICE_MMC2_2 0xFF
#if defined(CONFIG_TI814X)
#define BOOT_DEVICE_XIP 0x01
#define BOOT_DEVICE_XIPWAIT 0x02
#define BOOT_DEVICE_NAND 0x05
#define BOOT_DEVICE_NAND_I2C 0x06
#define BOOT_DEVICE_MMC2 0x08 /* ROM only supports 2nd instance. */
#define BOOT_DEVICE_MMC1 0x09
#define BOOT_DEVICE_SPI 0x15
#define BOOT_DEVICE_UART 0x41
#define BOOT_DEVICE_USBETH 0x44
#define BOOT_DEVICE_CPGMAC 0x46
#if defined(CONFIG_AM33XX)
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2
#elif defined(CONFIG_AM43XX)
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#ifdef CONFIG_SPL_USB_SUPPORT
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_USB
#else
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2
#endif
#elif defined(CONFIG_TI81XX)
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1
#elif defined(CONFIG_TI816X)
#define BOOT_DEVICE_XIP 0x01
#define BOOT_DEVICE_XIPWAIT 0x02
#define BOOT_DEVICE_NAND 0x03
#define BOOT_DEVICE_ONENAD 0x04
#define BOOT_DEVICE_MMC2 0x05 /* ROM only supports 2nd instance. */
#define BOOT_DEVICE_MMC1 0x06
#define BOOT_DEVICE_UART 0x43
#define BOOT_DEVICE_USB 0x45
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1
#elif defined(CONFIG_AM33XX)
#define BOOT_DEVICE_XIP 0x01
#define BOOT_DEVICE_XIPWAIT 0x02
#define BOOT_DEVICE_NAND 0x05
#define BOOT_DEVICE_NAND_I2C 0x06
#define BOOT_DEVICE_MMC1 0x08
#define BOOT_DEVICE_MMC2 0x09
#define BOOT_DEVICE_SPI 0x15
#define BOOT_DEVICE_UART 0x41
#define BOOT_DEVICE_USBETH 0x44
#define BOOT_DEVICE_CPGMAC 0x46
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2
#elif defined(CONFIG_AM43XX)
#define BOOT_DEVICE_NOR 0x01
#define BOOT_DEVICE_NAND 0x05
#define BOOT_DEVICE_MMC1 0x07
#define BOOT_DEVICE_MMC2 0x08
#define BOOT_DEVICE_SPI 0x0A
#define BOOT_DEVICE_UART 0x41
#define BOOT_DEVICE_USB 0x45
#define BOOT_DEVICE_CPGMAC 0x47
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#ifdef CONFIG_SPL_USB_SUPPORT
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_USB
#else
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2
#endif
#endif
#endif

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@ -7,14 +7,16 @@
#ifndef _ASM_ARCH_SPL_H_
#define _ASM_ARCH_SPL_H_
#define BOOT_DEVICE_NONE 0
#define BOOT_DEVICE_XIP 1
#define BOOT_DEVICE_NAND 2
#define BOOT_DEVICE_ONENAND 3
#define BOOT_DEVICE_MMC2 5 /*emmc*/
#define BOOT_DEVICE_MMC1 6
#define BOOT_DEVICE_XIPWAIT 7
#define BOOT_DEVICE_MMC2_2 0xFF
#define BOOT_DEVICE_NONE 0x00
#define BOOT_DEVICE_XIP 0x01
#define BOOT_DEVICE_NAND 0x02
#define BOOT_DEVICE_ONENAND 0x03
#define BOOT_DEVICE_MMC2 0x05
#define BOOT_DEVICE_MMC1 0x06
#define BOOT_DEVICE_XIPWAIT 0x07
#define BOOT_DEVICE_MMC2_2 0x08
#define BOOT_DEVICE_UART 0x10
#define BOOT_DEVICE_USB 0x11
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1

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@ -7,15 +7,17 @@
#ifndef _ASM_ARCH_SPL_H_
#define _ASM_ARCH_SPL_H_
#define BOOT_DEVICE_NONE 0
#define BOOT_DEVICE_XIP 1
#define BOOT_DEVICE_XIPWAIT 2
#define BOOT_DEVICE_NAND 3
#define BOOT_DEVICE_ONENAND 4
#define BOOT_DEVICE_MMC1 5
#define BOOT_DEVICE_MMC2 6
#define BOOT_DEVICE_MMC2_2 0xFF
#define BOOT_DEVICE_NONE 0x00
#define BOOT_DEVICE_XIP 0x01
#define BOOT_DEVICE_XIPWAIT 0x02
#define BOOT_DEVICE_NAND 0x03
#define BOOT_DEVICE_ONENAND 0x04
#define BOOT_DEVICE_MMC1 0x05
#define BOOT_DEVICE_MMC2 0x06
#define BOOT_DEVICE_MMC2_2 0x07
#define BOOT_DEVICE_UART 0x43
#define BOOT_DEVICE_USB 0x45
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2_2
#endif

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@ -7,17 +7,20 @@
#ifndef _ASM_ARCH_SPL_H_
#define _ASM_ARCH_SPL_H_
#define BOOT_DEVICE_NONE 0
#define BOOT_DEVICE_XIP 1
#define BOOT_DEVICE_XIPWAIT 2
#define BOOT_DEVICE_NAND 3
#define BOOT_DEVICE_ONENAND 4
#define BOOT_DEVICE_MMC1 5
#define BOOT_DEVICE_MMC2 6
#define BOOT_DEVICE_MMC2_2 7
#define BOOT_DEVICE_SATA 9
#define BOOT_DEVICE_SPI 10
#define BOOT_DEVICE_NONE 0x00
#define BOOT_DEVICE_XIP 0x01
#define BOOT_DEVICE_XIPWAIT 0x02
#define BOOT_DEVICE_NAND 0x03
#define BOOT_DEVICE_ONENAND 0x04
#define BOOT_DEVICE_MMC1 0x05
#define BOOT_DEVICE_MMC2 0x06
#define BOOT_DEVICE_MMC2_2 0x07
#define BOOT_DEVICE_SATA 0x09
#define BOOT_DEVICE_SPI 0x0A
#define BOOT_DEVICE_QSPI_1 0x0A
#define BOOT_DEVICE_QSPI_4 0x0B
#define BOOT_DEVICE_UART 0x43
#define BOOT_DEVICE_USB 0x45
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2_2