Merge branches 'topic/drivers/fpga-20141006', 'topic/drivers/mmc-20141006', 'topic/drivers/net-20141006', 'topic/tools/mkimage-20141006' and 'topic/arm/cache-20141006' into HEAD

This commit is contained in:
Marek Vasut 2014-10-06 17:45:55 +02:00
14 changed files with 317 additions and 42 deletions

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@ -185,6 +185,7 @@ enum dcache_option {
DCACHE_OFF = 0x12,
DCACHE_WRITETHROUGH = 0x1a,
DCACHE_WRITEBACK = 0x1e,
DCACHE_WRITEALLOC = 0x16,
};
/* Size of an MMU section */

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@ -73,6 +73,8 @@ __weak void dram_bank_mmu_setup(int bank)
i++) {
#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
set_section_dcache(i, DCACHE_WRITETHROUGH);
#elif defined(CONFIG_SYS_ARM_CACHE_WRITEALLOC)
set_section_dcache(i, DCACHE_WRITEALLOC);
#else
set_section_dcache(i, DCACHE_WRITEBACK);
#endif

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@ -138,6 +138,7 @@ static const table_entry_t uimage_type[] = {
{ IH_TYPE_PBLIMAGE, "pblimage", "Freescale PBL Boot Image",},
{ IH_TYPE_RAMDISK, "ramdisk", "RAMDisk Image", },
{ IH_TYPE_SCRIPT, "script", "Script", },
{ IH_TYPE_SOCFPGAIMAGE, "socfpgaimage", "Altera SOCFPGA preloader",},
{ IH_TYPE_STANDALONE, "standalone", "Standalone Program", },
{ IH_TYPE_UBLIMAGE, "ublimage", "Davinci UBL image",},
{ IH_TYPE_MXSIMAGE, "mxsimage", "Freescale MXS Boot Image",},

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@ -119,7 +119,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) {
if (get_timer(start) > timeout) {
printf("Timeout on data busy\n");
printf("%s: Timeout on data busy\n", __func__);
return TIMEOUT;
}
}
@ -177,14 +177,24 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
}
}
if (i == retry)
if (i == retry) {
printf("%s: Timeout.\n", __func__);
return TIMEOUT;
}
if (mask & DWMCI_INTMSK_RTO) {
debug("Response Timeout..\n");
/*
* Timeout here is not necessarily fatal. (e)MMC cards
* will splat here when they receive CMD55 as they do
* not support this command and that is exactly the way
* to tell them apart from SD cards. Thus, this output
* below shall be debug(). eMMC cards also do not favor
* CMD8, please keep that in mind.
*/
debug("%s: Response Timeout.\n", __func__);
return TIMEOUT;
} else if (mask & DWMCI_INTMSK_RE) {
debug("Response Error..\n");
printf("%s: Response Error.\n", __func__);
return -1;
}
@ -204,7 +214,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
do {
mask = dwmci_readl(host, DWMCI_RINTSTS);
if (mask & (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) {
debug("DATA ERROR!\n");
printf("%s: DATA ERROR!\n", __func__);
return -1;
}
} while (!(mask & DWMCI_INTMSK_DTO));
@ -232,16 +242,16 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
if ((freq == host->clock) || (freq == 0))
return 0;
/*
* If host->get_mmc_clk didn't define,
* If host->get_mmc_clk isn't defined,
* then assume that host->bus_hz is source clock value.
* host->bus_hz should be set from user.
* host->bus_hz should be set by user.
*/
if (host->get_mmc_clk)
sclk = host->get_mmc_clk(host);
else if (host->bus_hz)
sclk = host->bus_hz;
else {
printf("Didn't get source clock value..\n");
printf("%s: Didn't get source clock value.\n", __func__);
return -EINVAL;
}
@ -260,7 +270,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
do {
status = dwmci_readl(host, DWMCI_CMD);
if (timeout-- < 0) {
printf("TIMEOUT error!!\n");
printf("%s: Timeout!\n", __func__);
return -ETIMEDOUT;
}
} while (status & DWMCI_CMD_START);
@ -275,7 +285,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
do {
status = dwmci_readl(host, DWMCI_CMD);
if (timeout-- < 0) {
printf("TIMEOUT error!!\n");
printf("%s: Timeout!\n", __func__);
return -ETIMEDOUT;
}
} while (status & DWMCI_CMD_START);
@ -290,7 +300,7 @@ static void dwmci_set_ios(struct mmc *mmc)
struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
u32 ctype, regs;
debug("Buswidth = %d, clock: %d\n",mmc->bus_width, mmc->clock);
debug("Buswidth = %d, clock: %d\n", mmc->bus_width, mmc->clock);
dwmci_setup_bus(host, mmc->clock);
switch (mmc->bus_width) {
@ -329,7 +339,7 @@ static int dwmci_init(struct mmc *mmc)
dwmci_writel(host, DWMCI_PWREN, 1);
if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
debug("%s[%d] Fail-reset!!\n",__func__,__LINE__);
printf("%s[%d] Fail-reset!!\n", __func__, __LINE__);
return -1;
}

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@ -279,19 +279,21 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
struct eth_dma_regs *dma_p = priv->dma_regs_p;
u32 desc_num = priv->tx_currdescnum;
struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num];
uint32_t desc_start = (uint32_t)desc_p;
uint32_t desc_end = desc_start +
roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
uint32_t data_end = data_start +
roundup(length, ARCH_DMA_MINALIGN);
/*
* Strictly we only need to invalidate the "txrx_status" field
* for the following check, but on some platforms we cannot
* invalidate only 4 bytes, so roundup to
* ARCH_DMA_MINALIGN. This is safe because the individual
* descriptors in the array are each aligned to
* ARCH_DMA_MINALIGN.
* invalidate only 4 bytes, so we flush the entire descriptor,
* which is 16 bytes in total. This is safe because the
* individual descriptors in the array are each aligned to
* ARCH_DMA_MINALIGN and padded appropriately.
*/
invalidate_dcache_range(
(unsigned long)desc_p,
(unsigned long)desc_p +
roundup(sizeof(desc_p->txrx_status), ARCH_DMA_MINALIGN));
invalidate_dcache_range(desc_start, desc_end);
/* Check if the descriptor is owned by CPU */
if (desc_p->txrx_status & DESC_TXSTS_OWNBYDMA) {
@ -299,11 +301,10 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
return -1;
}
memcpy((void *)desc_p->dmamac_addr, packet, length);
memcpy(desc_p->dmamac_addr, packet, length);
/* Flush data to be sent */
flush_dcache_range((unsigned long)desc_p->dmamac_addr,
(unsigned long)desc_p->dmamac_addr + length);
flush_dcache_range(data_start, data_end);
#if defined(CONFIG_DW_ALTDESCRIPTOR)
desc_p->txrx_status |= DESC_TXSTS_TXFIRST | DESC_TXSTS_TXLAST;
@ -321,8 +322,7 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
#endif
/* Flush modified buffer descriptor */
flush_dcache_range((unsigned long)desc_p,
(unsigned long)desc_p + sizeof(struct dmamacdescr));
flush_dcache_range(desc_start, desc_end);
/* Test the wrap-around condition. */
if (++desc_num >= CONFIG_TX_DESCR_NUM)
@ -342,11 +342,14 @@ static int dw_eth_recv(struct eth_device *dev)
u32 status, desc_num = priv->rx_currdescnum;
struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
int length = 0;
uint32_t desc_start = (uint32_t)desc_p;
uint32_t desc_end = desc_start +
roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
uint32_t data_end;
/* Invalidate entire buffer descriptor */
invalidate_dcache_range((unsigned long)desc_p,
(unsigned long)desc_p +
sizeof(struct dmamacdescr));
invalidate_dcache_range(desc_start, desc_end);
status = desc_p->txrx_status;
@ -357,9 +360,8 @@ static int dw_eth_recv(struct eth_device *dev)
DESC_RXSTS_FRMLENSHFT;
/* Invalidate received data */
invalidate_dcache_range((unsigned long)desc_p->dmamac_addr,
(unsigned long)desc_p->dmamac_addr +
roundup(length, ARCH_DMA_MINALIGN));
data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
invalidate_dcache_range(data_start, data_end);
NetReceive(desc_p->dmamac_addr, length);
@ -370,9 +372,7 @@ static int dw_eth_recv(struct eth_device *dev)
desc_p->txrx_status |= DESC_RXSTS_OWNBYDMA;
/* Flush only status field - others weren't changed */
flush_dcache_range((unsigned long)&desc_p->txrx_status,
(unsigned long)&desc_p->txrx_status +
sizeof(desc_p->txrx_status));
flush_dcache_range(desc_start, desc_end);
/* Test the wrap-around condition. */
if (++desc_num >= CONFIG_RX_DESCR_NUM)

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@ -25,8 +25,7 @@ static struct phy_driver KSZ804_driver = {
#ifndef CONFIG_PHY_MICREL_KSZ9021
/*
* I can't believe Micrel used the exact same part number
* for the KSZ9021
* Shame Micrel, Shame!!!!!
* for the KSZ9021. Shame Micrel, Shame!
*/
static struct phy_driver KS8721_driver = {
.name = "Micrel KS8721BL",
@ -40,7 +39,7 @@ static struct phy_driver KS8721_driver = {
#endif
/**
/*
* KSZ9021 - KSZ9031 common
*/
@ -69,8 +68,8 @@ static int ksz90xx_startup(struct phy_device *phydev)
phydev->speed = SPEED_10;
return 0;
}
#ifdef CONFIG_PHY_MICREL_KSZ9021
#ifdef CONFIG_PHY_MICREL_KSZ9021
/*
* KSZ9021
*/

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@ -125,7 +125,6 @@
*/
#define CONFIG_DESIGNWARE_ETH
#define CONFIG_DW_AUTONEG
#define CONFIG_DW_SEARCH_PHY
#define CONFIG_NET_MULTI
/*

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@ -225,7 +225,6 @@
/* designware */
#define CONFIG_NET_MULTI
#define CONFIG_DW_ALTDESCRIPTOR
#define CONFIG_DW_SEARCH_PHY
#define CONFIG_MII
#define CONFIG_PHY_GIGE
#define CONFIG_DW_AUTONEG

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@ -157,7 +157,7 @@ struct dwmci_idmac {
u32 cnt;
u32 addr;
u32 next_addr;
};
} __aligned(ARCH_DMA_MINALIGN);
static inline void dwmci_writel(struct dwmci_host *host, int reg, u32 val)
{

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@ -232,6 +232,7 @@ struct lmb;
#define IH_TYPE_MXSIMAGE 16 /* Freescale MXSBoot Image */
#define IH_TYPE_GPIMAGE 17 /* TI Keystone GPHeader Image */
#define IH_TYPE_ATMELIMAGE 18 /* ATMEL ROM bootable Image */
#define IH_TYPE_SOCFPGAIMAGE 19 /* Altera SOCFPGA Preloader */
/*
* Compression Types

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@ -87,6 +87,7 @@ dumpimage-mkimage-objs := aisimage.o \
os_support.o \
pblimage.o \
pbl_crc32.o \
socfpgaimage.o \
lib/sha1.o \
lib/sha256.o \
ublimage.o \

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@ -47,6 +47,8 @@ void register_image_tool(imagetool_register_t image_register)
init_ubl_image_type();
/* Init Davinci AIS support */
init_ais_image_type();
/* Init Altera SOCFPGA support */
init_socfpga_image_type();
/* Init TI Keystone boot image generation/list support */
init_gpimage_type();
}

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@ -168,6 +168,7 @@ void init_mxs_image_type(void);
void init_fit_image_type(void);
void init_ubl_image_type(void);
void init_omap_image_type(void);
void init_socfpga_image_type(void);
void init_gpimage_type(void);
void pbl_load_uboot(int fd, struct image_tool_params *mparams);

259
tools/socfpgaimage.c Normal file
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@ -0,0 +1,259 @@
/*
* Copyright (C) 2014 Charles Manning <cdhmanning@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*
* Reference doc http://www.altera.com.cn/literature/hb/cyclone-v/cv_5400A.pdf
* Note this doc is not entirely accurate. Of particular interest to us is the
* "header" length field being in U32s and not bytes.
*
* "Header" is a structure of the following format.
* this is positioned at 0x40.
*
* Endian is LSB.
*
* Offset Length Usage
* -----------------------
* 0x40 4 Validation word 0x31305341
* 0x44 1 Version (whatever, zero is fine)
* 0x45 1 Flags (unused, zero is fine)
* 0x46 2 Length (in units of u32, including the end checksum).
* 0x48 2 Zero
* 0x4A 2 Checksum over the header. NB Not CRC32
*
* At the end of the code we have a 32-bit CRC checksum over whole binary
* excluding the CRC.
*
* Note that the CRC used here is **not** the zlib/Adler crc32. It is the
* CRC-32 used in bzip2, ethernet and elsewhere.
*
* The image is padded out to 64k, because that is what is
* typically used to write the image to the boot medium.
*/
#include "pbl_crc32.h"
#include "imagetool.h"
#include <image.h>
#define HEADER_OFFSET 0x40
#define VALIDATION_WORD 0x31305341
#define PADDED_SIZE 0x10000
/* To allow for adding CRC, the max input size is a bit smaller. */
#define MAX_INPUT_SIZE (PADDED_SIZE - sizeof(uint32_t))
static uint8_t buffer[PADDED_SIZE];
static struct socfpga_header {
uint32_t validation;
uint8_t version;
uint8_t flags;
uint16_t length_u32;
uint16_t zero;
uint16_t checksum;
} header;
/*
* The header checksum is just a very simple checksum over
* the header area.
* There is still a crc32 over the whole lot.
*/
static uint16_t hdr_checksum(struct socfpga_header *header)
{
int len = sizeof(*header) - sizeof(header->checksum);
uint8_t *buf = (uint8_t *)header;
uint16_t ret = 0;
while (--len)
ret += *buf++;
return ret;
}
static void build_header(uint8_t *buf, uint8_t version, uint8_t flags,
uint16_t length_bytes)
{
header.validation = htole32(VALIDATION_WORD);
header.version = version;
header.flags = flags;
header.length_u32 = htole16(length_bytes/4);
header.zero = 0;
header.checksum = htole16(hdr_checksum(&header));
memcpy(buf, &header, sizeof(header));
}
/*
* Perform a rudimentary verification of header and return
* size of image.
*/
static int verify_header(const uint8_t *buf)
{
memcpy(&header, buf, sizeof(header));
if (le32toh(header.validation) != VALIDATION_WORD)
return -1;
if (le16toh(header.checksum) != hdr_checksum(&header))
return -1;
return le16toh(header.length_u32) * 4;
}
/* Sign the buffer and return the signed buffer size */
static int sign_buffer(uint8_t *buf,
uint8_t version, uint8_t flags,
int len, int pad_64k)
{
uint32_t calc_crc;
/* Align the length up */
len = (len + 3) & (~3);
/* Build header, adding 4 bytes to length to hold the CRC32. */
build_header(buf + HEADER_OFFSET, version, flags, len + 4);
/* Calculate and apply the CRC */
calc_crc = ~pbl_crc32(0, (char *)buf, len);
*((uint32_t *)(buf + len)) = htole32(calc_crc);
if (!pad_64k)
return len + 4;
return PADDED_SIZE;
}
/* Verify that the buffer looks sane */
static int verify_buffer(const uint8_t *buf)
{
int len; /* Including 32bit CRC */
uint32_t calc_crc;
uint32_t buf_crc;
len = verify_header(buf + HEADER_OFFSET);
if (len < 0) {
fprintf(stderr, "Invalid header\n");
return -1;
}
if (len < HEADER_OFFSET || len > PADDED_SIZE) {
fprintf(stderr, "Invalid header length (%i)\n", len);
return -1;
}
/*
* Adjust length to the base of the CRC.
* Check the CRC.
*/
len -= 4;
calc_crc = ~pbl_crc32(0, (const char *)buf, len);
buf_crc = le32toh(*((uint32_t *)(buf + len)));
if (buf_crc != calc_crc) {
fprintf(stderr, "CRC32 does not match (%08x != %08x)\n",
buf_crc, calc_crc);
return -1;
}
return 0;
}
/* mkimage glue functions */
static int socfpgaimage_verify_header(unsigned char *ptr, int image_size,
struct image_tool_params *params)
{
if (image_size != PADDED_SIZE)
return -1;
return verify_buffer(ptr);
}
static void socfpgaimage_print_header(const void *ptr)
{
if (verify_buffer(ptr) == 0)
printf("Looks like a sane SOCFPGA preloader\n");
else
printf("Not a sane SOCFPGA preloader\n");
}
static int socfpgaimage_check_params(struct image_tool_params *params)
{
/* Not sure if we should be accepting fflags */
return (params->dflag && (params->fflag || params->lflag)) ||
(params->fflag && (params->dflag || params->lflag)) ||
(params->lflag && (params->dflag || params->fflag));
}
static int socfpgaimage_check_image_types(uint8_t type)
{
if (type == IH_TYPE_SOCFPGAIMAGE)
return EXIT_SUCCESS;
return EXIT_FAILURE;
}
/*
* To work in with the mkimage framework, we do some ugly stuff...
*
* First, socfpgaimage_vrec_header() is called.
* We prepend a fake header big enough to make the file PADDED_SIZE.
* This gives us enough space to do what we want later.
*
* Next, socfpgaimage_set_header() is called.
* We fix up the buffer by moving the image to the start of the buffer.
* We now have some room to do what we need (add CRC and padding).
*/
static int data_size;
#define FAKE_HEADER_SIZE (PADDED_SIZE - data_size)
static int socfpgaimage_vrec_header(struct image_tool_params *params,
struct image_type_params *tparams)
{
struct stat sbuf;
if (params->datafile &&
stat(params->datafile, &sbuf) == 0 &&
sbuf.st_size <= MAX_INPUT_SIZE) {
data_size = sbuf.st_size;
tparams->header_size = FAKE_HEADER_SIZE;
}
return 0;
}
static void socfpgaimage_set_header(void *ptr, struct stat *sbuf, int ifd,
struct image_tool_params *params)
{
uint8_t *buf = (uint8_t *)ptr;
/*
* This function is called after vrec_header() has been called.
* At this stage we have the FAKE_HEADER_SIZE dummy bytes followed by
* data_size image bytes. Total = PADDED_SIZE.
* We need to fix the buffer by moving the image bytes back to
* the beginning of the buffer, then actually do the signing stuff...
*/
memmove(buf, buf + FAKE_HEADER_SIZE, data_size);
memset(buf + data_size, 0, FAKE_HEADER_SIZE);
sign_buffer(buf, 0, 0, data_size, 0);
}
static struct image_type_params socfpgaimage_params = {
.name = "Altera SOCFPGA preloader support",
.vrec_header = socfpgaimage_vrec_header,
.header_size = 0, /* This will be modified by vrec_header() */
.hdr = (void *)buffer,
.check_image_type = socfpgaimage_check_image_types,
.verify_header = socfpgaimage_verify_header,
.print_header = socfpgaimage_print_header,
.set_header = socfpgaimage_set_header,
.check_params = socfpgaimage_check_params,
};
void init_socfpga_image_type(void)
{
register_image_type(&socfpgaimage_params);
}