powerpc/mpc8xxx: Add auto select bank interleaving mode
Based on populated DIMMs, automatically select from cs0_cs1_cs2_cs3 or cs0_cs1 interleaving, or non-interleaving if not available. Fix the message of interleaving disabled if controller interleaving is enabled but DIMMs don't support it. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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@ -474,6 +474,34 @@ static const struct dynamic_odt odt_unknown[4] = {
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}
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}
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};
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};
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#endif
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#endif
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/*
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* Automatically seleect bank interleaving mode based on DIMMs
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* in this order: cs0_cs1_cs2_cs3, cs0_cs1, null.
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* This function only deal with one or two slots per controller.
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*/
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static inline unsigned int auto_bank_intlv(dimm_params_t *pdimm)
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{
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#if (CONFIG_DIMM_SLOTS_PER_CTLR == 1)
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if (pdimm[0].n_ranks == 4)
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return FSL_DDR_CS0_CS1_CS2_CS3;
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else if (pdimm[0].n_ranks == 2)
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return FSL_DDR_CS0_CS1;
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#elif (CONFIG_DIMM_SLOTS_PER_CTLR == 2)
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#ifdef CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
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if (pdimm[0].n_ranks == 4)
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return FSL_DDR_CS0_CS1_CS2_CS3;
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#endif
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if (pdimm[0].n_ranks == 2) {
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if (pdimm[1].n_ranks == 2)
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return FSL_DDR_CS0_CS1_CS2_CS3;
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else
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return FSL_DDR_CS0_CS1;
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}
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#endif
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return 0;
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}
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unsigned int populate_memctl_options(int all_DIMMs_registered,
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unsigned int populate_memctl_options(int all_DIMMs_registered,
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memctl_options_t *popts,
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memctl_options_t *popts,
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dimm_params_t *pdimm,
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dimm_params_t *pdimm,
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@ -908,6 +936,9 @@ done:
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else if (hwconfig_subarg_cmp_f("fsl_ddr", "bank_intlv",
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else if (hwconfig_subarg_cmp_f("fsl_ddr", "bank_intlv",
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"cs0_cs1_cs2_cs3", buf))
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"cs0_cs1_cs2_cs3", buf))
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popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_CS2_CS3;
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popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_CS2_CS3;
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else if (hwconfig_subarg_cmp_f("fsl_ddr", "bank_intlv",
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"auto", buf))
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popts->ba_intlv_ctl = auto_bank_intlv(pdimm);
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else
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else
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printf("hwconfig has unrecognized parameter for bank_intlv.\n");
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printf("hwconfig has unrecognized parameter for bank_intlv.\n");
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switch (popts->ba_intlv_ctl & FSL_DDR_CS0_CS1_CS2_CS3) {
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switch (popts->ba_intlv_ctl & FSL_DDR_CS0_CS1_CS2_CS3) {
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@ -1075,7 +1106,7 @@ void check_interleaving_options(fsl_ddr_info_t *pinfo)
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break;
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break;
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}
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}
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debug("%d of %d controllers are interleaving.\n", j, k);
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debug("%d of %d controllers are interleaving.\n", j, k);
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if (j != k) {
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if (j && (j != k)) {
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for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++)
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for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++)
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pinfo->memctl_opts[i].memctl_interleaving = 0;
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pinfo->memctl_opts[i].memctl_interleaving = 0;
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printf("Not all controllers have compatible "
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printf("Not all controllers have compatible "
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@ -103,6 +103,11 @@ The ways to configure the ddr interleaving mode
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# bank(chip-select) interleaving (cs0+cs1+cs2+cs3) (4x1)
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# bank(chip-select) interleaving (cs0+cs1+cs2+cs3) (4x1)
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setenv hwconfig "fsl_ddr:bank_intlv=cs0_cs1_cs2_cs3"
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setenv hwconfig "fsl_ddr:bank_intlv=cs0_cs1_cs2_cs3"
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# bank(chip-select) interleaving (auto)
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setenv hwconfig "fsl_ddr:bank_intlv=auto"
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This auto mode only select from cs0_cs1_cs2_cs3, cs0_cs1, null dependings
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on DIMMs.
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Memory controller address hashing
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Memory controller address hashing
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==================================
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==================================
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If the DDR controller supports address hashing, it can be enabled by hwconfig.
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If the DDR controller supports address hashing, it can be enabled by hwconfig.
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