Commit graph

30537 commits

Author SHA1 Message Date
Peter Robinson
8183058188 imx6: centralise common boot options in mx6_common.h
Define common LOADADDR and BOOTDELAY to ensure a consistent experience
across mx6 boards

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2015-05-26 15:58:56 +02:00
Peter Robinson
302b2e5bab imx6: move MXC_GPIO define to mx6_common.h
Define CONFIG_MXC_GPIO and CONFIG_CMD_GPIO by default in mx6_common

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2015-05-26 15:58:56 +02:00
Peter Robinson
ea6909173f imx6: move standard ATAG configs to mx6_common.h
Define the standard ATAG consfigs in mx6_common.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini at konsulko.com>
2015-05-26 15:58:55 +02:00
Peter Robinson
3b1f681131 imx6: move generic imx6 options to mx6_common.h
All boards define CONFIG_MX6, CONFIG_DISPLAY_BOARDINFO, CONFIG_DISPLAY_CPUINFO
and CONFIG_SYS_GENERIC_BOARD so define them in mx6_common

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini at konsulko.com>
2015-05-26 15:58:55 +02:00
Peter Robinson
056845c235 imx6: move all standard includes to mx6_common.h
The linux/sizes.h, asm/arch/imx-regs.h, asm/imx-common/gpio.h,
config_cmd_default.h includes are used fairly universally across imx6 boards
so include them in mx6_common.h by default.

We define CONFIG_SYS_NO_FLASH before config_cmd_default.h  so that we
don't have to undef CONFIG_CMD_FLASH / CONFIG_CMD_IMLS everywhere.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2015-05-26 15:58:48 +02:00
Peter Robinson
60667a53bc novena: standardise mx6_common.h include
Standardise mx6_common.h to the same as other mx6 boards

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini at konsulko.com>
2015-05-26 15:31:48 +02:00
Tim Harvey
9d3b565441 spl: spl_mmc: fix mmc Falcon mode regression
91199f4a5a broke mmc based Falcon mode.

The block_read function returns the number of blocks read thus the error
check needs to look for a return of 0 blocks read.

Cc: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Paul Kocialkowski <contact@paulk.fr>
2015-05-26 14:26:27 +02:00
Tim Harvey
6122f0d556 imx: ventana: update README with Falcon mode documentation
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-26 14:24:18 +02:00
Tim Harvey
40e999ca71 imx: ventana: update README for micro-SD boot medium
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-26 14:21:35 +02:00
Tim Harvey
0a9c215050 imx: ventana: update MMC env configuration
We will use the same env size and redundancy used for NAND env for MMC.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-26 14:21:32 +02:00
Tim Harvey
be56de6f33 thermal: imx_thermal: increase critical temperature threshold
The CPU temperature grade from OTP is now used to define the critical
threshold at which point we busyloop until we are below, however this
threshold is still too low.

Instead of 20C below the max CPU temperature, change it to 5C defined now
by TEMPERATURE_HOT_DETLA for clarity. Rename 'passive' to 'critical'
as that better defines our use case here. Additionally change the output
of the busyloop message to show the max CPU temperature as well as current.

Before:
CPU Temperature is 101 C, too hot to boot, waiting...
CPU Temperature is 101 C, too hot to boot, waiting...

After:
CPU Temperature (101C) too close to max (105C) waiting...
CPU Temperature (101C) too close to max (105C) waiting...

Cc: Stefan Roese <sr@denx.de>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Jon Nettleton <jon.nettleton@gmail.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Ye Li <b37916@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Peng Fan <b51431@freescale.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-26 14:21:25 +02:00
Heiko Schocher
7254d92ebc arm, imx6: add support for aristainetos2 board
add support for imx6dl based aristainetos2 board

U-Boot 2015.04-rc5-00066-g60f6ed4 (Apr 10 2015 - 08:46:27)

CPU:   Freescale i.MX6DL rev1.1 at 792 MHz
Reset cause: WDOG
Board: aristaitenos2
       Watchdog enabled
I2C:   ready
DRAM:  1 GiB
NAND:  1024 MiB
MMC:   FSL_SDHC: 0
SF: Detected N25Q128A with page size 256 Bytes, erase size 64 KiB, total 16 MiB
Display: lg4573 (480x800)
In:    serial
Out:   serial
Err:   serial
Net:   FEC [PRIME]
Hit any key to stop autoboot:  0
=>

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-05-26 14:18:11 +02:00
Heiko Schocher
e6c8b716c7 i2c, mxc: rework i2c base address names for different SoCs
rework and unify i2c address names for different SoCs, which
use the mxc_i2c driver.

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-05-26 14:17:00 +02:00
Heiko Schocher
21a26940f9 arm, imx6, i2c: add I2C4 for MX6DL
add I2C4 modul for MX6DL based boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-05-26 14:16:54 +02:00
Peng Fan
ab87fc6bbd imx: dma: correct MXS_DMA_ALIGNMENT
We should not hardcode MXS_DMA_ALIGNMENT to 32, since we can not guarantee
that socs' cache line size is 32 bytes.
If on chips whose cache line size is 64 bytes, error occurs:
"
NAND:  ERROR: v7_dcache_inval_range - start address is not aligned - 0xbdf1d1a0
ERROR: v7_dcache_inval_range - stop address is not aligned - 0xbdf1f4a0
ERROR: v7_dcache_inval_range - start address is not aligned - 0xbdf1d1a0
"
Align MXS_DMA_ALIGNMENT with ARCH_DMA_MINALIGN whose value is same to
CONFIG_SYS_CACHELINE_SIZE if CONFIG_SYS_CACHELINE_SIZE defined.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2015-05-26 14:14:49 +02:00
Axel Lin
48dbc74ea5 pwm: imx: Remove unreachable code
The break after return is unreachable code, remove it.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2015-05-26 14:13:12 +02:00
Axel Lin
16b0c0ce83 pwm: imx: Prevent NULL pointer dereference
pwm_id_to_reg() can return NULL, so add NULL testing to prevent NULL pointer
dereference.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2015-05-26 14:13:09 +02:00
Masahiro Yamada
95b237ecbc ARM: zynq: add default ps7_init_gpl.c/h for Zed, MicroZed, ZC70x
Due to licensing issues, the files ps7_init.c/h are not able to be
distributed with U-Boot source code.  Recent Xilinx tools also
provide the GPL variants (ps7_init_gpl.c/h), compatible with U-Boot
license.

Prior to this commit, we had to copy ps7_init files into
board/xilinx/zynq/ before the compile.

To be more user-friendly, let's include ps7_init_gpl.c/h for
Zedboard, MicroZed, ZC702, ZC706.

These init code have been taken from the hwplatform_templates
directory of Xilinx SDK 2014.4.

You can still use customized ps7_init_gpl.c/h by enabling
CONFIG_ZYNQ_CUSTOM_INIT.  The recommended directory for storing them
is now board/xilinx/zynq/custom_hw_platform, but board/xilinx/zynq
is still supported for backward compatibility.  The latter emits
a warning message to prompt users to gradually switch to the new
directory.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-05-25 10:52:36 +02:00
Masahiro Yamada
9bd53b6255 ARM: zynq: add separate configuration for ZC702 and ZC706
Prior to this commit, ZC702 and ZC706 shared the same configuration
and were built as follows:

ZC702: make zynq_zc70x_defconfig && make
ZC706: make zynq_zc70x_defconfig && make DEVICE_TREE=zynq-zc706

This commit introduces separate configuration for them, which makes
the next commit much easier.

Going forward, the recommended build commands are:

ZC702: make zynq_zc702_defconfig && make
ZC706: make zynq_zc706_defconfig && make

Although the old work flow is still supported, CONFIG_TARGET_ZC70X
has been marked as deprecated.  If used, the warning message is
shown to prompt users to switch to the new scheme.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-05-25 10:52:35 +02:00
Michal Simek
a2ec7fb906 zynq: Use system timer implementation instead of our
Don't use error-prone arch timer code and instead use system
timer implementation to simplify our code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-05-25 10:52:03 +02:00
Tom Rini
980267a144 Merge git://git.denx.de/u-boot-nand-flash 2015-05-24 21:01:30 -04:00
Stefan Agner
8fca2d8cb8 mtd: vf610_nfc: enable ONFI detection
This changes enable ONFI detection. The Read ID command now allows
one address byte which is needed for ONFI detection. To read the
ONFI parameter page, the NAND_CMD_PARAM need to be supported. The
CMD code enables one command and one address byte along with reading
data from flash using R/B#, as specified by ONFI.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2015-05-24 14:27:46 -05:00
Stefan Agner
080a71e8e9 mtd: vf610_nfc: add 32-error correction option for HW ECC
Add option to choose between current 24-error correction and 32-error
correction through Kconfig. 32-error correction allow to use NAND
chips which require up to 8-bit error correction per 512 byte (when
using 2K pages).

Signed-off-by: Stefan Agner <stefan@agner.ch>
2015-05-24 14:27:46 -05:00
Stefan Agner
5519194d4f mtd: vf610_nfc: add Freescale NFC controller configs to Kconfig
This commit allows users to enable/disable the Freescale NFC
controller found in systems like Vybrid (VF610), MPC5125, MCF54418
or Kinetis K70 via Kconfig with more detailed help docs.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Stefano Babic <sbabic@denx.de>
[scottwood: updated vf610twr_nand_defconfig]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2015-05-24 14:27:28 -05:00
Stefan Agner
84d656a283 mtd: vf610_nfc: use in-band bad block table
Use in-band bad block table (NAND_BBT_NO_OOB) which allows to
use the full OOB for hardare ECC purposes. Since there is no
ECC correction on the OOB it is also safer to use in-band area
to store the bad block table marker.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2015-05-24 14:26:55 -05:00
Stefan Agner
5dec286b82 mtd: vf610_nfc: implement OOB only read
Implement read of OOB area only. When using column and sector size
properties, only parts of the page can be read. However, this works
only when hardware ECC is disabled, otherwise the ECC engine would
ruin the data in the buffer. To allow OOB only reads, three points
had to be addressed:
- Set ECC mode per command.
- Handle NAND_CMD_READOOB seperate. Make sure column and sector
  size is correctly set up, while disabling ECC.
- Now, the OOB data end up at the beginning of the buffer. Remove
  the special handling of OOB (spareonly).

Especially bad block scans benefit from this change. On a 512MiB
SLC NAND device, the bad block scan took 1.5s less than before.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2015-05-24 14:26:55 -05:00
Stefan Agner
d111bf99a8 mtd: vf610_nfc: allow bitflips in an empty page
Allow bit flips in a empty page up to half of the recoverable
bits (strength / 2).

Signed-off-by: Stefan Agner <stefan@agner.ch>
2015-05-24 14:26:54 -05:00
Stefan Agner
6fcfd1e890 mtd: vf610_nfc: remove read on SEQIN
Since we do not support sub-page writes anyway, reading the page
back to the controller on SEQIN command is not required. Remove
the page read on SEQIN.

However, the column/page values relevant to the SEQIN command, hence
set the column/row address on SEQIN command.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2015-05-24 14:26:54 -05:00
Stefan Agner
f55bc296a8 mtd: vf610_nfc: remove caching of page in buffer
To improve performance we remember the current page in the buffer
and avoid reading it twice. This implicit page cache increases
complexity while does not increase performance in real world cases.
This patch removes that feature.

Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
2015-05-24 14:26:54 -05:00
Jörg Krause
6121560d77 tools: mxsboot: Calculate ECC strength dynamically
Calculating the ECC strength dynamically to be aligned with the mxs NAND
driver and the Linux Kernel.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
Reviewed-by: Marek Vasut <marex@denx.de>
2015-05-24 14:26:54 -05:00
Jörg Krause
1fbdb70610 mtd: nand: mxs: Replace magic number for bits per ECC level with macro
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
Reviewed-by: Marek Vasut <marex@denx.de>
2015-05-24 14:26:54 -05:00
Peng Fan
bd38da1a55 mtd:mxs:nand calculate ecc strength dynamically
Calculate ecc strength according oobsize, but not hardcoded
which is not aligned with kernel driver

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <b37916@freescale.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
2015-05-24 14:26:54 -05:00
Tom Rini
a84988c76d Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2015-05-22 17:23:15 -04:00
Raghav Dogra
6b8583b0ad nand/elbc: Memory leak fix
Freeing allocated memory to priv before returning
from the function

Signed-off-by: Raghav Dogra <raghav@freescale.com>
[scottwood: removed unnecessary cast]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2015-05-22 15:45:51 -05:00
Stephen Warren
5e856fa8be nand: fix buffer alignment in new verification feature
On systems with caches enabled, NAND I/O may need to flush/invalidate
the cache during read/write operations. For this to work correctly, all
buffers must be cache-aligned. Fix nand_verify*() to allocate aligned
buffers.

This prevents cache alignment warnings from being spewed when using
U-Boot to write an updated version of itself to flash on NVIDIA Tegra
Seaboard (after perturbation of stack/data layout in current
u-boot-dm/next branch).

I have validatd (executed) nand_verify(), but I don't think I've executed
nand_verify_page_oob(); testing of that would be useful.

Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Fixes: 59b5a2ad83 ("nand: Add verification functions")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Scott Wood <scottwood@freescale.com>
2015-05-21 14:24:36 -05:00
Tim Harvey
53940a5079 imx: ventana: config: enable Falcon mode
Falcon mode entails the SPL booting the OS directly instead of U-Boot.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-21 19:07:17 +02:00
Fabio Estevam
0d1ea05210 wandboard: Switch to SPL support
Currently we need to build one U-boot image for each of the wandboard
variants: quad, dual-lite and solo.

By switching to SPL we can support all these variants with a single binary,
which is very convenient.

Based on the work from Richard Hu.

Tested kernel booting on the three boards.

Signed-off-by: Richard Hu <hakahu@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Vagrant Cascadian <vagrant@aikidev.net>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-05-21 18:08:37 +02:00
Joe Hershberger
133ebeabc2 sandbox: Enable env unit tests
Enable the new env unit tests on sandbox.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-05-21 09:16:18 -04:00
Joe Hershberger
f68c2b2592 test: env: Add a test of the new regex behavior for attrs
The behavior of the env attrs depends on CONFIG_REGEX. Add an additional
test if that variable is set.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-05-21 09:16:18 -04:00
Joe Hershberger
b04d3553ee test: env: Add test for verifying env attrs
Add a test of the env_attr_lookup() function.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-05-21 09:16:18 -04:00
Joe Hershberger
421f86f329 test: env: Add test framework for env
Add a new "env" subcommand to the ut command.

This will run unit tests on the env code. This should be targetable to
any device that supports the env features needed for the tests.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-05-21 09:16:18 -04:00
Joe Hershberger
b6227d3993 test: dm: Recover the driver model tree after tests
Put the driver model for the system back into a good state after
completing the DM testing.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-05-21 09:16:18 -04:00
Joe Hershberger
fe3f6a65fe test: Return values from the asserts compatible with cmds
The asserts are sometimes called from the context of the test command
itself so make sure that a return that happens as a result of a failure
is compatible with that command return. When called within a test, the
return value is ignored.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-05-21 09:16:18 -04:00
Joe Hershberger
09129bec8e test: dm: eth: Handle failed test env cleanup
Make sure that the env gets cleaned up after a test fails so that other
tests aren't affected.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2015-05-21 09:16:17 -04:00
Joe Hershberger
7cccc66af5 test: dm: Don't bail on all tests if one test fails
There's not much point in having a failure count if we always give up on
the first failure. Also stop clearing the entire state between tests.

Make sure that any failures are still passed out to the command line.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-05-21 09:16:17 -04:00
Joe Hershberger
feb3847250 test: Move the unit tests to their own menu
Make all unit tests selectable as a menu of test suites instead of just
sitting in the top-level menu individually.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-05-21 09:16:17 -04:00
Joe Hershberger
c812f722f8 test: dm: Move the time test over to the ut command
Unify the command for running unit tests further by moving the "ut_time"
command over to "ut time".

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2015-05-21 09:16:17 -04:00
Joe Hershberger
40441e0bd3 test: dm: Move the dm tests over to the ut command
Unify the command for running unit tests further by moving the "dm test"
command over to "ut dm".

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-05-21 09:16:17 -04:00
Joe Hershberger
c617ede08a test: Add a common unit test command
Add a command that all other unit tests should be a sub-command of.
Also include a command that will run all tests.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-05-21 09:16:17 -04:00
Joe Hershberger
e721b882e9 test: Generalize the unit test framework
Separate the ability to define tests and assert status of test functions
from the dm tests so they can be used more consistently throughout all
tests.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-05-21 09:16:16 -04:00