Do not save registers below r1 stack pointer because
it is not checked by stack undeflow is not able to detect
it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This is required for architectures still need manual relocation like avr32, mk68
and others.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Michal Simek <michal.simek@xilinx.com>
This way we may have very limited set of functions implemented so we
save some space.
Also it allows us to build U-Boot for any ARC core with the same one
toolchain because we don't rely on pre-built libgcc.
For example:
* we may use little-endian toolchain but build U-Boot for ether
endianess
* we may use non-multilibbed uClibc toolchain but build U-Boot for
whatever ARC CPU flavour that current GCC supports
Private libgcc built from generic C implementation contributes only 144
bytes to .text section so we don't see significant degradation of size:
--->8---
$ arc-linux-size u-boot.libgcc-prebuilt
text data bss dec hex filename
222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt
$ arc-linux-size u-boot.libgcc-private
text data bss dec hex filename
222361 24912 214820 462093 70d0d u-boot.libgcc-private
--->8---
Also I don't notice visible performance degradation compared to
pre-built libgcc (where at least "*div*" functions are had-written in
assembly) on typical operations of downloading 10Mb uImage over TFTP and
bootm.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
As a preparation to ARCv2 port submission we're moving CPU slection
flags to a common location.
Also it will allow us to have more flexible CPU specification, not only
ISA version but CPU family as well checking CONFIG_ARC_CPU_xxx.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Following SPARK ARC now has SYS_MONITOR_BASE setup via Kconfig.
This makes "include/configs/*.h" cleaner and more flexible.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Common arch_early_init_r() is used in "arc/lib/cpu.c" for all ARC boards
so there's no sense in separate per-board definitions.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Currently there's nothing related to really low-level init on ARC so
CONFIG_SKIP_LOWLEVEL_INIT definition makes no sense.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
There're no other options for ARC except "generic board" so ther's no
point to define CONFIG_SYS_GENERIC_BOARD per board.
We now have it set fo all ARC boards.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This change allows to keep board description clean and minimalistic.
This is especially helpful if one board may house different CPUs with
different features.
It is applicable to both FPGA-based boards or those that have CPUs
mounted on interchnagable daughter-boards.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
This change allows to keep board description clean and minimalistic.
This is especially helpful if one board may house different CPUs with
different features.
It is applicable to both FPGA-based boards or those that have CPUs
mounted on interchnagable daughter-boards.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Now we may select a particular version of ARC700:
* ARC750D or
* ARC770D
It allows more flexible (or more fine tuned) configuration of U-Boot.
Before that change we relied on minimal configuration but now we may
use specific features of each CPU.
Moreover allows us to escape manual selection of options that
exist in both CPUs but may have say different version like MMUv2 in
ARC750D vs MMUv3 in ARC770D.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
With switch to Kconfig we only need very board-specific descriptions in
include/configs.
CPU selection is performed with either defconfig or manually via
menuconfig.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
It's prohibited to put branch instruction in the very end of zero-delay
loop. On execution this causes "Illegal instruction" exception.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
call hw_watchdog_init() also if CONFIG_AT91SAM9_WATCHDOG
is used.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch will save U-Boot environment as a file: uboot.env, in FAT partition
instead of saving it in raw sector of MMC card.
This make us easier to manage the environment file.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
This patch will save U-Boot environment as a file: uboot.env, in FAT partition
instead of in raw sector of MMC card.
This make us easier to manage the environment file.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
This patch will save U-Boot environment as a file: uboot.env, in FAT partition
instead of saving it in raw sector of MMC card.
This make us easier to manage the environment file.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Current the MMC support will enable MCI port A, Which is only exist
for 2mmc board.
So by default we need to disable MMC (port A) support. And only enable
it for 2mmc board. Otherwise, dataflash won't work in at91sam9260ek board
as MMC has confliction with Dataflash in the CLK pin.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
As the PMECC hardware has different version. In SAMA5D4 chip, the PMECC ip
can generate 0xff pmecc ECC value for all 0xff sector.
According to this, add PMECC version check, if it's SAMA5D4 then we always
let PMECC hardware to correct it.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
As the at91cap9adk board is removed by commit: b5508344
(ARM: remove broken "at91cap9adk" board), so the at91cap9
code is not used anymore, and also the document for
at91cap9 can not be found on www.atmel.com, so remove the
at91cap9 related code.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Some SoC need to redirect the saic to aic to make the interrupt to
work, here add a weak function to be replaced by real function.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
The SFR (special function registers) can be shared bwteen
sama5d3 and sama5d4 soc.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
[whitespace adoptions for 80 char compliance]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This matrix header file can be shared between sama5d3 and sama5d4 soc.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
[whitespace adaptions for 80 char compliance]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
We can't use config.h directly as some platforms include headers that
aren't safe to use in normal Linux userland.
Signed-off-by: Tom Rini <trini@ti.com>
Space is used before 'default' in PCIE_ECAM_BASE in arch/x86/Kconfig
so it looks misaligned. Replace the space with tab to indent.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
There are two typos in the comment block in bootstage.h, fix them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add some instructions about building U-Boot for Intel Galileo board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Intel Galileo board has a microSD slot which is routed from Quark SoC
SDIO controller. Enable SD/MMC support so that we can use an SD card.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
The Quark SoC contains a legacy SPI controller in the legacy bridge
which is ICH7 compatible. Like Tunnel Creek and BayTrail, the BIOS
control register offset in the ICH SPI driver is wrong for the Quark
SoC too, unprotect_spi_flash() is added to enable the flash write.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Quark SoC has a legacy GPIO block in the legacy bridge (D0:F31),
which is just the same one found in other x86 chipset. Since we
programmed the GPIO register block base address, we should be
able to enable the GPIO support on Intel Galileo board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Quark SoC has some non-standard BARs (excluding PCI standard BARs)
which need be initialized with suggested values. This includes GPIO,
WDT, RCBA, PCIe ECAM and some ACPI register block base addresses.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Michal Simek
Andreas Bießmann
Alexey Brodkin
Igor Guryanov
Heiko Schocher
Wu, Josh
Bo Shen
Tom Rini
Bin Meng