This patch fixes the LINUX_BOOT_PARAM_ADDR define to be based off of
PHYS_SDRAM_1 instead of CONFIG_SYS_MEMTEST_START. On da830 they are the same
thing but on da850 the CONFIG_SYS_MEMSTART define is offset from the
PHYS_SDRAM_1 start.
Without this patch it is not possible to boot linux on da850 -- bootm hangs
at "Uncompressing Linux... done, booting the kernel."
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The current da850evm support in u-boot/master omits any use of
the davinci EMAC. This patch adds basic support for the EMAC using
the MII PHY found on the baseboard of the EVM. The MAC address is
read from the environment variable 'ethadd'. Note that this is
different from the da850evm support in the u-boot omapl1 tree
where the MAC address is read from SPI flash.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This patch enables also the mtdpart, ubi and ubifs commands when NAND support
is enabled.
Signed-off-by: Ben Gardiner<bengardiner@nanometrics.ca>
To: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The current da850evm config is missing the pieces for NAND support that can be
found in Sandeep's u-boot-davinci tree [1].
This patch adds NAND support in the spirit of the support in the u-boot-davinci
tree where NAND support for the da850evm can be enabled by putting a single
'#define CONFIG_USE_NAND' at the top of the include/configs/da850evm.h file.
[1] http://arago-project.org/git/people/?p=sandeep/u-boot-davinci.git;a=tree
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The IGEP module is a low-power, high performance production-ready
system-on-module (SOM) based on TI's OMAP3 family.The IGEP module
solution based upon TI OMAP3 provides a low-power/low-cost platform
for a variety of consumer/industrial/medical devices.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The IGEP v2 board is a low-cost, fan-less and industrial temperature
range single board computer that unleashes laptop-like performance and
expandability without the bulk, expense, or noise of typical desktop
machines. Its architecture shares much in common with other OMAP3 boards.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Steve Sakoman <steve.sakoman@linaro.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
The SDP4430 does not have onboard NAND, it has eMMC on the second
MMC slot. This patch adds support for saving the u-boot environment
to eMMC.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
This patch switches from the legacy mmc driver to the new generic mmc driver
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
This patch switches from the legacy mmc driver to the new generic mmc driver
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
TI hasn't reserved a USB Product ID for gadgets, so use the default
vendor and product ID to avoid confusion.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
The patch adds the possibility to update the QONG
FPGA (a Lattice XP2-5E) with u-boot using some GPIOs
to drive the JTAG interface.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Adds support for the ARM quad-core Cortex-A9 processor
This system includes a motherboard(Versatile Express), daughterboard
(Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet,
and flash systems work with these additions. The naming convention
is:
SOC -> CortexA9 quad core = ca9x4
daughterboard -> Coretile = ct
motherboard -> Versatile Express = vxp
This gives ca9x4_ct_vxp.c as the board support file.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
Merge several sizes.h in asm/arch subdirectories into a single
asm/sizes.h file.
Fixup usage of asm/arch/sizes.h in some files to use the merged file.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
There were some #undef's of CONFIG_SYS_ARM_WITHOUT_RELOC added to a few board
configs as part of the arm relocation series; but these are not needed now as we
do not #undef what is not #defined in the first place.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Heiko Schocher <hs@denx.de>
All Kirkwood based boards are supported for this new implementation
ref: docs/README.arm-relocation
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
It is observed that, in most of the board configs the code is being
duplicated, also for any common change all board files needs update
This issue was under discussion from long on mailing list and we
converge on introducing common config file.
With this patch-
1. Total Kirkwood specific configuration code is reduced by 210 lines
2. All common configuration can be shared by multiple boards
3. Easy to manage common updates like ARM relocation changes
mv-common.h file is added to include/configs/
It contains all common configuration supported for all Kirkwood boards
The respective board configs are updated for its usage
Build tested for guruplug, mv88f6281gtw_ge, openrd_base,
rd6281a and sheevaplug
Binary execution tested for sheevaplug
Todo:
1. Other custom Kirkwood boards to be synced
2. The support to be extended for Orion5X based boards
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
For all Kirkwood boards so far dram_init function is duplicated
dram_init function is moved to dram.c and relevant code from all
board specific files removed
If any board needs specific dram init handling than standard one,
then, a macro CONFIG_SYS_BOARD_DRAM_INIT should be defined in
board config header file and the dram_init function can be put
in board specific source file
For ex. keymile boards
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
This patch adds support for displaying boot progress codes on a4m072 board
using LED display. As we can display only one symbol at any time on the hardware
(two symbols with blinking) we can't display progress codes directly and have
to map them to 2-symbol codes.
We use the following mapping on the a4m972 board:
[1, 8] U [100, 108] -> 5
[-9, -1] U [-101, -100] U [-113, -103] -> -5
[9, 14] U [120, 123] U [125, 129] -> 8
[-13, -10] U [-122, -120] U [-127, -124] U {-129} -> -8
{15} -> 9
[-32, -30] -> -A
[-40, -35] U [-51, -42] U [-58, -53] U
[-83, -80] U {-64, -130, -140, -150} -> -B
Other progress code are ignored. One symbol codes are displayed steady while
two-symbol codes are displayed using blinking. Boot progress codes are
displayed with decimal got unset (as opposed to 'display' command output).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
This patch adds support for LED display on a4m072 board. Hardware is
capable of displaying only one symbol at any time. We support displaying
two symbols in software (via blinking).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Split the display command into generic interface and hardware-specific
realization for PDSP188x LED display found on hmi1001 and manroland
boards. Simple interface for LED displays is defined in
include/led-display.h and described in doc/README.LED_display.
Driver-specific implementation was moved into drivers/misc/pdsp188x.c
file (enabled with CONFIG_PDSP188x set).
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
This patch provides support for the A4M072 board with the following features:
UART
NOR flash
FEC Ethernet
External SRAM
I2C EEPROM
CompactFlash cards on IDE/ATA port
USB Host
PCI initialization
The 7-segment LED indicator is not yet supported.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
This patch is required before the upcoming new enc28j60 driver
using SPI framework patch can be applied:
- Move legacy enc28j60.c to enc28j60_lpc2292.c.
- Change Makefile and the two affected boards' definition files.
Tested with ./MAKEALL ARM7 that both boards still compile.
Signed-off-by: Reinhard Meyer<info@emk-elektronik.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
We configure the controller but dont have virtual address space thus any
devices on the 4th controller are not accessible in u-boot.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Make the U-Boot update command sequence conditional. Helps prevent
accidental erasing if an upload or previous step fails
* Make it easier to update other FLASH banks
* Enable DDR controller cache line interleaving and bank cs0/cs1 by default
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference
clock for the audio codec, but by default both are disabled. Add a 'audclk'
hwconfig option that allows the user to choose which clock he wants.
The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48,
64, and 96KHz. The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and
88200Hz.
Also configure a pin muxing to select some SSI signals, which will disable
I2C1.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The original code maps boot flash as non-cacheable region. When calling
relocate_code in flash to copy u-boot from flash to ddr, every loop copy command
is read from flash. The flash read speed will be the bottleneck, which consuming
long time to do this operation. To resovle this, map the boot flash as
write-through cache via tlb. And set tlb to remap the flash after code
executing in ddr, to confirm flash erase operation properly done.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
CONFIG_ENV_SIZE of MPC8569MDS was wrongly set to CONFIG_ENV_SECT_SIZE which
is 128KB, so it took longer time to do crc32 calculation for ENV than it should
do. It causes the bootup for MPC8569MDS significantly slow. This patch fixs it
to 0x2000(8KB), also fix the comment for CONFIG_ENV_SECT_SIZE to correct size.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The patch adds support for TTECH vision2 board.
The board has 512MB RAM, SDHC slot and 4MB SPI
device from StMicron.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The CCM board has long reached EOL, and support for it is no longer
relevant in current versions of U-Boot. Remove it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
The PCU_E board has long reached EOL, and support for it is no longer
relevant in current versions of U-Boot. Remove it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch changes the PPC4xx POST UART driver to use the common
NS16550 functions for receiving and sending. Additionally the
local function for SoC divisor setup are removed. Instead the
functions from arch/powerpc/cpu/ppc4xx/4xx_uart.c are used. This
removes code duplication.
Also the common CONFIG_SYS_NS16550_COMx defines are now used
to describe the POST UART's.
And a compile breakage is fixed, introduced by a git merge of
the ppc4xx/next branch into master. Now "ppc4xx.h" is moved to
"asm/ppc4xx.h". Fixed as well with this patch.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch brings the lwmon5 board support up-to-date. Here a
summary of the changes:
lwmon5 board port related:
- GPIO's changed to control the LSB transmitter
- Reset USB PHY's upon power-up
- Enable CAN upon power-up
- USB init error workaround (errata CHIP_6)
- EBC: Enable burstmode and modify the timings for the GDC memory
- EBC: Speed up NOR flash timings
lwmon5 board POST related:
- Add FPGA memory test
- Add GDC memory test
- DSP POST reworked
- SYSMON POST: Fix handling of negative temperatures
- Add output for sysmon1 POST
- HW-watchdog min. time test reworked
Additionally some coding-style changes were done.
Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add support code for bluestone board wth APM821XX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.
Signed-off-by: Tirumala R Marri <tmarri@apm.com
Signed-off-by: Stefan Roese <sr@denx.de>
Building this board for parallel flash fills up the bss section and thus
fails to link, so bump up the monitor size a bit.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current size used (256KiB) is smaller than the LDR created for
the bf548-ezkit, so 'run update' doesn't work correctly. So bump
up the size a bit by making this flexible per-board config.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We need to use the Blackfin BootROM-specific OOB layout when we boot out
of NAND as that is what the on-chip ROM expects.
Also need to increase the monitor size a little to accommodate the extra
NAND code overhead.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We use the lock/unlock options in our default nand code, so enabl
support for the options.
Reported-by: Vivi Li <vivi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The CONFIG_BFIN_CPU option is largely used in the build system, so move
it out of the board config.h and into the board config.mk. It'd be nice
to keep everything in the config.h, but the patch to extract that value
early was rejected.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The handling of the SPI_CPOL bit inside the SPI
driver was wrong. As reported by the manual,
the meaning of the SSPOL inside the
configuration register is the same as reported
by SPI specification (0 if low in idle, 1 is high
on idle). The driver inverts this logic.
Because this patch sets the logic as specified, it is required
to clear the CPOL bit in the configuration file to adapt
to the correct logic.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: David Jander <david.jander@protonic.nl>
The patch adds support for setting gpios to the
MX51 processor and change name to the corresponding
functions for MX31. In this way, it is possible to get rid
of nasty #ifdef switches related to the processor type.
Signed-off-by: Stefano Babic <sbabic@denx.de>
On the Freescale P1022, the DIU and the LBC share address pins, which means
that when the DIU is active (e.g. the console is on the DVI display), NOR flash
cannot be accessed. So we use the weak accessor function feature of the CFI
flash code to temporarily switch the pin mux from DIU to LBC whenever we want
to read or write flash. This has a significant performance penalty, but it's
the only way to make it work.
This change allows the 'saveenv' command to work when the video display is
enabled. Erasing flash and writing to flash (with the 'cp' command) works,
but reading from flash (with the 'md' and 'cp' commands) does not. Also, while
flash is being written, the video display will be blank.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Add support for the DIU controller. If CONFIG_VIDEO is defined, then
the console will appear on a DVI monitor instead of the serial port.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
continuation of commit 39da1ba923d55f316f9f1bb3a960e4ed91dc17ac:
"e300: increase CONFIG_SYS_BOOTMAPSZ to allow booting large kernels"
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch provides support for MPC8308 P1M board with the following
set of features:
Dual UART is supported
NOR flash is supported
Both TSEC Ethernet controllers are supported
PCI Express initialization is supported
Both I2C controllers are supported
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch cleans up the Freescale MPC8308RDB Development board support.
Things fixed:
- Removed unused PCIE2 definitions from configuration
- SICR{L,H} defines used for System I/O Configuration Registers values
instead of hardcoding
- CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of
writing to SCCR from the board code
- sleep mode stuff removed as MPC8308 has no support for deep sleep and
PMCCR1 register. board_early_init_f() removed.
- MPC8308 has no ERRATA for DDR controller so workaround removed
- 'assignment in if statement' issues solved
- use LBLAWAR_* defines instead of hardcoding
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Newer Linux kernels can overrun the initial memory window used for
booting with their BSS area. When this happens, they overwrite the FDT
and silently fail to boot.
On e300 CPUs, the Linux kernel uses an initial BAT covering the first
256MB of RAM. See arch/powerpc/kernel/head_32.S for details. Increase
the value of CONFIG_SYS_BOOTMAPSZ to accommodate the maximum value
allowed by Linux. This will allow very large kernels to boot.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
The default partition table matches the .dts files for these boards in
Linux. This allows these partitions to be used by name with U-Boot's
"nand" command.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Remove some unused functionality to make U-Boot build again.
Especially PCI is not used on the board.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO
feature from U-Boot. It has only been implemented for PPC4xx and was not
used at all. So let's remove it and make the code smaller and cleaner.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
This patch removes the PPC4xx UART driver. Instead the common NS16550
driver is used, since all PPC4xx SoC's use this peripheral device.
The file 4xx_uart.c now only implements the UART clock calculation
function which also sets the SoC internal UART divisors.
All PPC4xx board config headers are changed to use this common NS16550
driver now.
Tested on these boards:
acadia, canyonlands, katmai, kilauea, sequoia, zeus
Signed-off-by: Stefan Roese <sr@denx.de>
This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.
As a part from this cleanup, the GPIO definitions for PPC405EP are
corrected. The high and low parts of the registers (for example
CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in
the wrong order. This patch now fixes this issue by switching these
xxxH and xxxL values. This brings the GPIO 405EP port in sync with all
other PPC4xx ports.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch starts a bit PPC4xx header cleanup. First patch mostly
touches PPC440 files. A later patch will touch the PPC405 files as well.
This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the behaviour of the fdt_fixup_nor_flash_node()
function. Now it doesn't patch the size of the "reg" property with the
chip-select size, but with the size returned from the new function
flash_get_bank_size(). This function will return per weak default the
flash size of the bank (bank = chip-select numer) detected by the flash
driver. If this does not fit your needs, this function may be overridden
by a board specific one.
For this the parameters needed to be changed. So I intentionally squashed
the PPC4xx stuff using this routine into this patch. Otherwise it would
not be git-bisectable anymore.
The board specific function for the AMCC/APM Ebony eval board is now
included in this patch version.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Detlev Zundel <dzu@denx.de>
Cc: Gerald Van Baren <vanbaren@cideas.com>
Cc: Wolfgang Denk <wd@denx.de>
The Freescale MPC8610 and MPC5121 DIU code had re-implement two features that already
existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO).
So delete the 8610-specific code and use the built-in features instead.
Signed-off-by: Timur Tabi <timur@freescale.com>
This patch modifies jadecpu board so that it is usable
with the relocation patches by Heiko Schocher
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
- Revives POST for blackfin arch;
- Removes redundant code:
arch/blackfin/lib/post.c
arch/powerpc/cpu/ppc4xx/commproc.c
arch/powerpc/cpu/mpc512x/common.c
- fixes up the post_word_{load|store} usage.
Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Tested-by: Anatolij Gustschin <agust@denx.de>
List of the maintainers of the affected by patch boards:
Cc: Stephan Linz <linz@li-pro.net>
Cc: Denis Peter <d.peter@mpl.ch>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Niklaus Giger <niklaus.giger@netstal.com>
Cc: Larry Johnson <lrj@acm.org>
Cc: Feng Kan <fkan@amcc.com>
This patch simplifies the use of CONFIG_SYS_MAX_FLASH_BANKS_DETECT. By
moving these optional variables and defines into the common code, board
specific code is minimized. Currently only the following board use
this feature:
APC405, IDS8247, TQM834x
And IDS8247 doesn't seem to really need this feature, since its not
updating the bank number variable at all. So this patch removes the
definition of CONFIG_SYS_MAX_FLASH_BANKS_DETECT from this board port.
This new framework will be used by the upcoming lwmon5 update as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
Recent changes caused that the smmaco4 board now is included in the
boards built by MAKEALL, which revealed that compilation for this
board has been broken for a long time:
mpc5xxx_fec.c:899:2: error: #error fec->xcv_type not initialized.
The board is orphaned. Drop support for it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Recent changes caused that the HMI10 board now is included in the
boards built by MAKEALL, which revealed that compilation for this
board has been broken for a long time:
ps2ser.c: In function 'ps2ser_init':
ps2ser.c:155: error: 'UART_LCR' undeclared (first use in this function)
ps2ser.c:155: error: (Each undeclared identifier is reported only once
ps2ser.c:155: error: for each function it appears in.)
ps2ser.c:156: error: 'UART_DLL' undeclared (first use in this function)
ps2ser.c:157: error: 'UART_DLM' undeclared (first use in this function)
ps2ser.c:159: error: 'UART_IER' undeclared (first use in this function)
ps2ser.c:160: error: 'UART_MCR' undeclared (first use in this function)
ps2ser.c:161: error: 'UART_FCR' undeclared (first use in this function)
ps2ser.c:162: error: 'UART_FCR_ENABLE_FIFO' undeclared (first use in this function)
ps2ser.c:166: error: 'UART_LSR' undeclared (first use in this function)
ps2ser.c: In function 'ps2ser_putc':
ps2ser.c:198: error: 'UART_LSR' undeclared (first use in this function)
ps2ser.c:200: error: 'UART_TX' undeclared (first use in this function)
ps2ser.c: In function 'ps2ser_getc_hw':
ps2ser.c:224: error: 'UART_LSR' undeclared (first use in this function)
ps2ser.c:225: error: 'UART_RX' undeclared (first use in this function)
ps2ser.c: In function 'ps2ser_interrupt':
ps2ser.c:293: error: 'UART_IIR' undeclared (first use in this function)
The board is orphaned, and AFAICT has reached EOL.
Drop support for it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Recent changes caused thatthe aev board now is included in the boards
built by MAKEALL, which revealed that compilation for this board has
been broken for a long time:
mpc5xxx_fec.c:899:2: error: #error fec->xcv_type not initialized.
mpc5xxx_fec.c:899:2: error: #error fec->xcv_type not initialized.
Fix it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Split the existing dram_init for da8xx when ARM reloc is enabled, like the
changes to arch/arm/cpu/arm926ejs/orion5x/dram.c in
0f234d263b17ccf1b8fd776eb8c15b7cdb27a887 by Heiko Schocher <hs@denx.de>.
Without these changes gd->ram_size is '0' which leads to incorrect relocation
when CONFIG_SYS_ARM_WITHOUT_RELOC is defined and the board does not boot.
We use get_ram_size to dynamically calculate the available RAM because it runs
on different board version with different ram, as suggested by Heiko in private
communication.
Tested on a da850evm with 128M of DDR2 installed; with both
CONFIG_SYS_ARM_WITHOUT_RELOC defined and undefined.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
CC: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
CC: Heiko Schocher <hs@denx.de>
Change the implementation for arm926 to relocate the code to
an arbitrary address in RAM.
Adapt the TX25 (i.MX25), magnesium board to test the changes.
On the tx25 board TEXT_BASE is set to the final relocation
address to prevent one more copying of u-boot code
when relocating. More info see:
doc/README.arm-relocation
da850 board:
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
Portions of this work were supported by funding from
the CE Linux Forum.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Ben Gardiner <bengardiner@nanometrics.ca>
Change the implementation for ARM V7 to relocate the code to an
arbitrary address in RAM.
Adapt the Beagle board (Cortex A8) to test the changes.
Portions of this work were supported by funding from
the CE Linux Forum.
Signed-off-by: Heiko Schocher <hs@denx.de>
Change the implementation for ARM11 to relocate the code to an
arbitrary address in RAM.
Tested on the qong board.
Portions of this work were supported by funding from
the CE Linux Forum.
Signed-off-by: Heiko Schocher <hs@denx.de>
