Commit Graph

33685 Commits

Author SHA1 Message Date
Patrick Delaunay 7561b258a1 gpt: add optional parameter type in gpt command
code under flag CONFIG_PARTITION_TYPE_GUID
add parameter "type" to select partition type guid

example of use with gpt command :

  partitions = uuid_disk=${uuid_gpt_disk}; \
      name=boot,size=0x6bc00,uuid=${uuid_gpt_boot}; \
      name=root,size=0x7538ba00,uuid=${uuid_gpt_root}, \
         type=0fc63daf-8483-4772-8e79-3d69d8477de4;

  gpt write mmc 0 $partitions

Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
2015-11-12 15:58:58 -05:00
Patrick Delaunay b38c108a98 part:efi: add GUID for linux file system data
Previously, Linux used the same GUID for the data partitions as Windows
(Basic data partition: EBD0A0A2-B9E5-4433-87C0-68B6B72699C7).
This created problems when dual-booting Linux and Windows in UEFI-GPT
Setup, so a new GUID (Linux filesystem data:
0FC63DAF-8483-4772-8E79-3D69D8477DE4) was defined jointly by GPT fdisk
and GNU Parted developers.

Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
2015-11-12 15:58:57 -05:00
Cheng Gu 3526285068 pci: fix checking PCI_REGION_MEM in pci_hose_phys_to_bus()
When converting between PCI bus and phys addresses, a two pass search
was introduced with preference to non-PCI_REGION_SYS_MEMORY regions.
See commit 2d43e873a2.

However, since PCI_REGION_MEM is defined as 0, the if statement was
always asserted true: ((flags & PCI_REGION_MEM) == PCI_REGION_MEM)

This patch uses PCI_REGION_TYPE bit to check if the region is
PCI_REGION_MEM: ((flags & PCI_REGION_TYPE) == PCI_REGION_MEM)

Signed-off-by: Cheng Gu <chenggu@marvell.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-12 13:19:03 -05:00
Tom Rini 78e9e71c83 include/linux/mtd: Update copyright notices
Condense these updates down to SPDX tags too while doing this.  This is
a port of a1452a3771c4eb85bd779790b040efdc36f4274e from the Linux
Kernel.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-12 13:19:03 -05:00
robertcnelson@gmail.com 9606f71002 board/ti/am335x: beaglebone stop muxing i2c1_pin_mux
On the BeagleBone these i2c1 pins are routed to the expanasion header, where
they can be defined as either pr1_usart0_Xxd/pwm0/spi0/i2c1, dont assume i2c1

Fixes: https://e2e.ti.com/support/arm/sitara_arm/f/791/p/313894/1387696

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Reported-by: Matthijs van Duin <matthijsvanduin@gmail.com>
CC: Tom Rini <trini@konsulko.com>
2015-11-12 13:19:02 -05:00
Maxime Ripard a78ebb10a9 sunxi: cubietruck: Enable the USB OTG controller
The Cubietruck has a mini-USB connector that can be used to power up the
board and as an OTG connector.

Since we have already some USB host-only ports right beside this one,
enable it in gadget mode

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-12 13:19:01 -05:00
Maxime Ripard 4257c5036a sunxi: A13-Olinuxino: Enable the USB OTG controller
The A13-Olinuxino has a mini-USB connector that can be used to power up
the board and as an OTG connector.

Since we have already some USB host-only ports right beside this one,
enable it in gadget mode

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-12 13:19:00 -05:00
Maxime Ripard 3d4ef38de2 sparse: Rename the file and header
The Android sparse image format is currently supported through a file
called aboot, which isn't really such a great name, since the sparse image
format is only used for transferring data with fastboot.

Rename the file and header to a file called "sparse", which also makes it
consistent with the header defining the image structures.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-12 13:18:59 -05:00
Maxime Ripard 6fb77c48e4 fastboot: nand: Add pre erase and write hooks
Some devices might need to do some per-partition initialization
(ECC/Randomizer settings change for example) before actually accessing it.

Add some hooks before the write and erase operations to let the boards
define what they need to do if needed.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-12 13:18:58 -05:00
Maxime Ripard bf8940d35b fastboot: Implement NAND backend
So far the fastboot code was only supporting MMC-backed devices for its
flashing operations (flash and erase).

Add a storage backend for NAND-backed devices.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-11-12 13:18:58 -05:00
Maxime Ripard 1f8690aa95 sparse: Implement several chunks flashing
The fastboot client will split the sparse images into several chunks if the
image that it tries to flash is bigger than what the device can handle.

In such a case, the bootloader is supposed to retain the last offset to
which it wrote to, so that it can resume the writes at the right offset
when flashing the next chunk.

Retain the last offset we used, and use the session ID to know if we need
it or not.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-12 13:17:32 -05:00
Maxime Ripard 6c9e00eebf fastboot: Implement flashing session counter
The fastboot flash command that writes an image to a partition works in
several steps:

1 - Retrieve the maximum size the device can download through the
    "max-download-size" variable

2 - Retrieve the partition type through the "partition-type:%s" variable,
    that indicates whether or not the partition needs to be erased (even
    though the fastboot client has minimal support for that)

3a - If the image is smaller than what the device can handle, send the image
     and flash it.

3b - If the image is larger than what the device can handle, create a
     sparse image, and split it in several chunks that would fit. Send the
     chunk, flash it, repeat until we have no more data to send.

However, in the 3b case, the subsequent transfers have no particular
identifiers, the protocol just assumes that you would resume the writes
where you left it.

While doing so works well, it also means that flashing two subsequent
images on the same partition (for example because the user made a mistake)
would not work withouth flashing another partition or rebooting the board,
which is not really intuitive.

Since we have always the same pattern, we can however maintain a counter
that will be reset every time the client will retrieve max-download-size,
and incremented after each buffer will be flashed, that will allow us to
tell whether we should simply resume the flashing where we were, or start
back at the beginning of the partition.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-12 13:17:32 -05:00
Maxime Ripard a5d1e04a53 sparse: Implement storage abstraction
The current sparse image parser relies heavily on the MMC layer, and
doesn't allow any other kind of storage medium to be used.

Rework the parser to support any kind of storage medium, as long as there
is an implementation for it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-12 13:17:31 -05:00
Maxime Ripard 3c8f98f5fe fastboot: Move fastboot response functions to fastboot core
The functions and a few define to generate a fastboot message to be sent
back to the host were so far duplicated among the users.

Move them all to a common place.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-12 13:17:31 -05:00
Maxime Ripard 40aeeda396 sparse: Simplify multiple logic
To check the alignment of the image blocks to the storage blocks, the
current code uses a convoluted syntax, while a simple mod also does the
work.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-12 13:17:29 -05:00
Maxime Ripard 7bfc3b1346 sparse: Refactor chunk parsing function
The chunk parsing code was duplicating a lot of code among the various
chunk types, while all of them could be covered by generic and simple
functions.

Refactor the current code to reuse as much code as possible and hopefully
make the chunk parsing loop more readable and concise.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-12 13:17:29 -05:00
Maxime Ripard bb83c0f35a sparse: Move main header parsing to a function of its own
The current sparse image format parser is quite tangled, with a lot of
code duplication.

Start refactoring it by moving the header parsing function to a function
of its own.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-12 13:17:28 -05:00
Maxime Ripard 10b6971215 mtd: uboot: Add meaningful error message
The current error message in get_part if CONFIG_MTDPARTS is disabled is
"offset is not a number" which is confusing and doesn't help at all.

Change that for something that might give a hint on what's going on.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-12 13:17:28 -05:00
Hannes Petermaier 91931f7ed3 board/BuR/kwb: use bootvx(...) (with bootline feature) instead go(...)
Since we don't have for sure a valid IP-setup during
board_late_init(...) because it maybe allready stored in environment or
not, we cannot form a proper vxWorks bootline at this place.

So we move to the way, forming the bootline just before
executing/launching vxWorks. To do this we use the bootvx command
instead go.

We only have to form the "othbootargs" environment variable, the rest is
done pretty good by the "bootvx" commannd.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-12 13:17:27 -05:00
Tom Rini ade766acfb Merge branch 'next' of git://git.denx.de/u-boot-blackfin 2015-11-12 10:48:13 -05:00
Thomas Chou 038be18fd9 nios2: add 3c120 and 10m50 devboards MAINTAINERS
Add 3c120 and 10m50 devboards MAINTAINERS

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
2015-11-12 08:26:59 +08:00
Thomas Chou 9f301294dd nios2: change README.nios2 to use 10m50 as template
The 10m50 devboard becomes the new golden reference design of
Nios II Linux. So change README.nios2 to use 10m50 as template.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
2015-11-12 08:26:59 +08:00
Thomas Chou 479accb605 nios2: rename board nios2-generic to 3c120_devboard
Rename board nios2-generic to 3c120_devboard. Since nios2 is
converted to driver model and device tree control of u-boot,
the nios2-generic board directory is removed. We can rename
the board back to a real board name. Now the boards maintained
in u-boot mainline are the same as Linux kernel, namely 3c120
and 10m50.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
2015-11-12 08:26:59 +08:00
Thomas Chou 5c0f9822e7 nios2: add 10m50 devboard support
Add 10m50 devboard support. It is based on the Golden Hardware
Reference Design (GHRD), available at,

http://rocketboards.org/foswiki/view/Documentation/
AlteraMAX1010M50RevCDevelopmentKitLinuxSetup

Though we supported only one nios2-generic board in the past. Now,
with the removal of the nios2-generic board dir, adding new nios2
boards to u-boot is easier than before. It should be helpful to
add those boards supported in Linux mainline. There are only two
such nios2 boards, the 3c120 devboard and 10m50 devboard. The
nios2-generic is actually 3c120, and should restore the name. The
10m50 is this one.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
2015-11-12 08:26:59 +08:00
Thomas Chou e3e872604d net: altera_tse: add mSG-DMA support
The Modular Scatter-Gather DMA core is a new DMA core to work
with the Altera Triple-Speed Ethernet MegaCore. It replaces the
legacy Scatter-Gather Direct Memory Access (SG-DMA) controller
core. Please find details on the "Embedded Peripherals IP User
Guide" of Altera.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
2015-11-12 08:26:59 +08:00
Thomas Chou 38fa4aca8a net: altera_tse: add priv ops to prepare msgdma support
Add priv ops to prepare msgdma support. These ops are dma type
specific.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
2015-11-12 08:26:59 +08:00
Thomas Chou 577662f084 net: altera_tse: wait sgdma in altera_tse_recv
Move the sgdma wait from free_pkt to recv. This is the proper
place to wait recv sgdma done.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
2015-11-12 08:26:59 +08:00
Thomas Chou acd71c320f net: altera_tse: factor out stop mac func
Factor out the stop mac function to prepare msgdma support.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
2015-11-12 08:26:59 +08:00
Thomas Chou de99a17c9a net: zap altera_tse_initialize prototypes
Zap the altera_tse_initialize() prototypes, since it is converted
to driver model.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
2015-11-12 08:26:59 +08:00
Thomas Chou c3c44954ed nios2: nios2-generic: do not allocate rx buf in net.c
Do not allocate rx buf in net.c, because altera_tse allocates
its own rx buf in driver. This can save 6KB memory.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-11-12 08:26:58 +08:00
Thomas Chou 38a0f36e83 mtd: add altera quadspi driver
Add Altera Generic Quad SPI Controller support. The controller
converts SPI NOR flash to parallel flash interface. So it is
not like other SPI flash, but rather like CFI flash.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-11-12 08:26:58 +08:00
Thomas Chou 207e97b923 nios2: add memcpy_fromio and memcpy_toio
Add memcpy_fromio() and memcpy_toio().

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-11-12 08:26:58 +08:00
Thomas Chou af54c18d4c nios2: use cfi flash driver model
Use cfi flash driver model.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-11-12 08:26:58 +08:00
Thomas Chou f105691043 cfi_flash: convert to driver model
Convert cfi flash to driver model.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-12 08:26:58 +08:00
Thomas Chou d85879938d dm: implement a MTD uclass
Implement a Memory Technology Device (MTD) uclass. It should
include most flash drivers in the future. Though no uclass ops
are defined yet, the MTD ops could be used.

The NAND flash driver is based on MTD. The CFI flash and SPI
flash support MTD, too. It should make sense to convert them
to MTD uclass.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-11-12 08:26:58 +08:00
Masahiro Yamada b375219e73 ARM: uniphier: drop UniPhier specific SMP code
The latest Linux can directly handle SMP operations for UniPhier SoCs
without any help of U-boot.  Drop the relevant code from U-boot.

See commit b1e4006aeda8c8784029de17d47987c21ea75f6d ("ARM: uniphier:
rework SMP operations to use trampoline code") in Linux Kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-11 23:35:35 +09:00
Masahiro Yamada 2610b1362b ARM: dts: uniphier: add USB xHCI nodes for PH1-Pro5 and ProXstream2
This makes USB3.0 available on new SoCs/boards.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-11 23:35:34 +09:00
Masahiro Yamada 57e2c481c7 ARM: dts: uniphier: fix interrupt number of USB core for PH1-Pro4
The IRQ is not used in U-Boot, but this would be useful to sync
device trees between Linux and U-Boot.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-11-11 23:35:26 +09:00
Tom Rini cad0499071 Merge branch 'master' of git://git.denx.de/u-boot-arm 2015-11-10 13:38:08 -05:00
Stephen Warren 5e68ff3949 ARM: tegra: enable CONFIG_SYS_NONCACHED_MEMORY everywhere
Now that we have solved the problems that prevented this feature from
being enabled, enable it everywhere.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2015-11-10 18:04:30 +01:00
Stephen Warren 376cb1a453 ARM: tegra: add custom MMU setup on ARMv8
This sets up a fine-grained page table, which is a requirement for
noncached_init() to operate correctly.

MMU setup code currently exists in a number of places:
- A version in the core ARMv8 support code that sets up page tables that
use very large block sizes that CONFIG_SYS_NONCACHED_MEMORY doesn't
support.
- Enhanced versions for fsl-lsch3 and zynmq that set up finer grained
page tables.

Ideally, rather than duplicating the MMU setup code yet again this patch
would instead consolidate all the different routines into the core ARMv8
code so that it supported all use-cases. However, this will require
significant effort since there appear to be a number of discrepancies[1]
between different versions of the code, and between the defines/values by
some copies of the MMU setup code use and the architectural MMU
documentation. Some reverse engineering will be required to determine the
intent of the current code.

[1] For example, in the core ARMv8 MMU setup code, three defines named
TCR_EL[123]_IPS_BITS exist, but only one of them sets the IPS field and
the others set a different field (T1SZ) in the page tables. As far as I
can tell so far, there should be no need to set different values per
exception level nor to modify the T1SZ field at all, since TTBR1 shouldn't
be enabled anyway. Another example is inconsistent values for *_VA_BITS
between the current core ARMv8 MMU setup code and the various SoC-
specific MMU setup code. Another example is that asm/armv8/mmu.h's value
for SECTION_SHIFT doesn't match asm/system.h's MMU_SECTION_SHIFT;
research is needed to determine which code relies on which of those
values and why, and whether fixing the incorrect value will cause any
regression.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2015-11-10 18:04:19 +01:00
Stephen Warren 3c6af3bad4 armv8: allow custom MMU setup routines on ARMv8
In order for noncached_init() to operate correctly, SoCs must set up a
custom page table with fine-grained (2MiB) sections, which can be
configured from noncached_init().

This is currently performed by arch/arm/cpu/armv8/{fsl-lsch3,zynqmp}/cpu.c
by cut/pasting and re-implementing mmu_setup, enable_caches(), etc. There
are some other reasons for the duplication there though, such as enabling
icache early, and enabling dcaching earlier with a different configuration.

This change makes mmu_setup() a weak implementation, so that the MMU setup
code can be replaced without having to duplicate other code that calls it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2015-11-10 18:03:41 +01:00
Stephen Warren 88f965d720 armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY
The implementation of noncached_init() uses define MMU_SECTION_SIZE.
Define this on ARM64.

Move the prototype of noncached_{init,alloc}() to a location that
doesn't depend on !defined(CONFIG_ARM64).

Note that noncached_init() calls mmu_set_region_dcache_behaviour() which
relies on something having set up translation tables with 2MB block size.
The core ARMv8 MMU setup code does not do this by default, but currently
relies on SoC specific MMU setup code. Be aware of this before enabling
this feature on your platform!

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2015-11-10 18:03:31 +01:00
Fabio Estevam 9549867c86 ls1043ardb: Add missing config entries to MAINTAINERS
ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing
in the MAINTAINERS file, so add them for completeness.

Reported-by: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2015-11-10 16:52:58 +01:00
Tom Rini 3a90cb676f board/ti: Update MAINTAINERS entries with more boards
A few config files have been added without updating MAINTAINERS.

Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-10 16:52:46 +01:00
Vadzim Dambrouski 43fb0e3926 arm: stm32f4: fix a bug when a random sector gets erased
Old sector number is not being cleared from FLASH_CR register. For example
when first erased sector was 001 and then you want to erase sector 010,
sector 011 gets erased instead.
This patch clears old sector number from FLASH_CR register before a new
one is written.

Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
2015-11-10 16:48:50 +01:00
Vadzim Dambrouski 4cd3246f2a arm: stm32f4: fix a bug when only first sector gets erased
flash_lock call is inside a for loop, so after the first iteration flash
is locked and no more sectors can be erased.
Move flash_lock out of the loop.

Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
2015-11-10 16:48:47 +01:00
Tom Rini 7ff15aca1a powerpc: Finish updating u-boot*lds scripts for newer binutils
In 522b021 we dropped 'PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4)' lines in
the mpc85xx linker scripts as this is not required and breaks newer
binutils.  This commit cleans up the rest of the powerpc linker scripts.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-10 09:20:29 -05:00
Tom Rini d89059beed board/ti: Update MAINTAINERS entries with more boards
A few config files have been added without updating MAINTAINERS.

Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-10 09:20:27 -05:00
Tom Rini da58dec866 Various Makefiles: Add SPDX-License-Identifier tags
After consulting with some of the SPDX team, the conclusion is that
Makefiles are worth adding SPDX-License-Identifier tags too, and most of
ours have one.  This adds tags to ones that lack them and converts a few
that had full (or in one case, very partial) license blobs into the
equivalent tag.

Cc: Kate Stewart <kstewart@linuxfoundation.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-10 09:19:52 -05:00