cm-t54 Eth MAC address is stored in onboard EEPROM.
Add EEPROM support and setup stored Eth MAC address.
If EEPROM does not contain a valid MAC, then generate it from the
processor ID code (reference code is taken from OMAP5 uEvm board file).
Modify Device Tree blob MAC address field with retrieved data.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Tested-by: Samuel Egli <samuel.egli@siemens.com>
This adds the Gumstix DuoVero machine [1]. This is a OMAP4430-based
computer-on-module (COM aka SOM) that can be mounted on various
expansion boards with different peripherals.
[1] https://store.gumstix.com/index.php/category/43/
Signed-off-by: Ash Charles <ash@gumstix.com>
[trini: Rename gpmc_enable_gpmc_cs_config to gpmc_enable_gpmc_net_config]
Signed-off-by: Tom Rini <trini@ti.com>
Clean-up the board configuration file for the Gumstix Overo board by
including common omap3 definitions from ti_omap3_common.h as suggested
here [1].
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/185960
Signed-off-by: Ash Charles <ashcharles@gmail.com>
Conflicts:
include/configs/omap3_overo.h
Update the board configuration for Gumstix Overo. In particular,
add support for zImage and DTB files on boot.
Signed-off-by: Ash Charles <ashcharles@gmail.com>
Patch f33b9bd3
[arm: omap3: Enable clocks for peripherals only if they are used]
breaks SPL booting on Overo. Since some gpio inputs are
read to detect the board revision. But with this patch above, the
clocks to the GPIO subsystems are not enabled per default any more.
The GPIO banks need to be configured specifically now.
Signed-off-by: Ash Charles <ashcharles@gmail.com>
The linux kernel is at nand0,3 using the current layout, but is best
accessed through the partition label "linux". Since CONFIG_CMD_MTDPARTS is
defined the CONFIG_JFFS2 settings are unreferenced; use "setenv partition
rootfs" to set the default mtd partition for jffs2.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Tested-by: Ash Charles <ash@gumstix.com>
Linux kernel at version 3.5 is about 3.5 MiB; test kernels for 3.10 exceed 4
MiB. Prepare for future upgrades by increasing the NAND partition now.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Tested-by: Ash Charles <ash@gumstix.com>
The NAND linux partition format default was changed from jffs2 to ubi in
254973e6df but the corresponding commands were
not enabled.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Tested-by: Ash Charles <ash@gumstix.com>
Adapted from d70f5480 described below.
commit d70f54808d
Author: Javier Martinez Canillas <javier@dowhile0.org>
Date: Mon Jan 7 03:51:20 2013 +0000
omap4: allow the use of a plain text env file instead boot scripts
For production systems it is better to use script images since
they are protected by checksums and carry valuable information like
name and timestamp. Also, you can't validate the content passed to
env import.
But for development, it is easier to use the env import command and
plain text files instead of script-images.
Since both OMAP4 supported boards (Panda and TI SDP4430) are used
primarily for development, this patch allows U-Boot to load env var
from a text file in case that an boot.scr script-image is not present.
The variable uenvcmd (if existent) will be executed (using run) after
uEnv.txt was loaded. If uenvcmd doesn't exist the default boot sequence
will be started.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Tested-by: Ash Charles <ash@gumstix.com>
Since B&R boards uses only MMC-Controller #1, it only
wastes time if we initialize #0 first to see that there is nothing.
Cc: <trini@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
This adds CONFIG_SYS_THUMB_BUILD to config, in order to enable optimization
of thumb.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
This adds CONFIG_SYS_THUMB_BUILD to config, in order to enable optimization
of thumb.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Guard the LOADMK functionality with config to provide
an option to enable or disable it.
Enable it for all platforms in mainline which enable CONFIG_CMD_FPGA.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Conflicts:
boards.cfg
Conflicts were trivial once u-boot-arm/master boards.cfg was
reformatted (commit 6130c146) to match u-boot/master's own
reformatting (commit 1b37fa83).
The new 768KB u-boot image size requires changes for
SRIO/PCIE boot. These addresses need to be updated to
appropriate locations.
The updated addresses are used to configure the SRIO/PCIE
inbound windows for the boot, and they must be aligned
with the window size based on the SRIO/PCIE modules requirement.
So for the 768KB u-boot image, the inbound window cannot be set
with 0xfff40000 base address and 0xc0000 size, it should be
extended to 1MB size and the base address can be aligned with
the size.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
AFAICT, c=ffe does nothing and was a typo from the original commit
d17123696c "powerpc/p4080: Add support
for the P4080DS board" and just kept on getting duplicated
in subsequently added board config files.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Edward Swarthout <ed.swarthout@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
In the earlier patches, the SPL/TPL fraamework was introduced.
For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The
SPL was loaded by the code from the internal on-chip ROM. The SPL initializes
the DDR according to the SPD and loads the final uboot image into DDR, then
jump to the DDR to begin execution.
For NAND booting way, the nand SPL has size limitation on some board(e.g.
P1010RDB), it can not be more than 4KB, we can call it "minimal SPL", So the
dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is
loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD
and loads the final uboot image into DDR,then jump to the DDR to begin execution.
This patch enabled SPL/TPL for P1_P2_RDB to support starting from NAND/SD/SPI
flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL.
Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to
execute, so the section .resetvec is no longer needed.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
In case of secure boot from NAND, CSPR and FTIM settings are
same as non-secure NAND boot. CSPR0 is configured as NAND and
CSPR1 is configured as NOR.
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
P1020 SoC which has two USB controllers, but only first one is used
on this platform.
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
T4160RDB shares the same platform as T4240RDB. T4160 is
a low power version of T4240, with the eight e6500 cores,
two DDR3 controllers, and same peripheral bus interfaces.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Albert ARIBAUD
Dmitry Lifshitz
Heiko Schocher
Ash Charles
Peter A. Bigot
Tom Rini
Hannes Petermaier
Nobuhiro Iwamatsu
Siva Durga Prasad Paladugu
Michal Simek
Liu Gang
Kim Phillips
Prabhakar Kushwaha
Aneesh Bansal
ramneek mehresh
Chunhe Lan