Commit Graph

5286 Commits

Author SHA1 Message Date
Tom Rini 28b62f0de3 Merge branch 'master' of git://git.denx.de/u-boot-spi 2014-06-11 11:40:11 -04:00
Tom Rini 61e76f5370 Merge branch 'master' of git://git.denx.de/u-boot-usb 2014-06-10 20:37:00 -04:00
Lukasz Majewski 3d83e6752d dfu: Disable default calculation of CRC32
Patch (SHA1: bd694244db)
dfu: Introduction of the "dfu_hash_algo" env variable for checksum method
setting

already introduced more generic handling of the crc32 calculation.
Up till now the CRC32 of received data was calculated unconditionally.
This patch changes this and from now - by default the crc32 is NOT
calculated anymore.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2014-06-11 02:31:48 +02:00
Stephen Warren e0672b3c3a usb: ci_udc: terminate ep0 INs with a zlp when required
Sometimes, a zero-length packet is required at the end of an IN
transaction so that the host knows the device is done sending data.
Enhance ci_udc to send a zlp when necessary. See the comments for
more details.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-11 02:26:05 +02:00
Stephen Warren b7c0051687 usb: ci_udc: clean up all allocations in unregister
usb_gadget_unregister_driver() is called to tear down the USB device mode
stack. Fix the driver to stop the USB HW (which causes any attached host
to notice the disappearance of the device), and free all allocations
(which obviously prevents memory leaks).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-11 02:26:05 +02:00
Stephen Warren 9a7d34be13 usb: ci_udc: fix probe error cleanup
If allocation of the ep0 req fails, clean up all the allocations that
were made in ci_udc_probe().

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-11 02:26:05 +02:00
Stephen Warren bdf81611e4 usb: ci_udc: fix freeing of ep0 req
ci_ep_alloc_request() avoids allocating multiple request objects for ep0
by keeping a record of the first req allocated for ep0, and always
returning that instead of allocating a new req. However, if this req is
ever freed, the record of the previous allocation is not cleared, so
ci_ep_alloc_request() will keep returning this stale pointer. Fix
ci_ep_free_request() to clear the record of the previous allocation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-11 02:26:05 +02:00
Stephen Warren 43a8f25b6c usb: ci_udc: call udc_disconnect() from ci_pullup()
ci_pullup()'s !is_on path contains a cut/paste copy of udc_disconnect().
Remove the duplication by simply calling udc_disconnect() instead.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-11 02:26:05 +02:00
Nobuhiro Iwamatsu 1dbd7280dc net: sh-eth: Fix typo from rESR_RTLF to EESR_RTLF
'r' of rESR_RTLF is a mistake of E.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2014-06-10 17:05:03 +09:00
Nobuhiro Iwamatsu e2752db052 net: sh-eth: Fix coding style
This fixes checkpatch's warning.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2014-06-10 17:05:03 +09:00
Nobuhiro Iwamatsu 62cbddc493 net: sh-eth: Add support R7S72100 of rmobile
The R7S72100 of ARM SoC that Renesas manufactured has one Ether port.
This has the same IP SH-Ether. This patch adds support of the R7S72100
in SH-Ether.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2014-06-10 17:05:03 +09:00
Alison Wang 6b57ff6fd5 arm: vf610: Add QSPI driver support
Add Freescale QSPI driver support for VF610.

Signed-off-by: Alison Wang <Huan.Wang@freescale.com>
Signed-off-by: Chao Fu <b44548@freescale.com>
2014-06-09 09:18:09 +02:00
Poddar, Sourav 1f436a6ddf sf: probe: Fix quad bit set path
Currently, flash quad bit is set in "spi_flash_validate_params" and later
at the end in the same api, we write 0 to status register for few flashes,
thereby overriding the quad bit set. This fix moves the quad bit setting
outside this api in "spi_flash_probe_slave"

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-06-08 23:12:27 +05:30
Andrew Ruder c1c0dd2644 spi: soft_spi: Support NULL din/dout buffers
This mirrors the conventions used in other SPI drivers (kirkwood,
davinci, atmel, et al) where the din/dout buffer can be NULL when the
received/transmitted data isn't important.  This reduces the need for
allocating additional buffers when write-only/read-only functionality is
needed.

In the din == NULL case, the received data is simply not stored.  In the
dout == NULL case, zeroes are transmitted.

Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-06-08 23:12:27 +05:30
Siva Durga Prasad Paladugu 0472808608 sf: params: Added support for Spansion S25FL512S_512K
Added support for Spansion chip "S25FL512S_512K".

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-06-08 23:12:27 +05:30
Tom Rini 55e8250bd3 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-06-08 07:58:41 -04:00
Tom Rini 86db550b38 power: Add support for the TPS65218 PMIC
Add a driver for the TPS65218 PMIC which is used by TI AM43xx SoCs and
may be used by TI AM335x SoCs.

Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06 17:46:16 -04:00
Sourav Poddar ce3cc8ecf5 ti: qspi: populate slave device to set flash quad bit.
The patch populates the slave data which will be used by flash driver to
set the  flash quad enable bit.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
2014-06-06 17:46:14 -04:00
pekon gupta 46840f66ca mtd: nand: omap: add support for BCH16_ECC - NAND driver updates
This patch add support for BCH16_ECC to omap_gpmc driver.

*need to BCH16 ECC scheme*
With newer SLC Flash technologies and MLC NAND, and large densities, pagesizes
Flash devices have become more suspectible to bit-flips. Thus stronger
ECC schemes are required for protecting the data.
But stronger ECC schemes have come with larger-sized ECC syndromes which require
more space in OOB/Spare. This puts constrains like;
(a) BCH16_ECC can correct 16 bit-flips per 512Bytes of data.
(b) BCH16_ECC generates 26-bytes of ECC syndrome / 512B.
Due to (b) this scheme can only be used with NAND devices which have enough
OOB to satisfy following equation:
OOBsize per page >= 26 * (page-size / 512)

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-06-06 17:46:10 -04:00
pekon gupta b80a660338 mtd: nand: omap: add CONFIG_SYS_NAND_BUSWIDTH_16BIT to indicate NAND device bus-width
GPMC controller needs to be configured based on bus-width of the NAND device
connected to it. Also, dynamic detection of NAND bus-width from on-chip ONFI
parameters is not possible in following situations:
SPL:    SPL NAND drivers does not support ONFI parameter reading.
U-boot: GPMC controller iniitalization is done in omap_gpmc.c:board_nand_init()
        which is called before probing for devices, hence any ONFI parameter
        information is not available during GPMC initialization.

Thus, OMAP NAND driver expected board developers to explicitely write GPMC
configurations specific to NAND device attached on board in board files itself.
But this was troublesome for board manufacturers as they need to dive into
lengthy platform & SoC documents to find details of GPMC registers and
appropriate configurations to get NAND device working.

This patch instead adds existing CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config
hich indicates that connected NAND device has x16 bus-width. And then based on
this config GPMC driver itself initializes itself based on NAND bus-width. This
keeps board developers free from knowing GPMC controller specific internals.

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-06-06 17:46:06 -04:00
Brian Norris 27ce9e4290 mtd: nand: force NAND_CMD_READID onto 8-bit bus
As per following Sections in ONFI Spec, NAND_CMD_READID should use only
lower 8-bit for transfering command, address and data even on x16 NAND device.

*Section: Target Initialization"
"The Read ID and Read Parameter Page commands only use the lower 8-bits of the
 data bus. The host shall not issue commands that use a word data width on x16
 devices until the host determines the device supports a 16-bit data bus width
 in the parameter page."

*Section: Bus Width Requirements*
"When the host supports a 16-bit bus width, only data is transferred at the
 16-bit width. All address and command line transfers shall use only the lower
 8-bits of the data bus. During command transfers, the host may place any value
 on the upper 8-bits of the data bus. During address transfers, the host shall
 set the upper 8-bits of the data bus to 00h."

Thus porting  following commit from linux-kernel to ensure that column address
is not altered to align to x16 bus when issuing NAND_CMD_READID command.

    commit 3dad2344e92c6e1aeae42df1c4824f307c51bcc7
    mtd: nand: force NAND_CMD_READID onto 8-bit bus
    Author: Brian Norris <computersforpeace@gmail.com> (preserving authorship)

    The NAND command helpers tend to automatically shift the column address
    for x16 bus devices, since most commands expect a word address, not a
    byte address. The Read ID command, however, expects an 8-bit address
    (i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or
    0x20).

    This fixes the column address for a few drivers which imitate the
    nand_base defaults.

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-06-06 17:46:03 -04:00
Brian Norris b9ae609fdb mtd: nand: don't use read_buf for 8-bit ONFI transfers
Porting below commit from linux-tree, preserving original authorship & commit log
commit bd9c6e99b58255b9de1982711ac9487c9a2f18be
Author:     Brian Norris <computersforpeace@gmail.com>
mtd: nand: don't use read_buf for 8-bit ONFI transfers

  Use a repeated read_byte() instead of read_buf(), since for x16 buswidth
  devices, we need to avoid the upper I/O[16:9] bits. See the following
  commit for reference:

  commit 05f7835975dad6b3b517f9e23415985e648fb875 (from linux-tree)
  Author: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
  Date:   Thu Dec 5 22:22:04 2013 +0100

      mtd: nand: don't use {read,write}_buf for 8-bit transfers

  Now, I think that all barriers to probing ONFI on x16 devices are
  removed, so remove the check from nand_flash_detect_onfi().

Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-06-06 17:46:01 -04:00
pekon gupta 3f990dc83b mtd: nand: omap: fix error-codes returned from omap-elm driver
This patch
 omap-elm.c: replaces -ve integer value returned during errorneous condition,
             with proper error-codes.
 omap-gpmc.c: updates omap-gpmc driver to pass error-codes returned from
             omap-elm driver to upper layers

Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2014-06-06 17:46:00 -04:00
pekon gupta a09431da38 mtd: nand: omap_gpmc: minor cleanup of omap_correct_data_bch
This patch tries to avoid some local pointer dereferences, by using common
local variables in omap_correct_data_bch()

Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2014-06-06 17:45:57 -04:00
pekon gupta 9233279f8e mtd: nand: omap_gpmc: rename struct nand_bch_priv to struct omap_nand_info
This patch renames 'struct nand_bch_priv' which currently holds private data only
for BCH ECC schemes, into 'struct omap_nand_info' so that same can be used for
all ECC schemes

Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2014-06-06 17:45:55 -04:00
pekon gupta d21e77ff84 mtd: nand: omap_gpmc: remove unused members of 'struct nand_bch_priv'
This patch prepares to refactor 'struct nand_bch_priv' -> 'struct omap_nand_info'
And thus performs following clean-ups:
 - remove nand_bch_priv.type: use nand_bch_priv.ecc_scheme instead
 - remove nand_bch_priv.mode: <unused>

Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2014-06-06 17:45:51 -04:00
pekon gupta 41bbe4dd49 mtd: nand: omap_elm: use bch_type instead of nibble count to differentiate between BCH4/BCH8/BCH16
ELM hardware engine support ECC error detection for multiple ECC strengths like
 +------+------------------------+
 |Type  | ECC syndrome length    |
 +------+------------------------+
 |BCH4  | 6.5 bytes = 13 nibbles |
 |BCH8  | 13 byte = 26 nibbles   |
 |BCH16 | 26 bytes = 52 nibbles  |
 +------+------------------------+

Current implementation of omap_elm driver uses ECC syndrom length (in 'nibbles')
to differentiate between BCH4/BCH8/BCH16. This patch replaces it with 'bch_type'

Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2014-06-06 17:45:48 -04:00
pekon gupta b98c5755c0 mtd: nand: omap_elm: remove #include omap_gpmc.h
There is no dependency of omap_elm.c on omap_gpmc.h

Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2014-06-06 17:45:47 -04:00
Tim Harvey ca84d72d1c dwc_ahsata: return failure for MX6 if not IMX6Q/IMX6D
The IMX6QUAD/DUAL have SATA, but the IMX6SOLO/DL do not. Return failure
instead of attempting a memory access that results in a data abort and reset.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2014-06-06 10:14:07 +02:00
Tim Harvey 73210dccdb spl: nand: add support for mxs nand
This utilizes existing mxs_nand support layer to provide a method to load an
image off nand for SPL. The flash device will be detected in order to support
multiple flash devices instead of having layout hard coded at build time.

Cc: Stefan Roese <sr@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Andy Ng <andreas2025@gmail.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Tom Rini <trini@ti.com>
Cc: Scott Wood <scottwood@freescale.com>

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2014-06-06 10:07:25 +02:00
Tom Rini 3e1fa221f9 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2014-06-05 17:38:30 -04:00
York Sun 353527d527 driver/ddr/fsl: Fix printing unspecified module info for DDR4
The offset of module information is at 128, different from DDR3.

Signed-off-by: York Sun <yorksun@freescale.com>
2014-06-05 13:45:07 -07:00
York Sun 9855b3beca powerpc/mpc85xx: Add workaround for DDR erratum A004508
When the DDR controller is initialized below a junction temperature of
0°C and then operated above a junction temperature of 65°C, the DDR
controller may cause receive data errors, resulting ECC errors and/or
corrupted data. This erratum applies to the following SoCs and their
variants: MPC8536, MPC8569, MPC8572, P1010, P1020, P1021, P1022, P1023,
P2020.

Signed-off-by: York Sun <yorksun@freescale.com>
2014-06-05 13:45:07 -07:00
Hou Zhiqiang afb907061a powerpc/espi: remove 80us delay to improve transfer performance
Replace 80 mircoseconds delay with polling flag ESPI_EV_TXE.

Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-06-05 12:56:20 -07:00
Cormier, Jonathan 08be2836df phy: fix create_phy_by_mask for when its given an actual search mask
get_phy_id returns -EIO when it can't read from a phy at a given addr.  This would cause
create_phy_by_mask to return prematurely before it had tested the other addresses in the provided mask.

Example usage:
Replace
    phydev = phy_connect(bus, phy_addr, dev, phy_if)
with
    phydev = phy_find_by_mask(bus, phy_mask, phy_if)
    if (phydev)
	phy_connect_dev(phydev, dev);

Signed-off-by: Cormier, Jonathan <jcormier@criticallink.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
2014-06-05 14:44:56 -04:00
Albert ARIBAUD cc49da249c Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' 2014-06-02 08:43:48 +02:00
Stephen Warren 006c702688 usb: ci_udc: complete ep0 direction handling
handle_setup() currently assumes that the response to a Setup transaction
will be an OUT transaction, and any subsequent packet (if any) will be an
IN transaction. This appears to be valid in many cases; both USB
enumeration and Mass Storage work OK with this restriction. However, DFU
uses ep0 to transfer data in both directions. This renders the assumption
invalid; when sending data from device to host, the Data Stage is an IN
transaction, and the Status Stage is an OUT transaction. Enhance
handle_setup() to deduce the correct direction for the USB transactions
based on Setup transaction data.

ep0's request object only needs to be automatically re-queued when the
Data Stage completes, in order to implement the Status Stage. Once the
Status Stage transaction is complete, there is no need to re-queue the
USB request, so don't do that.

Don't sent USB request completion callbacks for Status Stage transactions.
These were queued by ci_udc itself, and only serve to confuse the USB
function code. For example, f_dfu attempts to interpret the 0-length data
buffers for Status Stage transactions as DFU packets. These buffers
contain stale data from the previous transaction. This causes f_dfu to
complain about a sequence number mismatch.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-01 19:22:40 +02:00
Stephen Warren a2d8f92985 usb: ci_udc: pre-allocate ep0 req
Allocate ep0's USB request object when the UDC driver is probed. This
solves a couple of issues in the current code:

a) A request object always exists for ep0. Prior to this patch, if setup
transactions arrived in an unexpected order, handle_setup() would need
to reply to a setup transaction before any ep0 usb_req was created.

This issue was introduced in commit 2813006fec "usb: ci_udc: allow
multiple buffer allocs per ep."

b) handle_ep_complete no longer /has/ to queue the ep0 request again
after every single request completion. This is currently required, since
handle_setup() assumes it can find some request object in ep0's request
queue. This patch doesn't actually stop handle_ep_complete() from always
requeueing the request, but the next patch will.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-01 19:22:40 +02:00
Stephen Warren 054731b09e usb: ci_udc: use a single descriptor for ep0
ci_udc currently points ep->desc at separate descriptors for IN and OUT.
These descriptors only differ in the ep address IN/OUT field. Modify the
code to use a single descriptor, and change that descriptor's ep address
to indicate IN/OUT as required. This removes some data duplication.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-01 19:22:40 +02:00
Stephen Warren 7484d84cbb usb: ci_udc: detect queued requests on ep0
The flipping of ep0 between IN and OUT relies on ci_ep_queue() consuming
the current IN/OUT setting immediately. If this is deferred to a later
point when the req is pulled out of ci_req->queue, then the IN/OUT
setting may have been changed since the req was queued, and state will
get out of sync. This condition doesn't occur today, but could if bugs
were introduced later, and this error-check will save a lot of debugging
time.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-06-01 19:22:39 +02:00
Lukasz Majewski bd694244db dfu: Introduction of the "dfu_hash_algo" env variable for checksum method setting
Up till now the CRC32 of received data was calculated unconditionally.
The standard crc32 implementation causes long delay when large images
were uploaded.

The "dfu_hash_algo" environment variable gives the opportunity to
disable on demand the hash (crc32) calculation.
It can be done without the need to recompile the u-boot binary.

By default the crc32 is calculated, which means that legacy behavior
has been preserved.

Tests results:
400 MiB ums.img file
With 		crc32 calculation: 65 sec [avg 6.29 MB/s]
Without 		crc32 calculation: 25 sec [avg 16.17 MB/s]

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2014-06-01 19:18:00 +02:00
Tom Rini 90b51c33f3 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-05-30 11:34:39 -04:00
Simon Glass e1bf824dfd Add cli_ prefix to readline functions
This makes it clear where the code resides.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-05-29 17:45:31 -04:00
Simon Glass 18d66533ac move CLI prototypes to cli.h and add comments
Move the CLI prototypes from common.h to cli.h as part of an effort to
reduce the size of common.h.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-05-29 17:45:31 -04:00
Eric Nelson 3a56482590 serial_mxc: disable new features of autobaud detection
Bit 7 of UCR3 is described in the i.MX3x/i.MX5x/i.MX6x
reference manuals as follows:

	Autobaud Detection Not Improved-. Disables new features of
	autobaud detection (See Baud Rate Automatic Detection
        Protocol, for more details).

	0 Autobaud detection new features selected
	1 Keep old autobaud detection mechanism

On at least i.MX6DQ, i.MX6DLS and i.MX53, the "new features"
occasionally cause the receiver to get out of sync and
continuously produce received characters of '\xff'.

This patch disables the "new feature" on all boards, since
there's no support for auto-baud in U-Boot on any of them.

More details are available in this post on i.MX Community:
	https://community.freescale.com/message/403254

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-05-28 17:37:47 +02:00
Aaron Durbin 0b259dc2e8 power: Explicitly select pmic device's bus
The current pmic i2c code assumes the current i2c bus is
the same as the pmic device's bus. There is nothing ensuring
that to be true. Therefore, select the proper bus before performing
a transaction.

Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-28 10:58:19 +09:00
Tom Wai-Hong Tam ac1058fdb7 power: Add support for TPS65090 PMU chip.
This adds driver support for the TPS65090 PMU. Support includes
hooking into the pmic infrastructure  so that the pmic commands
can be used on the console. The TPS65090 supports the following
functionality:

- fet enable/disable/querying
- getting and setting of charge state

Even though it is connected to the pmic infrastructure it does
not hook into the pmic charging charging infrastructure.

The device tree binding is from Linux, but only a small subset of
functionality is supported.

Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org>
Signed-off-by: Rong Chang <rongchang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-28 10:58:19 +09:00
Simon Glass 78a36c3ef3 power: Add PMIC_ prefix to CHARGER_EN/DISABLE
This enum should be common across all PMICs rather than having it
independently defined with the same name in multiple places.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-28 10:58:18 +09:00
Simon Glass 913702ca39 power: Rename CONFIG_PMIC_... to CONFIG_POWER_...
Commit be3b51aa did this mostly, but several have been added since. Do the
job again.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-28 10:58:18 +09:00
Heiko Schocher 54c5d08a09 dm: rename device struct to udevice
using UBI and DM together leads in compiler error, as
both define a "struct device", so rename "struct device"
in include/dm/device.h to "struct udevice", as we use
linux code (MTD/UBI/UBIFS some USB code,...) and cannot
change the linux "struct device"

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
2014-05-27 10:21:32 -04:00
Wu, Josh 9902c7b6f1 mmc: atmel_mci: fix print incorrect buffer content for debug
Signed-off-by: Josh Wu <josh.wu@atmel.com>
[fix checkpatch line length warning]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-05-27 00:10:46 +02:00
Wu, Josh 7d82d89772 gpio: at91: add sanity check for the NULL pointer
We need check the NULL pointer as at91_pio_get_port() may return NULL.

Also print a error message when at91_pio_get_port() failed otherwise we
cannot notice the failure.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-05-27 00:10:45 +02:00
Ian Campbell 49692c5f51 net/designware: Make DMA burst length configurable and reduce by default
The correct value for this setting can vary across SoCs and boards, so make it
configurable.

Also reduce the default value to 8, which is the same default as used in the
Linux driver.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
2014-05-25 17:23:58 +02:00
Ian Campbell 1857075a7f net/designware: reorder struct dw_eth_dev to pack more efficiently.
On Thu, 2014-05-08 at 22:26 +0100, Ian Campbell wrote:
> The {r,t}xbuffs fields also need to be aligned. Previously this was done
> implicitly because they immediately followed the descriptor tables. Make this
> explicit and also move to the head of the struct.

Looks like I managed to not actually commit the move of the field to the
head of the struct! v3.1 follows....

Ian.

8<------------

>From 2937ba01841887317f6792709ed57cb86b5fc0cd Mon Sep 17 00:00:00 2001
From: Ian Campbell <ijc@hellion.org.uk>
Date: Thu, 1 May 2014 19:45:15 +0100
Subject: [PATCH] net/designware: reorder struct dw_eth_dev to pack more
 efficiently.

The {tx,rx}_mac_descrtable fields are aligned to ARCH_DMA_MINALIGN, which could
be 256 or even larger. That means there is a potentially huge hole in the
struct before those fields, so move them to the front where they are better
packed.

Moving them to the front also helps ensure that so long as dw_eth_dev is
properly aligned (which it is since "net/designware: ensure device private data
is DMA aligned.") the {tx,rx}_mac_descrtable will be too, or at least avoids
having to worry too much about compiler specifics.

The {r,t}xbuffs fields also need to be aligned. Previously this was done
implicitly because they immediately followed the descriptor tables. Make this
explicit and also move to the head of the struct.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Tested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
2014-05-25 17:23:48 +02:00
Ian Campbell 964ea7c1ce net/designware: ensure cache invalidations are aligned to ARCH_DMA_MINALIGN
This is required at least on ARM.

When sending instead of simply invalidating the entire descriptor, flush
as little as possible while still respecting ARCH_DMA_MINALIGN, as
requested by Alexey.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
2014-05-25 17:23:15 +02:00
Ian Campbell 1c848a2586 net/designware: ensure device private data is DMA aligned.
struct dw_eth_dev contains fields which are accessed via DMA, so make sure it
is aligned to a dma boundary. Without this I see:
    ERROR: v7_dcache_inval_range - start address is not aligned - 0x7fb677e0

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Marek Vasut <marex@denx.de>
2014-05-25 17:23:12 +02:00
Ian Campbell e24ea55c04 sunxi: mmc support
On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote:
> > +	case 1:
> > +#if CONFIG_MMC1_PG

> Are you sure that this is correct and shouldn't be:
>
> +#ifdef CONFIG_MMC1_PG
>
> ?

It's "correct" in so far as it works (the boards.cfg config stuff
#defines things to 1), but I think you are right that it isn't the
preferred style. But...

> A quick scan through this patch series shows that this define
> is not set at all. Perhaps its outdated? Or is it used to support
> some other sunxi SoC? Not sure, perhaps it should be removed for
> now.

...I had thought that it was to support some other board which wasn't
being upstreamed right now, so eventually useful and harmless for now,
but I've just checked and it isn't actually used by any of the boards in
u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it.
Rather than resend the entire series, here is v5.1 of this patch.

> Other than this please add my:
>
> Reviewed-by: Stefan Roese <sr@denx.de>

Thanks!

8<---------------------------------

>From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001
From: Ian Campbell <ijc@hellion.org.uk>
Date: Fri, 7 Mar 2014 04:29:39 +0000
Subject: [PATCH v5.1 7/8] sunxi: mmc support

This adds support for the MMC controller on the Allwinner A20 (sun7i)
processor.

Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Luke Leighton <lkcl@lkcl.net>
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Wills Wang <wills.wang.open@gmail.com>
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Tom Cubie <Mr.hipboi@gmail.com>
Cc: Aaron Maoye <leafy.myeh@allwinnertech.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: Tom Rini <trini@ti.com>
2014-05-25 16:26:43 +02:00
Albert ARIBAUD c534d2fdcf Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master' 2014-05-23 22:50:23 +02:00
Tom Rini 10dc77716f esdhc/usdhc: Fix warning when CONFIG_SYS_FSL_ESDHC_USE_PIO is not set
In 7168977 we made calls to check_and_invalidate_dcache_range()
conditional on !CONFIG_SYS_FSL_ESDHC_USE_PIO.  Only define this function
in this case as well.

Signed-off-by: Tom Rini <trini@ti.com>
2014-05-23 09:19:05 -04:00
Tom Rini 638b3e8342 Merge branch 'master' of git://git.denx.de/u-boot-mmc 2014-05-23 08:13:59 -04:00
Stephen Warren d235628434 mmc: provide a select_hwpart implementation for get_device()
This enables specifying which eMMC HW partition to target for any U-Boot
command that uses the generic get_partition() function to parse its
command-line arguments.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-05-23 12:11:44 +03:00
Pierre Aubert 91fdabc67a eMMC: add support for operations in RPMB partition
This patch adds functions for read, write and authentication
key programming for the Replay Protected Memory Block partition
in the eMMC.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
2014-05-23 11:52:51 +03:00
Andrew Gabbasov 6b2221b008 mmc: Handle switch error status bit in MMC card status
MMC switch command for unsupported feature (e.g. bus width) sets a switch
error bit in card status. This bit should be checked, and, if it's set,
no access with new controller settings should be performed.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2014-05-23 11:34:33 +03:00
Mateusz Zalega d803fea576 mmc: postponed needless timer initialization
mmc_init() doesn't call get_timer() anymore if MMC is already
initialized.

<panto> Minor formatting fix.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
2014-05-23 11:19:53 +03:00
Tom Rini 4d16f67e7b Merge branch 'fpga' of git://www.denx.de/git/u-boot-microblaze 2014-05-22 14:38:19 -04:00
Tom Rini f6ed9d5094 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-05-22 14:29:41 -04:00
Tom Rini 8e38128596 Merge branch 'pr-15052014' of git://git.denx.de/u-boot-usb 2014-05-22 13:42:26 -04:00
Tom Rini c9afa7cea8 Merge branch 'master' of git://git.denx.de/u-boot-usb 2014-05-22 12:56:15 -04:00
Ye.Li 716897760f esdhc/usdhc: Fix PIO mode bug in fsl_esdhc driver
When configure the fsl_esdhc driver to PIO mode by defining
"CONFIG_SYS_FSL_ESDHC_USE_PIO", the SD/MMC read and write will fail.

Two bugs in the driver to cause the issue:
1. The read buffer was invalidated after reading from DATAPORT register,
which should be only applied to DMA mode. The valid data in cache was
overwritten by physical memory.
2. The watermarks are not set in PIO mode, will cause according state not
be set.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
2014-05-22 18:52:45 +03:00
Siva Durga Prasad Paladugu 1a897668ac fpga: Added support to load bit stream from SD/MMC
Added support to load a bitstream image in chunks by reading it in
chunks from SD/MMC.
Command format:
loadfs [dev] [address] [image size] [blocksize] <interface>
       [<dev[:part]>] <filename>
Example: fpga loadfs 0 1000000 3dbafc 4000 mmc 0 fpga.bin

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-20 15:23:46 +02:00
Michal Simek 5b815c9c61 fpga: zynqpl: Clean partial bitstream handling
Do not do partial bitstream detection based on bitstream
size and use bitstream_type argument which is passed
from the fpga core.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-20 15:23:46 +02:00
Michal Simek 7a78bd2679 fpga: Define bitstream type based on command selection
Clean up partial, full and compressed bitstream handling.
U-Boot supports full bitstream loading and partial
based on detection which is not 100% correct.
Extending fpga_load/fpga_loadbitstream() with one more
argument which stores bitstream type.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-20 15:23:46 +02:00
Albert ARIBAUD 05d134b084 Merge remote-tracking branch 'u-boot/master'
Conflicts:
	boards.cfg

Conflicts were trivial once u-boot-arm/master boards.cfg was
reformatted (commit 6130c146) to match u-boot/master's own
reformatting (commit 1b37fa83).
2014-05-20 10:05:42 +02:00
Tom Rini d7782d0653 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2014-05-16 18:30:33 -04:00
Nikhil Badola 15231f6dd1 drivers/usb : Define usb control register mask for w1c bits
Define and use CONTROL_REGISTER_W1C_MASK to make sure that
w1c bits of usb control register do not get reset while
writing any other bit

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-05-16 16:24:27 -05:00
Chunhe Lan f1a96ec1a9 fsl/pci: Add workaround for erratum A-005434
By default, all PEX inbound windows PEX_PEXIWARn[TRGT] are
mapped to 0xF, which is local memory. But for BSC9132, 0xF
is CCSR, 0x0 is local memory.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-05-16 16:24:26 -05:00
Chunhe Lan ffc8667acf net: phy/vitesse: Add support for VSC8664 phy module
This patch adds support for VSC8664 PHY module which can
be found on Freescale's T4240RDB boards.

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-05-16 16:24:05 -05:00
Albert ARIBAUD 6a2f30a03a Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2014-05-16 17:56:50 +02:00
Albert ARIBAUD a90bed77a6 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2014-05-16 16:49:50 +02:00
Jaehoon Chung 9b8c9a3c09 mmc: s5p_sdhci: add the s5p_sdhci_core_init function
To reuse the code, added the s5p_sdhci_core_init function.
Before applied this patch, didn't use the 8-bit mode at exynos baord.
Because it didn't set "MMC_MODE_8BIT".

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung e09bd85329 mmc: exynos_dw_mmc: enable the DDR mode
Set the ddr mode capability by default.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung 045bdcd0b2 mmc: dw_mmc: support the DDR mode
Support the DDR mode at dw-mmc controller

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung d22e3d46a9 mmc: support the DDR mode for eMMC
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung 8caf46d189 mmc: remove the unnecessary define and fix the wrong bit control
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Lukasz Majeski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Jaehoon Chung 959198f7ca mmc: exynos_dw_mmc: restore the property into host
Restore the platdata(property of dt) into host struct.
Then data's information is maintained and reused anywhere.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-05-16 14:54:26 +09:00
Albert ARIBAUD 44cfc3a83f Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master' 2014-05-15 17:19:45 +02:00
Albert ARIBAUD 9f5f51540d Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' 2014-05-15 16:36:02 +02:00
Stefano Babic e7f9350525 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-05-15 10:27:32 +02:00
Lukasz Majewski c8151b4a5d dfu: mmc: Provide support for eMMC boot partition access
Before this patch it was only possible to access the default eMMC HW
partition. By partition selection I mean the access to eMMC via the
ext_csd[179] register programming.

It sometimes happens that it is necessary to write to other partitions.
This patch adds extra attribute to "raw" sub type of the dfu_alt_info
environment variable (e.g. boot-mmc.bin raw 0x0 0x200 mmcpart 1;)

It saves the original boot value and restores it after storing the file.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
2014-05-15 00:24:24 +02:00
Przemyslaw Marczak 584b55b072 usb:gadget:f_thor: download_tail(): remove dfu_write with 0 size
Since dfu_flush() can write raw data, dfu_write() with zero size
can be removed from download_tail() in thor gadget.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
2014-05-15 00:23:56 +02:00
Przemyslaw Marczak 1aa4bdc82d drivers:dfu: dfu_flush(): add raw data flush to complete dfu write
Before dfu write and flush operations separation,
dfu write data was flushed by host download request
with len of zero size.

Since above change manually calling dfu write with zero
size has non sense (e.g. in THOR). This should be done by
flush operation.
So now dfu_write_buffer_drain() is called in dfu_flush().
If there is any raw data to flush (like it can be in thor)
then it will be physically written to medium.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
2014-05-15 00:23:56 +02:00
Stephen Warren 8630c1c7e3 usb: ci_udc: parse QTD before over-writing it
ci_udc only allocates a single QTD structure per EP. All data needs to be
extracted from the DTD prior to calling ci_ep_submit_next_request(), since
that fills the QTD with next transaction's parameters. Fix
handle_ep_complete() to extract the transaction (remaining) length before
kicking off the next transaction.

In practice, this only causes writes to UMS devices to fail for me. I may
have tested the final versions of my previous ci_udc patch only with
reads. More recently, I had patches applied locally that allocated a QTD
per USB request rather than per USB EP, although since that doesn't give
any performance benefit, I'm dropping those.

Fixes: 2813006fec ("usb: ci_udc: allow multiple buffer allocs per ep")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-05-15 00:21:30 +02:00
Stephen Warren a4539a2aa7 usb: tegra: support device mode
A few changes are made to the Tegra EHCI driver so that it can set
everything up for device-mode operation on the first USB controller.
This can be used in conjunction with ci_udc.c to operate as a USB
device.

Detailed changes are:

* Rename set_host_mode() to set_up_vbus() since that's really what it
  does.

* Modify set_up_vbus() to know whether it's initializing in host or
  device mode, and:

  - Skip the external VBUS check in device mode, since external VBUS is
    expected in this case.

  - Disable VBUS output in device mode.

* Modify init_phy_mux() to know whether it's initializing in host or
  device mode, and hence skip setting USBMODE_CM_HC (which enables host
  mode) in device mode. See the comments in that function for why this
  is safe w.r.t. the ordering requirements of PHY selection.

* Modify init_utmi_usb_controller() to force "b session valid" in device
  mode, since the HW requires this. This is done in UTMI-specific code,
  since we only support device mode on the first USB controller, and that
  controller can only talk to a UTMI PHY.

* Enhance ehci_hcd_init() to error-check the requested host-/device-mode
  vs. the dr_mode (dual-role mode) value present in device tree, and the
  HW configurations which support device mode.

* Enhance ehci_hcd_init() not to skip HW initialization when switching
  between host and device mode on a controller. This requires remembering
  which mode the last initialization used.

Cc: Jim Lin <jilin@nvidia.com>
Cc: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-05-15 00:21:17 +02:00
Stephen Warren 2d34151f75 usb: tegra: refactor PHY type selection
Both init_{utmi,ulpi}_usb_controller() have nearly identical code for
PHY type selection. Pull this out into a common function to remove the
duplication.

Cc: Jim Lin <jilin@nvidia.com>
Cc: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-05-15 00:21:17 +02:00
Stephen Warren 9b20fe6f1a usb: tegra: fix PHY selection code
The TRM for Tegra30 and later all state that USBMODE_CM_HC must be set
before writing to hostpc1_devlc to select which PHY to use for a USB
controller. However, neither init_{utmi,ulpi}_usb_controller() do this
today, so the register writes they perform for PHY selection do not
work.

For the UTMI case, this was hacked around in commit 7e44d9320e "ARM:
Tegra: USB: EHCI: Add support for Tegra30/Tegra114" by adding code to
ehci_hcd_init() which sets USBMODE_CM_HC and duplicates the PHY
selection register write. This code doesn't cover the ULPI case, so I
wouldn't be surprised if ULPI doesn't work with the current code, unless
the ordering requirement only ends up being an issue in HW for UTMI not
ULPI.

This patch fixes init_{utmi,ulpi}_usb_controller() to correctly set
USBMODE_CM_HC before selecting the PHY. Now that this works, we can
remove the duplicate UTMI-specific code in ehci_hcd_init(), thus
simplifying that function.

Cc: Jim Lin <jilin@nvidia.com>
Cc: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-05-15 00:21:17 +02:00
Marek Vasut 4180b3dba2 Merge remote-tracking branch 'u-boot/master' into test 2014-05-15 00:20:54 +02:00
Hans de Goede 2072e72629 mvtwsi: Remove unnecessary twsi_baud_rate and twsi_slave_address globals
These are used only once, so their is no need to have them global.

This also stops mvtwsi from using any bss vars making it easier to use
before dram init (to talk to the pmic to set the dram voltage).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-05-14 12:59:12 +02:00
Hans de Goede fab356a0b8 mvtwsi: Fix clock programming
The TWSI_FREQUENCY macro was wrong in 2 ways:
1) It was casting the result of the calculations to an u8, while i2c clk
rates are often >= 100Khz which won't fit in a u8, drop the cast.
2) It had an extra factor of 2 in the divider which neither the datasheet nor
the Linux driver have.

The comment for the default value was wrongly saying that m lives in
bits 4-7, while in reality it is in bits 3-6, as can be seen from the correct
shift by 3 used in i2c_init().

While at it remove the unused twsi_actual_speed variable.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-05-14 12:58:55 +02:00
Michal Simek eb8c54bfaa ARM: zynq: ehci: Added USB host driver support
Added USB host driver for zynq.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-14 07:43:35 +02:00
Belisko Marek 97eeae1a07 mtd: nand: omap_gpmc: Fix update of read_ecc in oob
We need to flip only one bit not assign.

Signed-off-by: Marek Belisko <marek.belisko@gmail.com>
Acked-by: Pekon Gupta <pekon@ti.com>
2014-05-13 19:48:17 -04:00