Commit graph

233 commits

Author SHA1 Message Date
Govindraj Raja
4adcb2380c MIPS: fix syntax for fdt_chosen/initrd.
The syntax for the fdt_chosen/initrd
functions seem to deprecated in usage
from MIPS bootm implementation.

Third parameter is no more used in these api's
Refer to : include/fdt_support.h

Signed-off-by: Govindraj Raja <govindraj.raja@imgtec.com>
2015-08-21 15:22:41 +02:00
Chris Packham
73a4152b25 mips: Use unsigned int when reading c0 registers
In commit a18a477 (MIPS: use common code from lib/time.c) MIPS platforms
started using common the common timer functions which are based around
the fact that many platforms have a 32-bit free running counter register
that can be used see commit 8dfafdd (Introduce common timer functions).

Even MIPS64 has such a 32-bit register (some have an additional 64-bit free
running counter, but that's something for another time).

The problem is that in __read_32bit_c0_register() we read the value from
this register into an _signed_ int and as it's returned up the call
chain to timer_read_counter() it gets assigned to an unsigned long. On a
32-bit system there is no problem. On a 64-bit system odd things happen,
sign extension seems to kick in and all of a sudden if the counter
register happens to have the MSb (i.e. the sign bit) set the negative
int gets sign extended into a very large unsigned long value. This in
turn throws out things from get_ticks() up.

Update __read_32bit_c0_register() and __read_32bit_c0_ctrl_register() to
use "unsigned int res;" instead of "int res;". There seems to be little
reason to treat these register values as signed. They are either
counters (which by definition are unsigned) or are made up of various
bit fields to be interpreted as per the CPU datasheet.

Reported-by: Sachin Surendran <sachin.surendran@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
2015-08-21 15:22:41 +02:00
Daniel Schwierzeck
b11c5d1dc2 MIPS: change 'extern inline' to 'static inline'
The kernel changed it a long time ago. Also this is now broken
on gcc-5.x.

Reported-by: Andy Kennedy <andy.kennedy@adtran.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-07-02 11:29:33 +02:00
Tony Wu
49bbdae318 MIPS: fix missing semicolon in cacheops.h
Fix missing semicolon in cacheops.h introduced in commit
2b8bcc5a2 (MIPS: avoid .set ISA for cache operations)

Signed-off-by: Tony Wu <tung7970@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
2015-07-02 11:29:33 +02:00
Joe Hershberger
c9bb942e2f Move default y configs out of arch/board Kconfig
Some archs/boards specify their own default by pre-defining the config
which causes the Kconfig system to mix up the order of the configs in
the defconfigs... This will cause merge pain if allowed to proliferate.

Remove the configs that behave this way from the archs.

A few configs still remain, but that is because they only exist as
defaults and do not have a proper Kconfig entry. Those appear to be:

SPIFLASH
DISPLAY_BOARDINFO

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
[trini: rastaban, am43xx_evm_usbhost_boot, am43xx_evm_ethboot updates,
drop DM_USB from MSI_Primo81 as USB_MUSB_SUNXI isn't converted yet to DM]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-06-25 22:17:55 -04:00
Joe Hershberger
a26cd04920 arch: Make board selection choices optional
By making the board selections optional, every defconfig will include
the board selection when running savedefconfig so if a new board is
added to the top of the list of choices the former top's defconfig will
still be correct.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tom Rini <trini@konsulko.com>
2015-05-12 18:10:02 -04:00
Daniel Schwierzeck
90b1c9fad7 MIPS: implement device-tree handover to Linux kernel
Add device-tree handover to Linux kernel conforming with MIPS UHI [1].
Register $a0 will be set to the reserved value -2. The address of
the device-tree blob will be stored as KSEG0 address in $a1. $a2 and
$a3 are set to zero.

[1] http://prplfoundation.org/wiki/MIPS_documentation

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-04-24 12:15:34 +02:00
Joe Hershberger
1fd92db83d net: cosmetic: Fix var naming net <-> eth drivers
Update the naming convention used in the network stack functions and
variables that Ethernet drivers use to interact with it.

This cleans up the temporary hacks that were added to this interface
along with the DM support.

This patch has a few remaining checkpatch.pl failures that would be out
of the scope of this patch to fix (drivers that are in gross violation
of checkpatch.pl).

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-04-18 11:11:33 -06:00
Joe Hershberger
8b2c9a7157 net: Provide a function to get the current MAC address
The current implementation exposes the eth_device struct to code that
needs to access the MAC address.  Add a wrapper function for this to
abstract away the pointer for this operation.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-04-18 11:11:10 -06:00
Masahiro Yamada
0a12e6872e generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig
Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-03-28 09:03:08 -04:00
Daniel Schwierzeck
eef88dfb3e MIPS: unify CPU code in arch/mips/cpu/
Unify and move code in arch/mips/cpu/mips[32|64]/ to arch/mips/cpu/.
The CPU specific config.mk files need to remain until
CONFIG_STANDALONE_LOAD_ADDR is converted to a global Kconfig symbol.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-30 14:19:58 +01:00
Daniel Schwierzeck
d9a4a6223c MIPS: move au1x00 SoC code to arch/mips/mach-au1x00
Move all au1x00 code out of arch/mips/cpu/mips32 to allow
unification of CPU code in a later patch. The reorganization
of the SoC specific header files will be done in a later patch
series.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
2015-01-30 14:19:58 +01:00
Paul Burton
f1c64a0810 MIPS: handle mips64 ST0_KX bit in mips32 start.S
In preparation for sharing a single copy of start.S between mips32 &
mips64, handle setting the KX bit of the cop0 Status register when the
mips32 start.S is built for mips64.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-30 14:19:58 +01:00
Paul Burton
ab0d002677 MIPS: handle mips64 relocs in mips32 start.S
In preparation for sharing a single copy of start.S between mips32 &
mips64, handle mips64 relocations in the mips32 start.S when built for
mips64.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-30 14:19:58 +01:00
Paul Burton
a39b1cb7f0 MIPS: use asm.h macros in mips32 start.S
Where the mips32 & mips64 implementations of start.S differ in terms of
access sizes & offsets, use the appropriate macros from asm.h to
abstract those differences away. This is in preparation for sharing a
single copy of start.S between mips32 & mips64.

The exception to this is loads of immediates to be written to the cop0
Config register, which is a 32bit register on mips64 and therefore
constants written to it can be loaded as such.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-30 14:19:57 +01:00
Paul Burton
ba21a453a5 malta: IDE support
This patch adds IDE support to the MIPS Malta board. The IDE controller
is enabled after probing the PCI bus and otherwise just makes use of
U-boot generic IDE support.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 13:11:02 +01:00
Paul Burton
8755d50706 MIPS: clear TagLo select 2 during cache init
Current MIPS cores from Imagination Technologies use TagLo select 2 for
the data cache. The architecture requires that it is safe for software
to write to this register even if it isn't present, so take the trivial
option of clearing both selects 0 & 2.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 12:55:01 +01:00
Paul Burton
dd7c72006e MIPS: allow systems to skip loads during cache init
Current MIPS systems do not require that loads be performed to force the
parity of cache lines, a simple invalidate by clearing the tag for each
line will suffice. Thus this patch makes the loads & subsequent second
invalidation conditional upon the CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD
option, and defines that for existing mips32 targets. Exceptions are
malta where this is known to be unnecessary, and qemu-mips where caches
are not implemented.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 12:55:01 +01:00
Paul Burton
ca4e833cd6 MIPS: inline mips_init_[id]cache functions
The mips_init_[id]cache functions are small & only called once from a
single callsite. Inlining them allows mips_cache_reset to avoid having
to bother moving arguments around & leaves it a leaf function which is
thus able to simply keep the return address live in the ra register
throughout, simplifying the code.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 12:55:01 +01:00
Paul Burton
ac22feca11 MIPS: refactor cache loops to a macro
Reduce duplication by performing loops through cache tags using an
assembler macro.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 12:55:01 +01:00
Paul Burton
536cb7ce1a MIPS: refactor L1 cache config reads to a macro
Reduce duplication between reading the configuration of the L1 dcache &
icache by performing both using a macro which calculates the appropriate
line & cache sizes from the coprocessor 0 Config1 register.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 12:55:01 +01:00
Paul Burton
4a5d8898bc MIPS: unify cache initialization code
The mips32 & mips64 cache initialization code differs only in that the
mips32 code supports reading the cache size from coprocessor 0 registers
at runtime. Move the more developed mips32 version to a common
arch/mips/lib/cache_init.S & remove the now-redundant mips64 version in
order to reduce duplication. The temporary registers used are shuffled
slightly in order to work for both mips32 & mips64 builds. The RA
register is defined differently to suit mips32 & mips64, but will be
removed by a later commit in the series after further cleanup.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 12:55:01 +01:00
Paul Burton
30374f98d1 MIPS: unify cache maintenance functions
Move the more developed mips32 version of the cache maintenance
functions to a common arch/mips/lib/cache.c, in order to reduce
duplication between mips32 & mips64.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 12:55:00 +01:00
Paul Burton
2b8bcc5a2f MIPS: avoid .set ISA for cache operations
As a step towards unifying the cache maintenance code for mips32 &
mips64 CPUs, stop using ".set <ISA>" directives in the more developed
mips32 version of the code. Instead, when present make use of the GCC
builtin for emitting a cache instruction. When not present, simply don't
bother with the .set directives since U-boot always builds with
-march=mips32 or higher anyway.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-29 12:55:00 +01:00
Daniel Schwierzeck
e520023882 MIPS: add support for pre-relocation malloc
Implement MIPS specific setup of the gd_t structure to support
pre-relocation malloc. If CONFIG_SYS_MALLOC_F_LEN is specified,
a memory area will be reserved after the initial stack area and
the gd->malloc_base pointer will be initialized.

After this patch the new driver model can be used on MIPS.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:07:23 +01:00
Daniel Schwierzeck
dd82128ef5 MIPS: add support for CONFIG_SYS_INIT_SP_ADDR
Support the existing config option CONFIG_SYS_INIT_SP_ADDR on
MIPS. This allows to move the initial stack to other places
than the beginning of RAM.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:07:16 +01:00
Daniel Schwierzeck
9d638eeab7 MIPS: add Kconfig option for CONFIG_SWAP_IO_SPACE
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:06:51 +01:00
Daniel Schwierzeck
c57dafb5b4 MIPS: replace $(CPU) with Kconfig symbols
Conditionally set head-y and lib-y with boolean Kconfig symbols
for selected CPU. This deprecates the usage of the $(CPU) variable.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:06:04 +01:00
Thomas Langer
a18a477147 MIPS: use common code from lib/time.c
The common code just needs the C0_COUNT as free running counter,
without the need of writing and checking C0_COMPARE.

The function get_tbclk() is still implemented here instead of changing
all places of CONFIG_SYS_MIPS_TIMER_FREQ to CONFIG_SYS_TIMER_RATE.

The change was tested on a MIPS32 system, but as the MIPS64 code
was/is the same, this should be no problem.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
2015-01-21 14:02:49 +01:00
Daniel Schwierzeck
e13a50b34b MIPS: bootm: add bootstage reporting
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:02:49 +01:00
Daniel Schwierzeck
5002d8cc54 MIPS: bootm: prepare a flattened device tree for the kernel
Add the initial code to prepare a flattened device tree for
the kernel like relocating the FDT blob and fixing up the
/chosen and /memory nodes.

The final hand over to the kernel is not yet implemented. After
the community agreed on the MIPS boot interface for device trees,
the corresponding code will be added.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:02:49 +01:00
Daniel Schwierzeck
8cec725ad5 MIPS: bootm: add mem, rd_start and rd_size to kernel command line
If the user wants to boot a kernel without legacy environment,
information like memory size, initrd address and size should be
handed over to the kernel in the command line.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:02:48 +01:00
Daniel Schwierzeck
ca65e5851f MIPS: bootm: refactor preparation of Linux kernel environment
Move preparation of Linux kernel environment in a separate
function and mark it as legacy. Add a Kconfig option to make
that legacy mode configurable.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:02:48 +01:00
Daniel Schwierzeck
25fc664f40 MIPS: bootm: refactor preparation of Linux kernel command line
Move preparation of Linux kernel command line in a separate
function and mark it as legacy. Add a Kconfig option to make
that legacy mode configurable.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2015-01-21 14:02:48 +01:00
Masahiro Yamada
afc366f01b Replace <compiler.h> with <linux/compiler.h>
Including <linux/compiler.h> is enough for general use.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-08 09:35:46 -05:00
Daniel Schwierzeck
e19db555b4 Kbuild: introduce Makefile in arch/$ARCH/
Introduce a Makefile under arch/$ARCH/ and include it in the
top Makefile (similar to Linux kernel). This allows further
refactoringi like moving architecture-specific code out of global
makefiles, deprecating config variables (CPU, CPUDIR, SOC) or
deprecating arch/$ARCH/config.mk.

In contrary to Linux kernel, U-Boot defines the ARCH variable by
Kconfig, thus the arch Makefile can only included conditionally
after the top config.mk.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-12-08 09:35:45 -05:00
Daniel Schwierzeck
6cec63d59d MIPS: bootm: remove unused or redundant header files
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-11-27 16:20:37 +01:00
Daniel Schwierzeck
c9639421fd MIPS: bootm: add missing initramfs relocation
The initramfs is currently only relocated if the user calls
the bootm ramdisk subcommand. If bootm should be used without
subcommands, the arch-specific bootm code needs to implement
the relocation.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-11-27 16:20:37 +01:00
Daniel Schwierzeck
426f87045c MIPS: remove board.c
After all MIPS boards are switched to generic-board, the
MIPS specific board.c can be removed.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-11-27 16:20:37 +01:00
Daniel Schwierzeck
6d08e22aca MIPS: fix setup of initial stack frame
To get correct stack walking and backtrace functionality in gdb,
registers fp and ra should be initialized before calling board_init_f
or board_init_r. Thus allocating stack space and zeroing it as it is
currently done in board.c becomes obsolete.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-11-27 16:20:37 +01:00
Masahiro Yamada
56f31e872e kbuild: use SoC-specific CONFIG to descend into SoC directory
Use "obj-$(CONFIG_FOO) += foo/" where it is possible.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-23 06:49:02 -05:00
Masahiro Yamada
165ecd26f0 kbuild: Descend into SOC directory from CPU directory
Some CPUs of some architectures have SOC directories.
At present, the build system directly descends into SOC directories
from the top Makefile, but it should generally descend into each
directory from its parent directory.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-23 06:49:02 -05:00
Masahiro Yamada
cba1da495d include: move various macros to include/linux/kernel.h
U-Boot has imported various utility macros from Linux
scattering them to various places without consistency.

In include/common.h are min, max, min3, max3, ARRAY_SIZE, ALIGN,
container_of, DIV_ROUND_UP, etc.
In include/linux/compat.h are min_t, max_t, round_up, round_down,
etc.
We also have duplicated defines of min_t in some *.c files.

Moreover, we are suffering from too cluttered include/common.h.

This commit moves various macros that originate in
include/linux/kernel.h of Linux to their original position.

Note:
This commit simply moves the macros; the macros roundup,
min, max, min2, max3, ARRAY_SIZE are different
from those of Linux at this point.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-11-20 11:28:25 -05:00
Daniel Schwierzeck
265072ba75 MIPS: add .padding section to linker script
Commit 79fd7e649e

    MIPS: always keep all sections in u-boot ELF binary.

    Always keep all sections in u-boot ELF binary. Move all unneeded
    sections after _end to avoid allocating space in the final binary.
    Also remove .deadcode section which is now obsolete.

removed section .deadcode because the original symptoms were not
visible anymore. Unfortuneatly the binutils bug still exists.

The size of .rel.dyn section is often bigger than needed for all
entries. But objcopy only allocates space as much as required for all
reloc entries. Thus there is a gap between the last entry and
__rel_dyn_end in u-boot.bin. If u-boot is booted from RAM (e.g. in
SPL scenarios) that area could contain garbage data which could lead
to CPU exceptions during relocation.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-11-01 18:18:05 +01:00
Daniel Schwierzeck
837cad1e47 MIPS: refactor setting of compiler options
Refactor and unify all compiler settings in arch/mips/config.mk.
Also add tune flags for each supported CPU type.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-11-01 18:18:05 +01:00
Daniel Schwierzeck
aa45f75eaf MIPS: kconfig: merge targets qemu_mips and qemu_mips64
Now the user can separately select the CPU type. Thus the
targets qemu_mips and qemu_mips64 can be merged to a single
target.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-11-01 18:18:04 +01:00
Daniel Schwierzeck
b9863b6de2 MIPS: kconfig: globally define CONFIG_SYS_CPU for MIPS
Now the user can select the CPU type for each target. Thus
CONFIG_SYS_CPU could be set globally.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-11-01 18:18:04 +01:00
Daniel Schwierzeck
02611cbb7c MIPS: kconfig: add options for CPU type select
Add new Kconfig option to let the user select the targets
CPU type. Each target have to select SUPPORTS_CPU_MIPS[32,64]_R[1,2]
to indicate which CPU types are supported.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-11-01 18:18:03 +01:00
Daniel Schwierzeck
0e1dc3456f MIPS: kconfig: add options for endianess select
Add new Kconfig option to let the user select the targets
endianess. Each target have to select SUPPORTS_BIG_ENDIAN
and/or SUPPORTS_LITTLE_ENDIAN to indicate which endianess
is supported.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-11-01 18:17:22 +01:00
Masahiro Yamada
7bfd5ee117 mips: enable CONFIG_USE_PRIVATE_LIBGCC by default
Without the private libgcc, we need a full multilib toolchain with
different libgcc or multiple toolchains to build all BE/LE and
hard-float/soft-float variants of MIPS boards.  That is not feasible.

This commit allows us to build all the MIPS boards with a single
kernel.org toolchain:

https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.9.0/
x86_64-gcc-4.9.0-nolibc_mips-linux.tar.xz

This change sounds reasonable for most users.  If necessary,
you can disable this option via "make menuconfig" or friends.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2014-10-23 13:19:15 -04:00