This patch adds the a4m2k MPC5200B board port. Its a derivate of
the a3m071 board with only minor changes.
Additionally this patch includes some clean-up changes:
- Remove I2C support from a3m071 as its unused
- Fix/enhance default env variables
- Fix some comments
- Add newly introduced CONFIG_SPL_TARGET to automatically build
"u-boot-img.bin"
- Fix dtb patching in READ desciption for SPL Linux booting:
"fdt chosen" needs to get called to patch/create the chosen node.
- Add missing call to spl_board_init():
Define CONFIG_SPL_BOARD_INIT so that spl_board_init() will get
called in the SPL version.
Signed-off-by: Stefan Roese <sr@denx.de>
This is currently set to coreboot.dtsi, but we cannot support this on
old device tree compilers (dtc <= 1.3), so adjust to use ARCH_CPU_DTS
to let the Makefile preprocessor sort this out.
Signed-off-by: Simon Glass <sjg@chromium.org>
Board and config header files for bf609-ezkit support.
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
CONFIG_SPL_OS_BOOT_KEY is used only in board files. It is
not required to have a general CONFIG_ option. Rename it and
define it in board directory.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
Replace uImage with ${uimage}.
If uimage is not set, default it to uImage.
Signed-off-by: Andreas Huber <andreas.huber@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
kmvect1 has a UEC2 connection to the piggy board and a UEC0 connection
to the switch MV88E6122. This switch has a connection to a frontport
ethernet interface. The ethernet port used for network booting is
automatically selected by u-boot. If a Piggy is plugged, the Piggy
port is selected (UEC2, eth1). If the Piggy isn't present, the
Frontport is selected (UEC0, eth0).
The switch reset is connected to a GPIO on the PRIO3 board FPGA (GPIO28)
and released at startup.
Signed-off-by: Karlheinz Jerg <karlheinz.jerg@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
For the the kmvect1 board we will also need a functionality to add an
offset to the IVMs MAC address, because these board will have two valid
ethernet ports for debugging purpose. So move the code to an own
function.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
For kmvect1 we need a special solution and for km_arm boards we already
have. So move the common code to the architectur specific file.
Signed-off-by: Karlheinz Jerg <karlheinz.jerg@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
In commit cfd4ff6 we implemented part of advisory 1.0.10 (internal delay
for RGMII mode not supported). This in turn however requires that we
set the tx clock delay feature in the PHY itself.
Signed-off-by: Tom Rini <trini@ti.com>
This build is stripped down. It boots to the command prompt.
GPIO is the only peripheral supported. Others TBD.
Signed-off-by: Tom Warren <twarren@nvidia.com>
These are stripped down for bringup, They'll be filled out later
to match-up with the kernel DT contents, and/or as devices are
brought up (mmc, usb, spi, etc.).
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add driver for tegra SPI "SLINK" style driver. This controller is
similar to the tegra20 SPI "SFLASH" controller. The difference is
that the SLINK controller is a genernal purpose SPI controller and the
SFLASH controller is special purpose and can only talk to FLASH
devices. In addition there are potentially many instances of an SLINK
controller on tegra and only a single instance of SFLASH. Tegra20 is
currently ths only version of tegra that instantiates an SFLASH
controller.
This driver supports basic PIO mode of operation and is configurable
(CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4
devices per controller may be attached, although typically only a
single chip select line is exposed from tegra per controller so in
reality this is usually limited to 1.
To enable this driver, use CONFIG_TEGRA_SLINK
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add tegra30 SPI SLINK nodes to fdt.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add back host1x node to seaboard dts file. This got dropped during
the tegra fdt sort.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The libfdt.h file is the definition file for libfdt. It is unnecessary
to include other fdt header files (the necessary ones are pulled in
by libfdt.h).
Signed-off-by: Gerald Van Baren <gvb@unssw.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Stefan Roese <sr@denx.de>
This mux is not currently used and appears to be a carry-over from the
am335x evm code.
Acked-by: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Tom Rini <trini@ti.com>
commit b689cd5 OMAP3: use a single board file for IGEP devices
introduced the following build warning:
igep00x0.h:168:24: warning: backslash-newline at end of file [enabled
by default]
This patch fixes the issue.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
AM335x EVM 1.5A uses Micron MT41J512M8RH-125 SDRAM 4Gb (512Mx8) as the
DDR3 chip.
[Hebbar Gururaja <gururaja.hebbar@ti.com>]
- Resolve merge conflict while rebasing. File structure is
changed in the mainline. So re-arrange the code accordingly.
- Update commit message to reflect the DDR3 part number
Signed-off-by: Jeff Lance <j-lance1@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
When ethaddr is not set in environment the MAC address is read
from efuse. The message was only printed in debug case, but this
message could be of interest for the ordinary user, so printf it.
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
The board is named pcm051 and has this hardware:
SOC: TI AM3359
DDR3-RAM: 2x MT41J256M8HX-15EIT:D 512MiB
ETH 1: LAN8710AI
SPI-Flash: W25Q64BVSSIG
RTC: RV-4162-C7
I2C-EEPROM: CAT32WC32
NAND: MT29F4G08_VFPGA63
PMIC: TPS65910A3
LCD
Supported:
UART 1
MMC/SD
ETH 1
USB
I2C
SPI
Not yet supported:
NAND
RTC
LCD
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
[trini: Add #define CONFIG_PHY_ADDR 0 to config]
Signed-off-by: Tom Rini <trini@ti.com>
This patch adds an GPIO LED boot status for IGEP boards.
The GPIO LED used is the red LED0 while the Linux kernel
uses the green LED0 as the boot status.
By using different GPIO LEDs, the user can know in which
step of the boot process the board currently is.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Even when the IGEPv2 board and the IGEP Computer-on-Module
are different from a form factor point of view, they are
very similar in the fact that share many components and how
they are wired.
So, it is possible (and better) to have a single board file
for both devices and just use the CONFIG_MACH_TYPE to make
a differentiation between each board when needed.
This change avoids code duplication by removing 298 lines of
code and makes future maintenance easier.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Move these fields into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Update for bsc9132qds.c, b4860qds.c]
Signed-off-by: Tom Rini <trini@ti.com>
This code was targetting one specific Microblaze platform
configuration which is obsolete and fsl bus isn't used
in this way.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
All these files was used for ancient xilinx drivers
which are finally gone.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Rommel Custodio <sessyargc@gmail.com>
There is new driver in the driver folder.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Rommel Custodio <sessyargc@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
Older compilers don't recognize v7 wfi instruction, so use wfi macro to
fix builds on old compilers.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Set ETM TRCLK down to 78MHz to get clear wave form.
This patch makes difference only when you use ETM trace connecting JTAG debugger.
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
After stress test, I found some of kzm9g board occures memory failure.
This patch adust SDRAM setting.
- Enlarge drivability on both SDRAM controller and SDRAM itself
- Raise core voltage
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.
The qi_lb60 target produces a slightly different
image after the change than before. The value of
'num_got_entries' symbol is different:
@@ -49,7 +49,7 @@
801000b4: 80122d00 lb s2,11520(zero)
801000b8: 80123500 lb s2,13568(zero)
801000bc: 80123ef8 lb s2,16120(zero)
-801000c0: 00000139 0x139
+801000c0: 00000136 tne zero,zero,0x4
801000c4 <in_ram>:
801000c4: 8d0bfffc lw t3,-4(t0)
This is caused by the different placement of the
'__got_start' and '__got_end' symbols between the
board specific scrip and the unified script.
board specific script:
__got_start = .;
.got : { *(.got) }
__got_end = .;
unified script:
.got : {
__got_start = .;
*(.got)
__got_end = .;
}
Despite this difference, the resulting images are
functionally identical.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.
All dbau1x00 targets are producing identical binary
images after the change than before.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.
All incaip targets are producing identical binary
images after the change than before.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Stefan Roese
Simon Glass
Tom Rini
Sonic Zhang
Stefano Babic
Holger Brunck
Andreas Huber
Karlheinz Jerg
Tom Warren
Allen Martin
Gerald Van Baren
Javier Martinez Canillas
Jeff Lance
Lars Poeschel
Jeroen Hofstee
Michal Simek
Rob Herring
Tetsuyuki Kobayashi
Albert ARIBAUD
Gabor Juhos