Commit graph

41440 commits

Author SHA1 Message Date
Sjoerd Simons
e9145c55d3 rockchip: Add PXE and DHCP to the default boot targets
Now that at least on the firefly board we have network support, enable
PXE and DHCP boot targets by default.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-01-11 20:24:19 -07:00
Romain Perier
7bdedf110d Enable DISTRO_DEFAULTS for Rockchip platforms
This enables suitable commands needed for booting general purpose
Linux distribution. This is required for example if we want to use PXE
or DHCP as default boot targets, symbols no longer enabled by
config_distro_defaults.h .

Signed-off-by: Romain Perier <romain.perier@collabora.com>
2017-01-11 20:24:19 -07:00
Simon Glass
cea951e0bf rockchip: evb-rk3339: Enable DHCP
This is the only RK3399 device without DHCP. Enable it so that we
can use a common BOOT_TARGET_DEVICES setting. It is likely useful to be
able to use USB networking, at least. Full networking can be enabled when
a suitable platform needs it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-11 20:24:19 -07:00
Sjoerd Simons
8c3018e712 rockchip: Enable networking support on rock2 and firefly
Enable the various configuration option required to get the ethernet
interface up and running on Radxa Rock2 and Firefly.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-01-11 20:24:19 -07:00
Sjoerd Simons
0125bcf01c net: gmac_rockchip: Add Rockchip GMAC driver
Add a new driver for the GMAC ethernet interface present in Rockchip
RK3288 SOCs. This driver subclasses the generic design-ware driver to
add the glue needed specifically for Rockchip.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-01-11 20:23:50 -07:00
Simon Glass
e72ced2340 net: designware: Export the operation functions
Export all functions so that drivers can use them, or not, as the need
arises.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-01-11 20:23:50 -07:00
Simon Glass
f63f28ee25 net: designware: Split the link init into a separate function
With rockchip we need to make adjustments after the link speed is set but
before enabling received/transmit. In preparation for this, split these
two pieces into separate functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-01-11 20:23:50 -07:00
Simon Glass
0ea38db90c net: designware: Adjust dw_adjust_link() to return an error
This function can fail, so return the error if there is one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-01-11 20:23:50 -07:00
Sjoerd Simons
b9e08d0e80 net: designware: Export various functions/struct to allow subclassing
To allow other DM drivers to subclass the designware driver various
functions and structures need to be exported. Export these.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-01-11 20:23:50 -07:00
Nickey Yang Nickey Yang
0fc41e551e rockchip: video: fix mpixelclock in rockchip HDMI
Correct mpixelclock errors in rockchip_phy_config[] and rockchip_mpll_cfg[].

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2017-01-11 20:23:50 -07:00
Nickey Yang Nickey Yang
9b8320167e rockchip: rk3288: set isp/vop qos priority level
Isp-camera preview image will be broken when dual screen display mode.
This patch set isp/vop qos level higher to solve this problem.
We have verified this patch on rk3288-miniarm board.

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2017-01-11 20:23:50 -07:00
Kever Yang
2577d3f924 arm64: rk3399: update rockchip_get_cru API
rk3399 has two clock-controller: cru and pmucru, update the
rockchip_get_crui() API, and rockchip_get_clk() do not used for
other module.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2017-01-11 20:23:25 -07:00
Kever Yang
f5f3de8935 dts: arm64: rk3399: add max-frequency for sdhci
Add 'max-frequency' for sdhci node for clock init.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 20:23:25 -07:00
Kever Yang
39fbb56f84 mmc: rockchip_sdhci: add clock init for mmc
Init the clock rate to max-frequency from dts with clock driver api.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 20:23:25 -07:00
Martin Michlmayr
1a58146085 rockchip: Fix veyron-minnie's Kconfig description
The veyron-minnie Kconfig referred to jerry by mistake.

Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-01-11 20:23:25 -07:00
Jacob Chen
21ba55dd72 rockchip: configs: make rk3036 env config same as rk3288
To make rockchip soc keep the same partition map

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
2017-01-11 20:21:20 -07:00
Jacob Chen
e1e9703a0a rockchip: configs: correct env offset when enable CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
With CONFIG_ROCKCHIP_SPL_BACK_TO_BROM enabled,
the environment is inside u-boot.
So solve it by moving environment after u-boot.

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
2017-01-11 20:21:20 -07:00
Kever Yang
897ddcad61 rockchip: dts: popmetal: add usb host power supply node
The popmetal board using a HOST_VBUS_DRV gpio signal to control the
USB host port 5V power, add a fix regulator and pinctrl for it, and
enable the USB host1 controller with the vbus-supply.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added rockchip: tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-11 20:21:20 -07:00
Kever Yang
f57f35a833 rockchip: config: popmetal: enable the USB host controller and function
RK3288 using the dwc2 USB host controller, enable it and other usb host
funtion like storage and ether.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Added rockchip: tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-11 20:21:20 -07:00
Kever Yang
da20981269 rockchip: board: popmetal: de-assert the host rst pin in board init
The PopMetal board have a on board FE1.1 usb 2.0 hub which connect to
the usb host port, we need to de-assert its reset pin to enable it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Added rockchip: tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-11 20:21:20 -07:00
Tom Rini
4386feb73d SPL: Adjust more debug prints for ulong entry_point
With entry_point now being an unsigned long we need to adapt the last
two debug prints to use %lX not %X.

Fixes: 11e1479b9e ("SPL: make struct spl_image 64-bit safe")
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-11 10:45:48 -05:00
Tom Rini
c8ac644979 power_i2c.c: Fix unused variable warning
The variable ret was added but never set as we did not make calls to
other functions that we needed to check the return value on.

Fixes: 505cf4750a ("power: change from meaningless value to error number")
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-11 09:16:05 -05:00
Tom Rini
5b30997fd2 Xilinx changes for v2017.03
- ATF handoff
 - DT syncups
 - gem: Use wait_for_bit(), add simple clk support
 - Simple clk driver for ZynqMP
 - Other small changes
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Merge tag 'xilinx-for-v2017.03' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.03

- ATF handoff
- DT syncups
- gem: Use wait_for_bit(), add simple clk support
- Simple clk driver for ZynqMP
- Other small changes
2017-01-11 08:04:26 -05:00
Masahiro Yamada
f401e907fc ARM: sunxi: remove bare default for CONFIG_MMC
The bare default entry is wrong.  Just remove it since the (real)
entry in drivers/mmc/Kconfig has "default ARM || PPC || SANDBOX".

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2017-01-11 19:40:15 +09:00
Masahiro Yamada
1d2c0506d3 mmc: move more driver config options to Kconfig
Move (and rename) the following CONFIG options to Kconfig:

  CONFIG_DAVINCI_MMC  (renamed to CONFIG_MMC_DAVINCI)
  CONFIG_OMAP_HSMMC   (renamed to CONFIG_MMC_OMAP_HS)
  CONFIG_MXC_MMC      (renamed to CONFIG_MMC_MXC)
  CONFIG_MXS_MMC      (renamed to CONFIG_MMC_MXS)
  CONFIG_TEGRA_MMC    (renamed to CONFIG_MMC_SDHCI_TEGRA)
  CONFIG_SUNXI_MMC    (renamed to CONFIG_MMC_SUNXI)

They are the same option names as used in Linux.

This commit was created as follows:

[1] Rename the options with the following command:

find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_DAVINCI_MMC/CONFIG_MMC_DAVINCI/g
s/CONFIG_OMAP_HSMMC/CONFIG_MMC_OMAP_HS/g
s/CONFIG_MXC_MMC/CONFIG_MMC_MXC/g
s/CONFIG_MXS_MMC/CONFIG_MMC_MXS/g
s/CONFIG_TEGRA_MMC/CONFIG_MMC_SDHCI_TEGRA/g
s/CONFIG_SUNXI_MMC/CONFIG_MMC_SUNXI/g
'

[2] Commit the changes

[3] Create entries in driver/mmc/Kconfig.
    (copied from Linux)

[4] Move the options with the following command
tools/moveconfig.py -y -r HEAD \
MMC_DAVINCI MMC_OMAP_HS MMC_MXC MMC_MXS MMC_SDHCI_TEGRA MMC_SUNXI

[5] Sort and align drivers/mmc/Makefile for readability

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2017-01-11 19:40:15 +09:00
Masahiro Yamada
0ec6eb5495 ARM: davinci: remove unused CONFIG_DAVINCI_MMC_SD1
This CONFIG is not referenced from anywhere.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2017-01-11 19:40:15 +09:00
Masahiro Yamada
ae4c81e942 mmc: move DesignWare-based drivers to Kconfig
Move (and rename) the following CONFIG options to Kconfig:

  CONFIG_EXYNOS_DWMMC  (renamed to CONFIG_MMC_DW_EXYNOS)
  CONFIG_HIKEY_DWMMC   (renamed to CONFIG_MMC_DW_K3)
  CONFIG_SOCFPGA_DWMMC (renamed to CONFIG_MMC_DW_SOCFPGA)

The "HIKEY" is a board name, so it is not suitable for the MMC
controller name.  I am following the name used in Linux.

This commit was generated as follows:

[1] Rename the config options with the following command:
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_EXYNOS_DWMMC/CONFIG_MMC_DW_EXYNOS/g
s/CONFIG_HIKEY_DWMMC/CONFIG_MMC_DW_K3/g
s/CONFIG_SOCFPGA_DWMMC/CONFIG_MMC_DW_SOCFPGA/g
'

[2] Commit the changes

[3] Create the entries in drivers/mmc/Kconfig
    (with default y for EXYNOS and SOCFPGA)

[4] Run the following:
tools/moveconfig.py -y -r HEAD MMC_DW_EXYNOS MMC_DW_K3 MMC_DW_SOCFPGA

[5] Sort and align drivers/mmc/Makefile for readability

[6] Clean-up doc/README.socfpga by hand

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2017-01-11 19:40:15 +09:00
Masahiro Yamada
55ed3b4698 mmc: move CONFIG_DWMMC to Kconfig, renaming to CONFIG_MMC_DW
This commit was created as follows:

[1] Rename the option with the following command:
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e 's/CONFIG_DWMMC/CONFIG_MMC_DW/g'

[2] create the entry for MMC_DW in drivers/mmc/Kconfig
    (the prompt and help were copied from Linux)

[3] run "tools/moveconfig.py -y MMC_DW"

[4] add "depends on MMC_DW" to the MMC_DW_ROCKCHIP entry

[5] Clean-up doc/README.socfpga by hand

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2017-01-11 19:40:14 +09:00
Masahiro Yamada
fed4408703 mmc: rename CONFIG_ROCKCHIP_DWMMC to CONFIG_MMC_DW_ROCKCHIP
I am trying to make all DesignWare-based driver options prefixed
with CONFIG_MMC_DW_.

This commit was generated as follows:

find . -name .git -prune -o -type f -print | \
xargs sed -i -e 's/ROCKCHIP_DWMMC/MMC_DW_ROCKCHIP/g'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2017-01-11 19:40:14 +09:00
Masahiro Yamada
b1b1add38c ARM: socfpga: remove unused CONFIG option and cleanup README.socfpga
CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH is defined in the socfpga_common.h,
but not referenced at all.  Remove.

Also, clean-up the README.socfpga.  CONFIG_MMC should not be defined
in the header since it was moved to Kconfig by commit c27269953b
("mmc: complete unfinished move of CONFIG_MMC").  I see no grep hit
for the others.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2017-01-11 19:40:14 +09:00
Jaehoon Chung
505cf4750a power: change from meaningless value to error number
'-1' is absolutely meaningless value.
This patch changed from meaningless value to error number.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-01-11 19:40:14 +09:00
Masahiro Yamada
9c720c815b mmc: uniphier-sd: fix Kconfig dependency
Some MMC drivers describe operations with the DM_MMC_OPS form, but
there are still several drivers with older implementation.  We can
not compile drivers from different groups at the same time because
the core framework is shared with #ifdef CONFIG_DM_MMC_OPS.

Every driver should have "depends on DM_MMC_OPS" (or !DM_MMC_OPS)
explicitly to express which framework it is based on.  This will
avoid enabling drivers with incompatible interface at the same time.
It is incorrect to make a driver "select DM_MMC_OPS".

While we are here, add "depends on OF_CONTROL" as well because this
driver can be configured only by Device Tree.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-11 19:40:14 +09:00
Masahiro Yamada
e5e7a7c204 mmc: sdhci-cadence: add Cadence SD4HC support
Add a driver for the Cadence SD4HC SD/SDIO/eMMC Controller.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-11 19:40:14 +09:00
Jaehoon Chung
3fd0a9ba8c mmc: sdhci: combine the Host controller v3.0 feature into one condition
It doesn't need to seperate the condition.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:13 +09:00
Jaehoon Chung
f37b7e4f6c mmc: sdhci: remove the SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
Ther is no usage anywhere. It doesn't need to maintain this bit.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:13 +09:00
Jaehoon Chung
91914581a5 mmc: sdhci: use the bitops APIs in sdhci.h
The using the bitops is too easy controlling than now.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:13 +09:00
Jaehoon Chung
62226b6863 mmc: sdhci: move the callback function into sdhci_ops
callback function should be moved into sdhci_ops struct.
Other controller can use these ops for controlling clock or their own
specific register.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:13 +09:00
Jaehoon Chung
f73b33ff94 mmc: s5p_sdhci: add the s5p_set_clock function
Add the s5p_set_clock function.
It's not good that "set_mmc_clk" is assigned directly.
In future, it should be changed to use the clock framework.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:13 +09:00
Jaehoon Chung
07b0b9c00c mmc: change the set_ios return type from void to int
To maintain consistency, set_ios type of legacy mmc_ops changed to int.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:13 +09:00
Jaehoon Chung
6f88a3a5d9 mmc: sdhci: remove the SDHCI_QUIRK_NO_CD
This quirk doesn't need anymore.
It's replaced to get_cd callback function.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:12 +09:00
Jaehoon Chung
5e96217f04 mmc: pic32_sdhci: move the code to pic32_sdhci.c
This code is used for only pic32_sdhci controller.
To remove the "#ifdef", moves to pic32_sdhci.c.
And use the get_cd callback function.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 19:40:11 +09:00
Jaehoon Chung
62358a988e mmc: sdhci: remove the unused code about testing Card detect
This code is dead code..There is no usage anywhere.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 18:14:47 +09:00
Jaehoon Chung
309bf02cde mmc: sdhci: add the get_cd callback function in sdhci_ops
Some SoCs can have their own card dect scheme.
Then they may use this get_cd callback function after implementing init
in their drivers.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 18:14:47 +09:00
Jaehoon Chung
ecd7b246f6 mmc: sdhci: disable the 8bit mode when host doesn't support it
Buswidth is depeneded on Hardware schematic.
Evne though host can support the 8bit buswidth, if hardware doesn't
support 8bit mode, it doesn't work fine.
So the buswidth mode selection leaves a matter in each SoC drivers.

On the contrary to this, hardware supports 8bit mode, but host doesn't
support it. then controller has to disable the MMC_MODE_8BIT.
(Host can check whether 8bit mode is supported or not, since V3.0)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-01-11 18:14:47 +09:00
Michal Simek
7364dfe7bf ARM64: zynqmp: Move CONFIG_AHCI from board file
Move configuration option from board file to defconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-11 07:00:38 +01:00
Kamensky Ivan
1e94629757 xilinx_phy: Pass correct pointer to fdtdec_get_int()
This patch fixes incorrect pointer on offset device in device tree blob.
When using with the component "Ethernet 1G/2.5G BASE-X PCS/PMA or SGMII"
it does not understand what type is XAE_PHY_TYPE_1000BASE_X and trying
to change frequency.

Signed-off-by: Kamensky Ivan <kamensky.ivan@mail.ru>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-01-11 07:00:27 +01:00
Tom Rini
04770e6e91 Merge git://git.denx.de/u-boot-dm 2017-01-10 08:19:33 -05:00
Tom Rini
86f21c96f4 mips: Use common _AC macro now.
MIPS no longer needs to have its own version of this macro now.

Fixes: 2a6713b09b ("move UL() macro from armv8/mmu.h into common.h")
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-10 08:19:26 -05:00
Tom Rini
0b8404332e Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2017-01-10 08:19:21 -05:00
Michal Simek
509d4b9545 ARM64: zynqmp: Generate handoff structure for ATF
Xilinx ATF extending options for passing images from BL2(FSBL)
to BL31. U-Boot SPL is FSBL replacement that's why it should generate
handoff structure the same. Support only one entry which is U-Boot in
EL2 itself. When FIT image is adopted structure generate should be data
driven.

Currently ATF is placing this structure at the beggining of OCM which is
rewriting early parts of ATF which should be unused at that time.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-10 10:22:05 +01:00