u-boot/board/mbx8xx
Albert ARIBAUD 5993053fa4 replace last __bss_end__ occurrences with __bss_end
Simon Glass' commit 3929fb0a14,
which changed all occurrences of __bss__end__ into __bss_end,
left behind some untouched __bss_end__ occurrences in all 33
u-boot.lds.debug files, in board/mousse/u-boot.lds.ram and
in board/mousse/u-boot.lds.rom. These are replaced here.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-04-02 16:23:34 -04:00
..
csr.h rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
dimm.h Initial revision 2001-04-28 17:59:11 +00:00
flash.c rename CFG_ macros to CONFIG_SYS 2008-10-18 21:54:03 +02:00
Makefile Switch from archive libraries to partial linking 2010-11-17 21:02:18 +01:00
mbx8xx.c board/mbx8xx/mbx8xx.c: Fix GCC 4.6 build warnings 2011-11-07 22:14:36 +01:00
pcmcia.c board/mbx8xx/pcmcia.c: Fix GCC 4.6 build warnings 2011-11-07 22:12:45 +01:00
README doc: cleanup - move board READMEs into respective board directories 2012-07-29 15:42:02 +02:00
u-boot.lds Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-03-18 14:37:18 -04:00
u-boot.lds.debug replace last __bss_end__ occurrences with __bss_end 2013-04-02 16:23:34 -04:00
vpd.c Move arch/ppc to arch/powerpc 2010-04-21 23:42:38 +02:00
vpd.h Initial revision 2001-04-28 17:59:11 +00:00

IMPORTANT NOTE - read before defining CONFIG_SYS_USE_OSCCLK in your board
		 config file!!!


WARNING: Wrong settings of this parameter have the potential to
damage hardware by running the MBX's CPU at frequencies that exceed
it's rating and/or overdriving the it's SPLL!


Ramblings:
1) Motorola offered 12 different variants of the MBX, 6 823s and 6 860s.
2) Of these 12 variants, only 2 were entry level boards.
3) I believe that the 2 entry level boards were the only ones that
   used OSCM clocking. I can't be completely certain of this at this
   point.
4) Motorola never offered an MBX that ran faster than 50Mhz.
5) The 10, non-entry level boards, ran at 40Mhz.
6) The EXTCLK input has a minimum clock of 15Mhz for the 823/860.
7) Motorola no longer sells MBXs.

Based on this information, I can surmise that the default power-on
reset clocking was one of the following three options.

Multiplier       SPLL Options
------------------------------------
513              OSCM is SPLL input
5                OSCM is SPLL input
1                EXTCLK is SPLL input

The forth option:

5                EXTCLK is SPLL input

is not possible on MBXs. This is because the minimum EXTCLK input
frequency is 15Mhz. 5 * 15Mhz = 75 Mhz. There was no variant that ran
above 50 Mhz.

The board I have borrowed definitely uses a multiplier of 1 for
EXTCLK and runs at 40Mhz. I even went so far as to put a scope on it.

One of the two default OSCM modes are most likely what was used on
the entry level boards to cheapen them by eliminating the external
crystal oscillator.

To add insult to injury, the stupid 860 PLPRCR register retains it's
multiplication factor through hard resets. You can't clear it out
because it is battery backed and once it is set wrong, it stays
wrong. The only way to reset it, so that it takes on it's default
multiplier is to disconnect all power including external, batteries,
as well discharging caps on the board. This precludes the fact that
your 860 may be quite DEAD by this time!

If you don't setup the multiplication factor for boards that use the
OSCM input, they won't run correctly, but at least they won't be
dead.

Addtionally, there is no good way to determine the clock input source
from CPU register data. The only way to deal with this is either hard
code it, determine the correct value with some rather NASTY timing
loops, or try to grok it from external data sources. Motorola
firmware opts for the NASTY timing loops, but needs to configure the
serial ports to do so.


You may have a legitimate need to define CONFIG_SYS_USE_OSCCLK if your
MBX8xx board is using the OSCM clocking mode.

You better know what you are doing here.