- Added support for the GCC compiler on STM32 targets.
git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@9 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
This commit is contained in:
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733ad572b2
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@ -13,6 +13,60 @@ Discarded input sections
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.text 0x00000000 0x0 THUMB Debug/../../obj/main.o
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.text 0x00000000 0x0 THUMB Debug/../../obj/main.o
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.data 0x00000000 0x0 THUMB Debug/../../obj/main.o
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.data 0x00000000 0x0 THUMB Debug/../../obj/main.o
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.bss 0x00000000 0x0 THUMB Debug/../../obj/main.o
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.bss 0x00000000 0x0 THUMB Debug/../../obj/main.o
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.text 0x00000000 0x0 THUMB Debug/../../obj/core_cm3.o
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.data 0x00000000 0x0 THUMB Debug/../../obj/core_cm3.o
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.bss 0x00000000 0x0 THUMB Debug/../../obj/core_cm3.o
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.text.__get_PSP
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0x00000000 0x8 THUMB Debug/../../obj/core_cm3.o
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.text.__set_MSP
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0x00000000 0x6 THUMB Debug/../../obj/core_cm3.o
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.text.__get_BASEPRI
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0x00000000 0x6 THUMB Debug/../../obj/core_cm3.o
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0x00000000 0x6 THUMB Debug/../../obj/core_cm3.o
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.text.__REV 0x00000000 0x4 THUMB Debug/../../obj/core_cm3.o
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.text.__REV16 0x00000000 0x4 THUMB Debug/../../obj/core_cm3.o
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.text.__REVSH 0x00000000 0x4 THUMB Debug/../../obj/core_cm3.o
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0x00000000 0x6 THUMB Debug/../../obj/core_cm3.o
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.text 0x00000000 0x0 THUMB Debug/../../obj/system_stm32f10x.o
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.data 0x00000000 0x0 THUMB Debug/../../obj/system_stm32f10x.o
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.bss 0x00000000 0x0 THUMB Debug/../../obj/system_stm32f10x.o
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.text.SystemInit
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0x00000000 0xf8 THUMB Debug/../../obj/system_stm32f10x.o
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.text.SystemCoreClockUpdate
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0x00000000 0x64 THUMB Debug/../../obj/system_stm32f10x.o
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.data.AHBPrescTable
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0x00000000 0x10 THUMB Debug/../../obj/system_stm32f10x.o
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.data.SystemCoreClock
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0x00000000 0x4 THUMB Debug/../../obj/system_stm32f10x.o
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.text 0x00000000 0x0 THUMB Debug/../../obj/cstart.o
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.text 0x00000000 0x0 THUMB Debug/../../obj/cstart.o
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.data 0x00000000 0x0 THUMB Debug/../../obj/cstart.o
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@ -484,6 +538,8 @@ Linker script and memory map
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START GROUP
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START GROUP
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LOAD THUMB Debug/../../obj/hooks.o
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LOAD THUMB Debug/../../obj/hooks.o
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LOAD THUMB Debug/../../obj/main.o
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LOAD THUMB Debug/../../obj/main.o
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LOAD THUMB Debug/../../obj/core_cm3.o
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LOAD THUMB Debug/../../obj/system_stm32f10x.o
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LOAD THUMB Debug/../../obj/cstart.o
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LOAD THUMB Debug/../../obj/cstart.o
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LOAD THUMB Debug/../../obj/vectors.o
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LOAD THUMB Debug/../../obj/vectors.o
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LOAD THUMB Debug/../../obj/can.o
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LOAD THUMB Debug/../../obj/can.o
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@ -507,101 +563,113 @@ LOAD C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib
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END GROUP
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END GROUP
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OUTPUT(D:/usr/feaser/software/OpenBLT/Target/Demo/ARMCM3_STM32_Olimex_STM32P103_Crossworks/Boot/ide/../bin/openbtl_olimex_stm32p103.elf elf32-littlearm)
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OUTPUT(D:/usr/feaser/software/OpenBLT/Target/Demo/ARMCM3_STM32_Olimex_STM32P103_Crossworks/Boot/ide/../bin/openbtl_olimex_stm32p103.elf elf32-littlearm)
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.debug_info 0x00000000 0x1fa0
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.debug_info 0x00000000 0x29b6
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.debug_info 0x0000005e 0x32a THUMB Debug/../../obj/main.o
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.debug_info 0x0000005e 0x32a THUMB Debug/../../obj/main.o
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.debug_info 0x00000388 0x114 THUMB Debug/../../obj/cstart.o
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.debug_info 0x00000d9e 0x114 THUMB Debug/../../obj/cstart.o
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.debug_abbrev 0x00000ee8 0x25 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
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.comment 0x00000000 0x11 THUMB Debug/../../obj/hooks.o
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.comment 0x00000000 0x11 THUMB Debug/../../obj/hooks.o
|
||||||
0x12 (size before relaxing)
|
0x12 (size before relaxing)
|
||||||
.comment 0x00000000 0x12 THUMB Debug/../../obj/main.o
|
.comment 0x00000000 0x12 THUMB Debug/../../obj/main.o
|
||||||
|
.comment 0x00000000 0x12 THUMB Debug/../../obj/core_cm3.o
|
||||||
|
.comment 0x00000000 0x12 THUMB Debug/../../obj/system_stm32f10x.o
|
||||||
.comment 0x00000000 0x12 THUMB Debug/../../obj/vectors.o
|
.comment 0x00000000 0x12 THUMB Debug/../../obj/vectors.o
|
||||||
.comment 0x00000000 0x12 THUMB Debug/../../obj/can.o
|
.comment 0x00000000 0x12 THUMB Debug/../../obj/can.o
|
||||||
.comment 0x00000000 0x12 THUMB Debug/../../obj/cpu.o
|
.comment 0x00000000 0x12 THUMB Debug/../../obj/cpu.o
|
||||||
|
@ -624,112 +692,126 @@ OUTPUT(D:/usr/feaser/software/OpenBLT/Target/Demo/ARMCM3_STM32_Olimex_STM32P103_
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x00000010 0x10 THUMB Debug/../../obj/main.o
|
0x00000010 0x10 THUMB Debug/../../obj/main.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x00000020 0x10 THUMB Debug/../../obj/cstart.o
|
0x00000020 0x10 THUMB Debug/../../obj/core_cm3.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x00000030 0x10 THUMB Debug/../../obj/vectors.o
|
0x00000030 0x10 THUMB Debug/../../obj/system_stm32f10x.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x00000040 0x10 THUMB Debug/../../obj/can.o
|
0x00000040 0x10 THUMB Debug/../../obj/cstart.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x00000050 0x10 THUMB Debug/../../obj/cpu.o
|
0x00000050 0x10 THUMB Debug/../../obj/vectors.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x00000060 0x10 THUMB Debug/../../obj/nvm.o
|
0x00000060 0x10 THUMB Debug/../../obj/can.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x00000070 0x10 THUMB Debug/../../obj/timer.o
|
0x00000070 0x10 THUMB Debug/../../obj/cpu.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x00000080 0x10 THUMB Debug/../../obj/uart.o
|
0x00000080 0x10 THUMB Debug/../../obj/nvm.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x00000090 0x10 THUMB Debug/../../obj/flash.o
|
0x00000090 0x10 THUMB Debug/../../obj/timer.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x000000a0 0x10 THUMB Debug/../../obj/assert.o
|
0x000000a0 0x10 THUMB Debug/../../obj/uart.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x000000b0 0x10 THUMB Debug/../../obj/backdoor.o
|
0x000000b0 0x10 THUMB Debug/../../obj/flash.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x000000c0 0x10 THUMB Debug/../../obj/boot.o
|
0x000000c0 0x10 THUMB Debug/../../obj/assert.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x000000d0 0x10 THUMB Debug/../../obj/com.o
|
0x000000d0 0x10 THUMB Debug/../../obj/backdoor.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x000000e0 0x10 THUMB Debug/../../obj/cop.o
|
0x000000e0 0x10 THUMB Debug/../../obj/boot.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x000000f0 0x10 THUMB Debug/../../obj/xcp.o
|
0x000000f0 0x10 THUMB Debug/../../obj/com.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x00000100 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libdebugio_v7m_t_le.a(libdebugio_asm.o)
|
0x00000100 0x10 THUMB Debug/../../obj/cop.o
|
||||||
.ARM.attributes
|
.ARM.attributes
|
||||||
0x00000110 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
0x00000110 0x10 THUMB Debug/../../obj/xcp.o
|
||||||
|
.ARM.attributes
|
||||||
|
0x00000120 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libdebugio_v7m_t_le.a(libdebugio_asm.o)
|
||||||
|
.ARM.attributes
|
||||||
|
0x00000130 0x10 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||||
|
|
||||||
.debug_frame 0x00000000 0x668
|
.debug_frame 0x00000000 0x810
|
||||||
.debug_frame 0x00000000 0x30 THUMB Debug/../../obj/main.o
|
.debug_frame 0x00000000 0x30 THUMB Debug/../../obj/main.o
|
||||||
.debug_frame 0x00000030 0x20 THUMB Debug/../../obj/vectors.o
|
.debug_frame 0x00000030 0x170 THUMB Debug/../../obj/core_cm3.o
|
||||||
.debug_frame 0x00000050 0x5c THUMB Debug/../../obj/cpu.o
|
.debug_frame 0x000001a0 0x38 THUMB Debug/../../obj/system_stm32f10x.o
|
||||||
.debug_frame 0x000000ac 0x6c THUMB Debug/../../obj/nvm.o
|
.debug_frame 0x000001d8 0x20 THUMB Debug/../../obj/vectors.o
|
||||||
.debug_frame 0x00000118 0x6c THUMB Debug/../../obj/timer.o
|
.debug_frame 0x000001f8 0x5c THUMB Debug/../../obj/cpu.o
|
||||||
.debug_frame 0x00000184 0x64 THUMB Debug/../../obj/uart.o
|
.debug_frame 0x00000254 0x6c THUMB Debug/../../obj/nvm.o
|
||||||
.debug_frame 0x000001e8 0x150 THUMB Debug/../../obj/flash.o
|
.debug_frame 0x000002c0 0x6c THUMB Debug/../../obj/timer.o
|
||||||
.debug_frame 0x00000338 0x2c THUMB Debug/../../obj/assert.o
|
.debug_frame 0x0000032c 0x64 THUMB Debug/../../obj/uart.o
|
||||||
.debug_frame 0x00000364 0x48 THUMB Debug/../../obj/backdoor.o
|
.debug_frame 0x00000390 0x150 THUMB Debug/../../obj/flash.o
|
||||||
.debug_frame 0x000003ac 0x48 THUMB Debug/../../obj/boot.o
|
.debug_frame 0x000004e0 0x2c THUMB Debug/../../obj/assert.o
|
||||||
.debug_frame 0x000003f4 0x94 THUMB Debug/../../obj/com.o
|
.debug_frame 0x0000050c 0x48 THUMB Debug/../../obj/backdoor.o
|
||||||
.debug_frame 0x00000488 0x30 THUMB Debug/../../obj/cop.o
|
.debug_frame 0x00000554 0x48 THUMB Debug/../../obj/boot.o
|
||||||
.debug_frame 0x000004b8 0x70 THUMB Debug/../../obj/xcp.o
|
.debug_frame 0x0000059c 0x94 THUMB Debug/../../obj/com.o
|
||||||
.debug_frame 0x00000528 0xa0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libdebugio_v7m_t_le.a(libdebugio_asm.o)
|
.debug_frame 0x00000630 0x30 THUMB Debug/../../obj/cop.o
|
||||||
.debug_frame 0x000005c8 0xa0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
.debug_frame 0x00000660 0x70 THUMB Debug/../../obj/xcp.o
|
||||||
|
.debug_frame 0x000006d0 0xa0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libdebugio_v7m_t_le.a(libdebugio_asm.o)
|
||||||
|
.debug_frame 0x00000770 0xa0 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||||
|
|
||||||
.debug_loc 0x00000000 0xc50
|
.debug_loc 0x00000000 0x100c
|
||||||
.debug_loc 0x00000000 0x76 THUMB Debug/../../obj/main.o
|
.debug_loc 0x00000000 0x76 THUMB Debug/../../obj/main.o
|
||||||
.debug_loc 0x00000076 0xc1 THUMB Debug/../../obj/cpu.o
|
.debug_loc 0x00000076 0x2ae THUMB Debug/../../obj/core_cm3.o
|
||||||
.debug_loc 0x00000137 0x7f THUMB Debug/../../obj/nvm.o
|
.debug_loc 0x00000324 0x10e THUMB Debug/../../obj/system_stm32f10x.o
|
||||||
.debug_loc 0x000001b6 0x20 THUMB Debug/../../obj/timer.o
|
.debug_loc 0x00000432 0xc1 THUMB Debug/../../obj/cpu.o
|
||||||
.debug_loc 0x000001d6 0x105 THUMB Debug/../../obj/uart.o
|
.debug_loc 0x000004f3 0x7f THUMB Debug/../../obj/nvm.o
|
||||||
.debug_loc 0x000002db 0x6b4 THUMB Debug/../../obj/flash.o
|
.debug_loc 0x00000572 0x20 THUMB Debug/../../obj/timer.o
|
||||||
.debug_loc 0x0000098f 0x46 THUMB Debug/../../obj/assert.o
|
.debug_loc 0x00000592 0x105 THUMB Debug/../../obj/uart.o
|
||||||
.debug_loc 0x000009d5 0x40 THUMB Debug/../../obj/backdoor.o
|
.debug_loc 0x00000697 0x6b4 THUMB Debug/../../obj/flash.o
|
||||||
.debug_loc 0x00000a15 0x40 THUMB Debug/../../obj/boot.o
|
.debug_loc 0x00000d4b 0x46 THUMB Debug/../../obj/assert.o
|
||||||
.debug_loc 0x00000a55 0x86 THUMB Debug/../../obj/com.o
|
.debug_loc 0x00000d91 0x40 THUMB Debug/../../obj/backdoor.o
|
||||||
.debug_loc 0x00000adb 0x175 THUMB Debug/../../obj/xcp.o
|
.debug_loc 0x00000dd1 0x40 THUMB Debug/../../obj/boot.o
|
||||||
|
.debug_loc 0x00000e11 0x86 THUMB Debug/../../obj/com.o
|
||||||
|
.debug_loc 0x00000e97 0x175 THUMB Debug/../../obj/xcp.o
|
||||||
|
|
||||||
.debug_aranges 0x00000000 0x330
|
.debug_aranges 0x00000000 0x420
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x00000000 0x20 THUMB Debug/../../obj/main.o
|
0x00000000 0x20 THUMB Debug/../../obj/main.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x00000020 0x20 THUMB Debug/../../obj/cstart.o
|
0x00000020 0xc8 THUMB Debug/../../obj/core_cm3.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x00000040 0x20 THUMB Debug/../../obj/vectors.o
|
0x000000e8 0x28 THUMB Debug/../../obj/system_stm32f10x.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x00000060 0x30 THUMB Debug/../../obj/cpu.o
|
0x00000110 0x20 THUMB Debug/../../obj/cstart.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x00000090 0x40 THUMB Debug/../../obj/nvm.o
|
0x00000130 0x20 THUMB Debug/../../obj/vectors.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x000000d0 0x40 THUMB Debug/../../obj/timer.o
|
0x00000150 0x30 THUMB Debug/../../obj/cpu.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x00000110 0x30 THUMB Debug/../../obj/uart.o
|
0x00000180 0x40 THUMB Debug/../../obj/nvm.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x00000140 0x70 THUMB Debug/../../obj/flash.o
|
0x000001c0 0x40 THUMB Debug/../../obj/timer.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x000001b0 0x20 THUMB Debug/../../obj/assert.o
|
0x00000200 0x30 THUMB Debug/../../obj/uart.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x000001d0 0x28 THUMB Debug/../../obj/backdoor.o
|
0x00000230 0x70 THUMB Debug/../../obj/flash.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x000001f8 0x28 THUMB Debug/../../obj/boot.o
|
0x000002a0 0x20 THUMB Debug/../../obj/assert.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x00000220 0x48 THUMB Debug/../../obj/com.o
|
0x000002c0 0x28 THUMB Debug/../../obj/backdoor.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x00000268 0x28 THUMB Debug/../../obj/cop.o
|
0x000002e8 0x28 THUMB Debug/../../obj/boot.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x00000290 0x40 THUMB Debug/../../obj/xcp.o
|
0x00000310 0x48 THUMB Debug/../../obj/com.o
|
||||||
.debug_aranges
|
.debug_aranges
|
||||||
0x000002d0 0x60 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
0x00000358 0x28 THUMB Debug/../../obj/cop.o
|
||||||
|
.debug_aranges
|
||||||
|
0x00000380 0x40 THUMB Debug/../../obj/xcp.o
|
||||||
|
.debug_aranges
|
||||||
|
0x000003c0 0x60 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||||
|
|
||||||
.debug_ranges 0x00000000 0x350
|
.debug_ranges 0x00000000 0x420
|
||||||
.debug_ranges 0x00000000 0x10 THUMB Debug/../../obj/main.o
|
.debug_ranges 0x00000000 0x10 THUMB Debug/../../obj/main.o
|
||||||
.debug_ranges 0x00000010 0x10 THUMB Debug/../../obj/vectors.o
|
.debug_ranges 0x00000010 0xb8 THUMB Debug/../../obj/core_cm3.o
|
||||||
.debug_ranges 0x00000020 0x20 THUMB Debug/../../obj/cpu.o
|
.debug_ranges 0x000000c8 0x18 THUMB Debug/../../obj/system_stm32f10x.o
|
||||||
.debug_ranges 0x00000040 0x30 THUMB Debug/../../obj/nvm.o
|
.debug_ranges 0x000000e0 0x10 THUMB Debug/../../obj/vectors.o
|
||||||
.debug_ranges 0x00000070 0x48 THUMB Debug/../../obj/timer.o
|
.debug_ranges 0x000000f0 0x20 THUMB Debug/../../obj/cpu.o
|
||||||
.debug_ranges 0x000000b8 0xb0 THUMB Debug/../../obj/uart.o
|
.debug_ranges 0x00000110 0x30 THUMB Debug/../../obj/nvm.o
|
||||||
.debug_ranges 0x00000168 0x78 THUMB Debug/../../obj/flash.o
|
.debug_ranges 0x00000140 0x48 THUMB Debug/../../obj/timer.o
|
||||||
.debug_ranges 0x000001e0 0x10 THUMB Debug/../../obj/assert.o
|
.debug_ranges 0x00000188 0xb0 THUMB Debug/../../obj/uart.o
|
||||||
.debug_ranges 0x000001f0 0x18 THUMB Debug/../../obj/backdoor.o
|
.debug_ranges 0x00000238 0x78 THUMB Debug/../../obj/flash.o
|
||||||
.debug_ranges 0x00000208 0x18 THUMB Debug/../../obj/boot.o
|
.debug_ranges 0x000002b0 0x10 THUMB Debug/../../obj/assert.o
|
||||||
.debug_ranges 0x00000220 0x38 THUMB Debug/../../obj/com.o
|
.debug_ranges 0x000002c0 0x18 THUMB Debug/../../obj/backdoor.o
|
||||||
.debug_ranges 0x00000258 0x18 THUMB Debug/../../obj/cop.o
|
.debug_ranges 0x000002d8 0x18 THUMB Debug/../../obj/boot.o
|
||||||
.debug_ranges 0x00000270 0x90 THUMB Debug/../../obj/xcp.o
|
.debug_ranges 0x000002f0 0x38 THUMB Debug/../../obj/com.o
|
||||||
.debug_ranges 0x00000300 0x50 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
.debug_ranges 0x00000328 0x18 THUMB Debug/../../obj/cop.o
|
||||||
|
.debug_ranges 0x00000340 0x90 THUMB Debug/../../obj/xcp.o
|
||||||
|
.debug_ranges 0x000003d0 0x50 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
<!DOCTYPE CrossStudio_Project_File>
|
<!DOCTYPE CrossStudio_Project_File>
|
||||||
<solution Name="stm32f103_crossworks" target="8" version="2">
|
<solution Name="stm32f103_crossworks" target="8" version="2">
|
||||||
<project Name="openbtl_olimex_stm32p103">
|
<project Name="openbtl_olimex_stm32p103">
|
||||||
<configuration Name="Common" Placement="Flash" Target="STM32F103RB" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_jtag_pad_pre_dr="1" arm_linker_jtag_pad_pre_ir="5" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(TargetsDir)/STM32/STM32SimulatorMemory.dll" arm_simulator_memory_simulation_parameter="STM32F103RB;0x20000;0x5000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_target_loader_parameter="8000000" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_only_additional_options="-I./..;-I./../../../../Source;-I./../../../../Source/ARMCM3_STM32;-I./../../../../Source/ARMCM3_STM32/Crossworks" c_user_include_directories="$(TargetsDir)/STM32/include" gcc_optimization_level="Optimize For Size" link_include_standard_libraries="Yes" linker_memory_map_file="$(TargetsDir)/STM32/STM32F103RB_MemoryMap.xml" linker_output_format="srec" linker_printf_enabled="No" linker_printf_width_precision_supported="No" linker_scanf_enabled="No" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" oscillator_frequency="8MHz" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/STM32/propertyGroups.xml" target_get_partname_script="GetPartName()" target_match_partname_script="MatchPartName("$(Target)")" target_reset_script="Reset()"/>
|
<configuration Name="Common" Placement="Flash" Target="STM32F103RB" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_heap_size="128" arm_linker_jtag_pad_pre_dr="1" arm_linker_jtag_pad_pre_ir="5" arm_linker_process_stack_size="0" arm_linker_stack_size="128" arm_simulator_memory_simulation_filename="$(TargetsDir)/STM32/STM32SimulatorMemory.dll" arm_simulator_memory_simulation_parameter="STM32F103RB;0x20000;0x5000" arm_target_debug_interface_type="ADIv5" arm_target_loader_applicable_loaders="Flash" arm_target_loader_default_loader="Flash" arm_target_loader_parameter="8000000" arm_use_gcc_libraries="Yes" build_intermediate_directory="$(Configuration)/../../obj" build_output_directory="$(ProjectDir)/../bin" c_only_additional_options="-I./..;-I./../lib/CMSIS/CM3/CoreSupport;-I./../lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x;-I./../../../../Source;-I./../../../../Source/ARMCM3_STM32;-I./../../../../Source/ARMCM3_STM32/Crossworks" c_user_include_directories="$(TargetsDir)/STM32/include" gcc_optimization_level="Optimize For Size" link_include_standard_libraries="Yes" linker_memory_map_file="$(TargetsDir)/STM32/STM32F103RB_MemoryMap.xml" linker_output_format="srec" linker_printf_enabled="No" linker_printf_width_precision_supported="No" linker_scanf_enabled="No" linker_section_placement_file="$(StudioDir)/targets/Cortex_M/flash_placement.xml" oscillator_frequency="8MHz" project_directory="" project_type="Executable" property_groups_file_path="$(TargetsDir)/STM32/propertyGroups.xml" target_get_partname_script="GetPartName()" target_match_partname_script="MatchPartName("$(Target)")" target_reset_script="Reset()"/>
|
||||||
<configuration Name="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/STM32/Release/Loader_rpc.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" arm_target_loader_can_lock_all="No" arm_target_loader_can_lock_range="No" arm_target_loader_can_unlock_all="No" arm_target_loader_can_unlock_range="No" target_reset_script="FLASHReset()"/>
|
<configuration Name="Flash" arm_target_flash_loader_file_path="$(TargetsDir)/STM32/Release/Loader_rpc.elf" arm_target_flash_loader_type="LIBMEM RPC Loader" arm_target_loader_can_lock_all="No" arm_target_loader_can_lock_range="No" arm_target_loader_can_unlock_all="No" arm_target_loader_can_unlock_range="No" target_reset_script="FLASHReset()"/>
|
||||||
<folder Name="Source Files">
|
<folder Name="Source Files">
|
||||||
<configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
|
<configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
|
||||||
|
@ -11,6 +11,17 @@
|
||||||
<file file_name="../hooks.c"/>
|
<file file_name="../hooks.c"/>
|
||||||
<file file_name="../main.c"/>
|
<file file_name="../main.c"/>
|
||||||
<file file_name="../stm32f10x.h"/>
|
<file file_name="../stm32f10x.h"/>
|
||||||
|
<folder Name="lib">
|
||||||
|
<folder Name="CoreSupport">
|
||||||
|
<file file_name="../lib/CMSIS/CM3/CoreSupport/core_cm3.c"/>
|
||||||
|
<file file_name="../lib/CMSIS/CM3/CoreSupport/core_cm3.h"/>
|
||||||
|
</folder>
|
||||||
|
<folder Name="DeviceSupport">
|
||||||
|
<file file_name="../lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h"/>
|
||||||
|
<file file_name="../lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c"/>
|
||||||
|
<file file_name="../lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.h"/>
|
||||||
|
</folder>
|
||||||
|
</folder>
|
||||||
</folder>
|
</folder>
|
||||||
</folder>
|
</folder>
|
||||||
<folder Name="Source">
|
<folder Name="Source">
|
||||||
|
|
|
@ -45,9 +45,9 @@
|
||||||
</TraceWindow>
|
</TraceWindow>
|
||||||
<Watch1>
|
<Watch1>
|
||||||
<Watches active="1" update="Never" >
|
<Watches active="1" update="Never" >
|
||||||
<Watchpoint linenumber="121" radix="-1" name="free_running_counter_last" expression="free_running_counter_last" filename="d:/usr/feaser/software/openblt/target/source/armcm3_stm32/timer.c" />
|
|
||||||
<Watchpoint linenumber="152" radix="-1" name="free_running_counter_accumulative" expression="free_running_counter_accumulative" filename="d:/usr/feaser/software/openblt/target/source/armcm3_stm32/timer.c" />
|
|
||||||
<Watchpoint linenumber="124" radix="-1" name="free_running_counter_now" expression="free_running_counter_now" filename="d:/usr/feaser/software/openblt/target/source/armcm3_stm32/timer.c" />
|
<Watchpoint linenumber="124" radix="-1" name="free_running_counter_now" expression="free_running_counter_now" filename="d:/usr/feaser/software/openblt/target/source/armcm3_stm32/timer.c" />
|
||||||
|
<Watchpoint linenumber="152" radix="-1" name="free_running_counter_accumulative" expression="free_running_counter_accumulative" filename="d:/usr/feaser/software/openblt/target/source/armcm3_stm32/timer.c" />
|
||||||
|
<Watchpoint linenumber="121" radix="-1" name="free_running_counter_last" expression="free_running_counter_last" filename="d:/usr/feaser/software/openblt/target/source/armcm3_stm32/timer.c" />
|
||||||
</Watches>
|
</Watches>
|
||||||
</Watch1>
|
</Watch1>
|
||||||
<Watch2>
|
<Watch2>
|
||||||
|
@ -60,7 +60,7 @@
|
||||||
<Watches active="0" update="Never" />
|
<Watches active="0" update="Never" />
|
||||||
</Watch4>
|
</Watch4>
|
||||||
<Files>
|
<Files>
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="13" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Boot\main.c" y="57" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Boot\main.c" left="0" selected="1" name="unnamed" top="51" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="23" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Boot\main.c" y="72" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Boot\main.c" left="0" selected="1" name="unnamed" top="57" />
|
||||||
</Files>
|
</Files>
|
||||||
<ARMCrossStudioWindow activeProject="openbtl_olimex_stm32p103" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Source\ARMCM3_STM32" fileDialogDefaultFilter="*.c" autoConnectCapabilities="266111" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
<ARMCrossStudioWindow activeProject="openbtl_olimex_stm32p103" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Boot\lib\CMSIS\CM3\DeviceSupport\ST\STM32F10x" fileDialogDefaultFilter="" autoConnectCapabilities="266111" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
||||||
</session>
|
</session>
|
||||||
|
|
|
@ -0,0 +1,784 @@
|
||||||
|
/**************************************************************************//**
|
||||||
|
* @file core_cm3.c
|
||||||
|
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
|
||||||
|
* @version V1.30
|
||||||
|
* @date 30. October 2009
|
||||||
|
*
|
||||||
|
* @note
|
||||||
|
* Copyright (C) 2009 ARM Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||||
|
* processor based microcontrollers. This file can be freely distributed
|
||||||
|
* within development tools that are supporting such ARM based processors.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||||
|
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
|
||||||
|
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
*
|
||||||
|
******************************************************************************/
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
/* define compiler specific symbols */
|
||||||
|
#if defined ( __CC_ARM )
|
||||||
|
#define __ASM __asm /*!< asm keyword for ARM Compiler */
|
||||||
|
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
|
||||||
|
|
||||||
|
#elif defined ( __ICCARM__ )
|
||||||
|
#define __ASM __asm /*!< asm keyword for IAR Compiler */
|
||||||
|
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
|
||||||
|
|
||||||
|
#elif defined ( __GNUC__ )
|
||||||
|
#define __ASM __asm /*!< asm keyword for GNU Compiler */
|
||||||
|
#define __INLINE inline /*!< inline keyword for GNU Compiler */
|
||||||
|
|
||||||
|
#elif defined ( __TASKING__ )
|
||||||
|
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
|
||||||
|
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/* ################### Compiler specific Intrinsics ########################### */
|
||||||
|
|
||||||
|
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
|
||||||
|
/* ARM armcc specific functions */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @return ProcessStackPointer
|
||||||
|
*
|
||||||
|
* Return the actual process stack pointer
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
mrs r0, psp
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfProcStack Process Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value ProcessStackPointer to the MSP
|
||||||
|
* (process stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
__ASM void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
msr psp, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @return Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Return the current value of the MSP (main stack pointer)
|
||||||
|
* Cortex processor register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
mrs r0, msp
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfMainStack Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value mainStackPointer to the MSP
|
||||||
|
* (main stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
__ASM void __set_MSP(uint32_t mainStackPointer)
|
||||||
|
{
|
||||||
|
msr msp, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in unsigned short value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in unsigned short value
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __REV16(uint16_t value)
|
||||||
|
{
|
||||||
|
rev16 r0, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*/
|
||||||
|
__ASM int32_t __REVSH(int16_t value)
|
||||||
|
{
|
||||||
|
revsh r0, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#if (__ARMCC_VERSION < 400000)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Remove the exclusive lock created by ldrex
|
||||||
|
*
|
||||||
|
* Removes the exclusive lock which is created by ldrex.
|
||||||
|
*/
|
||||||
|
__ASM void __CLREX(void)
|
||||||
|
{
|
||||||
|
clrex
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Base Priority value
|
||||||
|
*
|
||||||
|
* @return BasePriority
|
||||||
|
*
|
||||||
|
* Return the content of the base priority register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_BASEPRI(void)
|
||||||
|
{
|
||||||
|
mrs r0, basepri
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Base Priority value
|
||||||
|
*
|
||||||
|
* @param basePri BasePriority
|
||||||
|
*
|
||||||
|
* Set the base priority register
|
||||||
|
*/
|
||||||
|
__ASM void __set_BASEPRI(uint32_t basePri)
|
||||||
|
{
|
||||||
|
msr basepri, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Priority Mask value
|
||||||
|
*
|
||||||
|
* @return PriMask
|
||||||
|
*
|
||||||
|
* Return state of the priority mask bit from the priority mask register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_PRIMASK(void)
|
||||||
|
{
|
||||||
|
mrs r0, primask
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Priority Mask value
|
||||||
|
*
|
||||||
|
* @param priMask PriMask
|
||||||
|
*
|
||||||
|
* Set the priority mask bit in the priority mask register
|
||||||
|
*/
|
||||||
|
__ASM void __set_PRIMASK(uint32_t priMask)
|
||||||
|
{
|
||||||
|
msr primask, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Fault Mask value
|
||||||
|
*
|
||||||
|
* @return FaultMask
|
||||||
|
*
|
||||||
|
* Return the content of the fault mask register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_FAULTMASK(void)
|
||||||
|
{
|
||||||
|
mrs r0, faultmask
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Fault Mask value
|
||||||
|
*
|
||||||
|
* @param faultMask faultMask value
|
||||||
|
*
|
||||||
|
* Set the fault mask register
|
||||||
|
*/
|
||||||
|
__ASM void __set_FAULTMASK(uint32_t faultMask)
|
||||||
|
{
|
||||||
|
msr faultmask, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Control Register value
|
||||||
|
*
|
||||||
|
* @return Control value
|
||||||
|
*
|
||||||
|
* Return the content of the control register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_CONTROL(void)
|
||||||
|
{
|
||||||
|
mrs r0, control
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Control Register value
|
||||||
|
*
|
||||||
|
* @param control Control value
|
||||||
|
*
|
||||||
|
* Set the control register
|
||||||
|
*/
|
||||||
|
__ASM void __set_CONTROL(uint32_t control)
|
||||||
|
{
|
||||||
|
msr control, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* __ARMCC_VERSION */
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
|
||||||
|
/* IAR iccarm specific functions */
|
||||||
|
#pragma diag_suppress=Pe940
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @return ProcessStackPointer
|
||||||
|
*
|
||||||
|
* Return the actual process stack pointer
|
||||||
|
*/
|
||||||
|
uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
__ASM("mrs r0, psp");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfProcStack Process Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value ProcessStackPointer to the MSP
|
||||||
|
* (process stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
__ASM("msr psp, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @return Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Return the current value of the MSP (main stack pointer)
|
||||||
|
* Cortex processor register
|
||||||
|
*/
|
||||||
|
uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
__ASM("mrs r0, msp");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfMainStack Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value mainStackPointer to the MSP
|
||||||
|
* (main stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_MSP(uint32_t topOfMainStack)
|
||||||
|
{
|
||||||
|
__ASM("msr msp, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in unsigned short value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in unsigned short value
|
||||||
|
*/
|
||||||
|
uint32_t __REV16(uint16_t value)
|
||||||
|
{
|
||||||
|
__ASM("rev16 r0, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse bit order of value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse bit order of value
|
||||||
|
*/
|
||||||
|
uint32_t __RBIT(uint32_t value)
|
||||||
|
{
|
||||||
|
__ASM("rbit r0, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 8 bit values)
|
||||||
|
*/
|
||||||
|
uint8_t __LDREXB(uint8_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("ldrexb r0, [r0]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint16_t __LDREXH(uint16_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("ldrexh r0, [r0]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __LDREXW(uint32_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("ldrex r0, [r0]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 8 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXB(uint8_t value, uint8_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("strexb r0, r0, [r1]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXH(uint16_t value, uint16_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("strexh r0, r0, [r1]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXW(uint32_t value, uint32_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("strex r0, r0, [r1]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
#pragma diag_default=Pe940
|
||||||
|
|
||||||
|
|
||||||
|
#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
|
||||||
|
/* GNU gcc specific functions */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @return ProcessStackPointer
|
||||||
|
*
|
||||||
|
* Return the actual process stack pointer
|
||||||
|
*/
|
||||||
|
uint32_t __get_PSP(void) __attribute__( ( naked ) );
|
||||||
|
uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, psp\n\t"
|
||||||
|
"MOV r0, %0 \n\t"
|
||||||
|
"BX lr \n\t" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfProcStack Process Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value ProcessStackPointer to the MSP
|
||||||
|
* (process stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
|
||||||
|
void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR psp, %0\n\t"
|
||||||
|
"BX lr \n\t" : : "r" (topOfProcStack) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @return Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Return the current value of the MSP (main stack pointer)
|
||||||
|
* Cortex processor register
|
||||||
|
*/
|
||||||
|
uint32_t __get_MSP(void) __attribute__( ( naked ) );
|
||||||
|
uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, msp\n\t"
|
||||||
|
"MOV r0, %0 \n\t"
|
||||||
|
"BX lr \n\t" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfMainStack Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value mainStackPointer to the MSP
|
||||||
|
* (main stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
|
||||||
|
void __set_MSP(uint32_t topOfMainStack)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR msp, %0\n\t"
|
||||||
|
"BX lr \n\t" : : "r" (topOfMainStack) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Base Priority value
|
||||||
|
*
|
||||||
|
* @return BasePriority
|
||||||
|
*
|
||||||
|
* Return the content of the base priority register
|
||||||
|
*/
|
||||||
|
uint32_t __get_BASEPRI(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Base Priority value
|
||||||
|
*
|
||||||
|
* @param basePri BasePriority
|
||||||
|
*
|
||||||
|
* Set the base priority register
|
||||||
|
*/
|
||||||
|
void __set_BASEPRI(uint32_t value)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR basepri, %0" : : "r" (value) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Priority Mask value
|
||||||
|
*
|
||||||
|
* @return PriMask
|
||||||
|
*
|
||||||
|
* Return state of the priority mask bit from the priority mask register
|
||||||
|
*/
|
||||||
|
uint32_t __get_PRIMASK(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, primask" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Priority Mask value
|
||||||
|
*
|
||||||
|
* @param priMask PriMask
|
||||||
|
*
|
||||||
|
* Set the priority mask bit in the priority mask register
|
||||||
|
*/
|
||||||
|
void __set_PRIMASK(uint32_t priMask)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Fault Mask value
|
||||||
|
*
|
||||||
|
* @return FaultMask
|
||||||
|
*
|
||||||
|
* Return the content of the fault mask register
|
||||||
|
*/
|
||||||
|
uint32_t __get_FAULTMASK(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Fault Mask value
|
||||||
|
*
|
||||||
|
* @param faultMask faultMask value
|
||||||
|
*
|
||||||
|
* Set the fault mask register
|
||||||
|
*/
|
||||||
|
void __set_FAULTMASK(uint32_t faultMask)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Control Register value
|
||||||
|
*
|
||||||
|
* @return Control value
|
||||||
|
*
|
||||||
|
* Return the content of the control register
|
||||||
|
*/
|
||||||
|
uint32_t __get_CONTROL(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, control" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Control Register value
|
||||||
|
*
|
||||||
|
* @param control Control value
|
||||||
|
*
|
||||||
|
* Set the control register
|
||||||
|
*/
|
||||||
|
void __set_CONTROL(uint32_t control)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR control, %0" : : "r" (control) );
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in integer value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in integer value
|
||||||
|
*/
|
||||||
|
uint32_t __REV(uint32_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in unsigned short value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in unsigned short value
|
||||||
|
*/
|
||||||
|
uint32_t __REV16(uint16_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*/
|
||||||
|
int32_t __REVSH(int16_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse bit order of value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse bit order of value
|
||||||
|
*/
|
||||||
|
uint32_t __RBIT(uint32_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 8 bit value
|
||||||
|
*/
|
||||||
|
uint8_t __LDREXB(uint8_t *addr)
|
||||||
|
{
|
||||||
|
uint8_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint16_t __LDREXH(uint16_t *addr)
|
||||||
|
{
|
||||||
|
uint16_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __LDREXW(uint32_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 8 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXB(uint8_t value, uint8_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXH(uint16_t value, uint16_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXW(uint32_t value, uint32_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
|
||||||
|
/* TASKING carm specific functions */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||||
|
* Please use "carm -?i" to get an up to date list of all instrinsics,
|
||||||
|
* Including the CMSIS ones.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,284 @@
|
||||||
|
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||||
|
<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
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<td style="vertical-align: top;"><span style="font-size: 8pt; font-family: Arial; color: blue;"><a href="../../../../../../Release_Notes.html">Back to Release page</a></span></td>
|
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<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
|
||||||
|
Notes for STM32F10x CMSIS</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
|
||||||
|
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright 2011 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||||
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<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;"><img alt="" id="_x0000_i1025" src="../../../../../../_htmresc/logo.bmp" style="border: 0px solid ; width: 86px; height: 65px;"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
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<p class="MsoNormal"><span style="font-family: Arial; display: none;"><o:p> </o:p></span></p>
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<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" width="900">
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|
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<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
|
||||||
|
<ol style="margin-top: 0cm;" start="1" type="1">
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32F10x CMSIS
|
||||||
|
update History</a><o:p></o:p></span></li>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
|
||||||
|
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|
||||||
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<span style="font-family: "Times New Roman";"></span>
|
||||||
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<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F10x CMSIS
|
||||||
|
update History</span></h2><br>
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V3.5.0 / 11-March-2011<o:p></o:p></span></h3>
|
||||||
|
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||||
|
Changes<o:p></o:p></span></u></b></p>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0cm;" type="square">
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32f10x.h
|
||||||
|
</span>and <span style="font-style: italic;">startup_stm32f10x_hd_vl.s</span> files: remove the FSMC interrupt
|
||||||
|
definition for STM32F10x High-density Value line devices.<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">system_stm32f10x.c</span> file provided within the CMSIS folder. <br>
|
||||||
|
</span></li>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.4.0
|
||||||
|
- 10/15/2010</span></h3>
|
||||||
|
|
||||||
|
<ol>
|
||||||
|
<li><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b></li>
|
||||||
|
</ol>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||||
|
for <b>STM32F10x High-density Value line devices</b>.</span></li>
|
||||||
|
</ul>
|
||||||
|
<ol start="2">
|
||||||
|
<li><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x CMSIS Device Peripheral Access Layer </span></i></b></li>
|
||||||
|
</ol>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File:</span> <span style="font-weight: bold; font-style: italic;">stm32f10x.h</span></span><br>
|
||||||
|
</li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Update to support High-density Value line devices</span><span style="font-size: 10pt; font-family: Verdana;"></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new define <span style="font-style: italic;">STM32F10X_HD_VL</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">RCC, AFIO, FSMC bits definition updated</span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style="">
|
||||||
|
|
||||||
|
<span style="font-size: 10pt; font-family: "Verdana","sans-serif";">All
|
||||||
|
STM32 devices definitions are commented by default. User has to select the
|
||||||
|
appropriate device before starting else an error will be signaled on compile
|
||||||
|
time.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: "Verdana","sans-serif";">Add new IRQs definitons inside the IRQn_Type enumeration for STM23 High-density Value line devices.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: "Verdana","sans-serif";">"<span style="font-weight: bold;">bool</span>" type removed.</span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: "Verdana","sans-serif";"></span></li>
|
||||||
|
</ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files:</span> <span style="font-weight: bold; font-style: italic;">system_stm32f10x.h and system_stm32f10x.c</span></span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"></span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;">"system_stm32f10x.c" </span><span style="font-weight: bold;"></span>moved to to "<span style="font-weight: bold; font-style: italic;">STM32F10x_StdPeriph_Template</span>" directory. This file is also moved to each example directory under "<span style="font-weight: bold; font-style: italic;">STM32F10x_StdPeriph_Examples</span>".</span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"></span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SystemInit_ExtMemCtl() </span>function: update to support High-density Value line devices.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add "<span style="font-style: italic;">VECT_TAB_SRAM</span>" inside "</span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;">system_stm32f10x.c</span></span><span style="font-size: 10pt; font-family: Verdana;">"
|
||||||
|
to select if the user want to place the Vector Table in internal SRAM.
|
||||||
|
An additional define is also to specify the Vector Table offset "<span style="font-style: italic;">VECT_TAB_OFFSET</span>".<br>
|
||||||
|
</span></li>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS startup files:</span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;">startup_stm32f10x_xx.s</span></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add three
|
||||||
|
startup files for STM32 High-density Value line devices:
|
||||||
|
<span style="font-weight: bold; font-style: italic;">startup_stm32f10x_hd_vl.s</span></span></li></ul>
|
||||||
|
</ul>
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.3.0
|
||||||
|
- 04/16/2010</span></h3>
|
||||||
|
|
||||||
|
<ol><li><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b></li></ol>
|
||||||
|
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||||
|
for <b>STM32F10x XL-density devices</b>.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add startup files for TrueSTUDIO toolchain<br></span></li></ul><ol start="2"><li><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x CMSIS Device Peripheral Access Layer </span></i></b></li></ol>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File:</span> <span style="font-weight: bold; font-style: italic;">stm32f10x.h</span></span><br>
|
||||||
|
</li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Update to support XL-density devices</span><span style="font-size: 10pt; font-family: Verdana;"></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new define <span style="font-style: italic;">STM32F10X_XL</span></span></li></ul><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new IRQs for </span><span style="font-size: 10pt; font-family: Verdana;">TIM9..14</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Update FLASH_TypeDef structure</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new IP instances TIM9..14</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">RCC, AFIO, DBGMCU bits definition updated</span></li></ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Correct IRQs definition for MD-, LD-, MD_VL- and LD_VL-density devices (remove comma "," at the end of enum list)<br></span></li></ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files:</span> <span style="font-weight: bold; font-style: italic;">system_stm32f10x.h and system_stm32f10x.c</span></span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SystemInit_ExtMemCtl() </span>function: update to support XL-density devices</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SystemInit()</span> function: swap the order of SetSysClock() and SystemInit_ExtMemCtl() functions. </span><span style="font-size: 10pt; font-family: Verdana;"><br>
|
||||||
|
</span></li></ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS startup files:</span><span style="font-weight: bold; font-style: italic;"></span><span style="font-style: italic;"><span style="font-weight: bold;"></span></span></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">add three
|
||||||
|
startup files for STM32 XL-density devices:
|
||||||
|
<span style="font-weight: bold; font-style: italic;">startup_stm32f10x_xl.s</span></span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;">startup_stm32f10x_md_vl.s</span> for RIDE7: add USART3 IRQ Handler (was missing in previous version)</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add startup files for TrueSTUDIO toolchain</span></li></ul></ul><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;"></span></span>
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.2.0
|
||||||
|
- 03/01/2010</span></h3>
|
||||||
|
<ol style="margin-top: 0in;" start="1" type="1">
|
||||||
|
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"></span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li>
|
||||||
|
</ol>
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">STM32F10x CMSIS files updated to <span style="font-weight: bold;">CMSIS V1.30</span> release</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Directory structure updated to be aligned with CMSIS V1.30<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||||
|
for <b>STM32 Low-density Value line (STM32F100x4/6) and
|
||||||
|
Medium-density Value line (STM32F100x8/B) devices</b>. </span><span style="font-size: 10pt;"><o:p></o:p></span></li>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
<ol style="margin-top: 0in;" start="2" type="1">
|
||||||
|
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">CMSIS Core Peripheral Access Layer</span></i></b></li></ol>
|
||||||
|
<ul>
|
||||||
|
<li><b><i><span style="font-size: 10pt; font-family: Verdana;"></span></i></b><span style="font-size: 10pt; font-family: Verdana;"> Refer to <a href="../../../CMSIS_changes.htm" target="_blank">CMSIS changes</a></span></li>
|
||||||
|
</ul>
|
||||||
|
<ol style="margin-top: 0in; list-style-type: decimal;" start="3">
|
||||||
|
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x CMSIS Device Peripheral Access Layer </span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li>
|
||||||
|
|
||||||
|
</ol>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File:</span> <span style="font-weight: bold; font-style: italic;">stm32f10x.h</span></span><br>
|
||||||
|
</li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Update
|
||||||
|
the stm32f10x.h file to support new Value line devices features: CEC
|
||||||
|
peripheral, new General purpose timers TIM15, TIM16 and TIM17.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Peripherals Bits definitions updated to be in line with Value line devices available features.<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">HSE_Value,
|
||||||
|
HSI_Value and HSEStartup_TimeOut changed to upper case: HSE_VALUE,
|
||||||
|
HSI_VALUE and HSE_STARTUP_TIMEOUT. Old names are kept for legacy
|
||||||
|
purposes.<br>
|
||||||
|
</span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files:</span> <span style="font-weight: bold; font-style: italic;">system_stm32f10x.h and system_stm32f10x.c</span></span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"></span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SystemFrequency variable name changed to SystemCoreClock</span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"></span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Default
|
||||||
|
</span></span><span style="font-size: 10pt; font-family: Verdana;">SystemCoreClock</span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"> is changed to 24MHz when Value line devices are selected and to 72MHz on other devices.</span></span><span style="font-size: 10pt;"><o:p></o:p></span><span style="font-size: 10pt; font-family: Verdana;"> <br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">All while(1) loop were removed from all clock setting functions. User has to handle the HSE startup failure.<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Additional function <span style="font-weight: bold; font-style: italic;">void SystemCoreClockUpdate (void)</span> is provided.<br>
|
||||||
|
</span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Startup files:</span> <span style="font-weight: bold; font-style: italic;">startup_stm32f10x_xx.s</span></span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new
|
||||||
|
startup files for STM32 Low-density Value line devices:
|
||||||
|
<span style="font-weight: bold; font-style: italic;">startup_stm32f10x_ld_vl.s</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new startup
|
||||||
|
files for STM32 Medium-density Value line devices:
|
||||||
|
<span style="font-weight: bold; font-style: italic;">startup_stm32f10x_md_vl.s</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SystemInit() function is called from startup file (startup_stm32f10x_xx.s) before to branch to application main.<br>
|
||||||
|
To reconfigure the default setting of SystemInit() function, refer to system_stm32f10x.c file <br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">GNU startup file for Low density devices (startup_stm32f10x_ld.s) is updated to fix compilation errors.<br>
|
||||||
|
</span></li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
</ul>
|
||||||
|
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2>
|
||||||
|
<p class="MsoNormal" style="margin: 4.5pt 0cm;"><span style="font-size: 10pt; font-family: Verdana; color: black;">The
|
||||||
|
enclosed firmware and all the related documentation are not covered by
|
||||||
|
a License Agreement, if you need such License you can contact your
|
||||||
|
local STMicroelectronics office.<u1:p></u1:p><o:p></o:p></span></p>
|
||||||
|
<p class="MsoNormal"><b style=""><span style="font-size: 10pt; font-family: Verdana; color: black;">THE
|
||||||
|
PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO
|
||||||
|
SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR
|
||||||
|
ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY
|
||||||
|
CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY
|
||||||
|
CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH
|
||||||
|
THEIR PRODUCTS. <o:p></o:p></span></b></p>
|
||||||
|
<p class="MsoNormal"><span style="color: black;"><o:p> </o:p></span></p>
|
||||||
|
<div class="MsoNormal" style="text-align: center;" align="center"><span style="color: black;">
|
||||||
|
<hr align="center" size="2" width="100%"></span></div>
|
||||||
|
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt; text-align: center;" align="center"><span style="font-size: 10pt; font-family: Verdana; color: black;">For
|
||||||
|
complete documentation on </span><span style="font-size: 10pt; font-family: Verdana;">STM32(<span style="color: black;">CORTEX M3) 32-Bit Microcontrollers
|
||||||
|
visit </span><u><span style="color: blue;"><a href="http://www.st.com/stm32" target="_blank">www.st.com/STM32</a></span></u></span><span style="color: black;"><o:p></o:p></span></p>
|
||||||
|
</td>
|
||||||
|
</tr>
|
||||||
|
</tbody>
|
||||||
|
</table>
|
||||||
|
<p class="MsoNormal"><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||||
|
</td>
|
||||||
|
</tr>
|
||||||
|
</tbody>
|
||||||
|
</table>
|
||||||
|
</div>
|
||||||
|
<p class="MsoNormal"><o:p> </o:p></p>
|
||||||
|
</div>
|
||||||
|
</body></html>
|
|
@ -65,7 +65,7 @@
|
||||||
#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL)
|
#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL)
|
||||||
/* #define STM32F10X_LD */ /*!< STM32F10X_LD: STM32 Low density devices */
|
/* #define STM32F10X_LD */ /*!< STM32F10X_LD: STM32 Low density devices */
|
||||||
/* #define STM32F10X_LD_VL */ /*!< STM32F10X_LD_VL: STM32 Low density Value Line devices */
|
/* #define STM32F10X_LD_VL */ /*!< STM32F10X_LD_VL: STM32 Low density Value Line devices */
|
||||||
/* #define STM32F10X_MD */ /*!< STM32F10X_MD: STM32 Medium density devices */
|
/* #define STM32F10X_MD */ /*!< STM32F10X_MD: STM32 Medium density devices */
|
||||||
/* #define STM32F10X_MD_VL */ /*!< STM32F10X_MD_VL: STM32 Medium density Value Line devices */
|
/* #define STM32F10X_MD_VL */ /*!< STM32F10X_MD_VL: STM32 Medium density Value Line devices */
|
||||||
/* #define STM32F10X_HD */ /*!< STM32F10X_HD: STM32 High density devices */
|
/* #define STM32F10X_HD */ /*!< STM32F10X_HD: STM32 High density devices */
|
||||||
/* #define STM32F10X_HD_VL */ /*!< STM32F10X_HD_VL: STM32 High density value line devices */
|
/* #define STM32F10X_HD_VL */ /*!< STM32F10X_HD_VL: STM32 High density value line devices */
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,98 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32f10x.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32f10x_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Define to prevent recursive inclusion
|
||||||
|
*/
|
||||||
|
#ifndef __SYSTEM_STM32F10X_H
|
||||||
|
#define __SYSTEM_STM32F10X_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Exported_types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
extern void SystemInit(void);
|
||||||
|
extern void SystemCoreClockUpdate(void);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__SYSTEM_STM32F10X_H */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,243 @@
|
||||||
|
<html>
|
||||||
|
|
||||||
|
<head>
|
||||||
|
<title>CMSIS Debug Support</title>
|
||||||
|
<meta http-equiv="Content-Type" content="text/html; charset=windows-1252">
|
||||||
|
<meta name="GENERATOR" content="Microsoft FrontPage 6.0">
|
||||||
|
<meta name="ProgId" content="FrontPage.Editor.Document">
|
||||||
|
<style>
|
||||||
|
<!--
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Keil Software CHM Style Sheet
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
body { color: #000000; background-color: #FFFFFF; font-size: 75%; font-family:
|
||||||
|
Verdana, Arial, 'Sans Serif' }
|
||||||
|
a:link { color: #0000FF; text-decoration: underline }
|
||||||
|
a:visited { color: #0000FF; text-decoration: underline }
|
||||||
|
a:active { color: #FF0000; text-decoration: underline }
|
||||||
|
a:hover { color: #FF0000; text-decoration: underline }
|
||||||
|
h1 { font-family: Verdana; font-size: 18pt; color: #000080; font-weight: bold;
|
||||||
|
text-align: Center; margin-right: 3 }
|
||||||
|
h2 { font-family: Verdana; font-size: 14pt; color: #000080; font-weight: bold;
|
||||||
|
background-color: #CCCCCC; margin-top: 24; margin-bottom: 3;
|
||||||
|
padding: 6 }
|
||||||
|
h3 { font-family: Verdana; font-size: 10pt; font-weight: bold; background-color:
|
||||||
|
#CCCCCC; margin-top: 24; margin-bottom: 3; padding: 6 }
|
||||||
|
pre { font-family: Courier New; font-size: 10pt; background-color: #CCFFCC;
|
||||||
|
margin-left: 24; margin-right: 24 }
|
||||||
|
ul { list-style-type: square; margin-top: 6pt; margin-bottom: 0 }
|
||||||
|
ol { margin-top: 6pt; margin-bottom: 0 }
|
||||||
|
li { clear: both; margin-bottom: 6pt }
|
||||||
|
table { font-size: 100%; border-width: 0; padding: 0 }
|
||||||
|
th { color: #FFFFFF; background-color: #000080; text-align: left; vertical-align:
|
||||||
|
bottom; padding-right: 6pt }
|
||||||
|
tr { text-align: left; vertical-align: top }
|
||||||
|
td { text-align: left; vertical-align: top; padding-right: 6pt }
|
||||||
|
.ToolT { font-size: 8pt; color: #808080 }
|
||||||
|
.TinyT { font-size: 8pt; text-align: Center }
|
||||||
|
code { color: #000000; background-color: #E0E0E0; font-family: 'Courier New', Courier;
|
||||||
|
line-height: 120%; font-style: normal }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Notes
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
p.note { font-weight: bold; clear: both; margin-bottom: 3pt; padding-top: 6pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Expanding/Contracting Divisions
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
#expand { text-decoration: none; margin-bottom: 3pt }
|
||||||
|
img.expand { border-style: none; border-width: medium }
|
||||||
|
div.expand { display: none; margin-left: 9pt; margin-top: 0 }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Where List Tags
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
p.wh { font-weight: bold; clear: both; margin-top: 6pt; margin-bottom: 3pt }
|
||||||
|
table.wh { width: 100% }
|
||||||
|
td.whItem { white-space: nowrap; font-style: italic; padding-right: 6pt; padding-bottom:
|
||||||
|
6pt }
|
||||||
|
td.whDesc { padding-bottom: 6pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Keil Table Tags
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
table.kt { border: 1pt solid #000000 }
|
||||||
|
th.kt { white-space: nowrap; border-bottom: 1pt solid #000000; padding-left: 6pt;
|
||||||
|
padding-right: 6pt; padding-top: 4pt; padding-bottom: 4pt }
|
||||||
|
tr.kt { }
|
||||||
|
td.kt { color: #000000; background-color: #E0E0E0; border-top: 1pt solid #A0A0A0;
|
||||||
|
padding-left: 6pt; padding-right: 6pt; padding-top: 2pt;
|
||||||
|
padding-bottom: 2pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
-->
|
||||||
|
|
||||||
|
</style>
|
||||||
|
</head>
|
||||||
|
|
||||||
|
<body>
|
||||||
|
|
||||||
|
<h1>CMSIS Debug Support</h1>
|
||||||
|
|
||||||
|
<hr>
|
||||||
|
|
||||||
|
<h2>Cortex-M3 ITM Debug Access</h2>
|
||||||
|
<p>
|
||||||
|
The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that provides together with
|
||||||
|
the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has
|
||||||
|
32 communication channels which are able to transmit 32 / 16 / 8 bit values; two ITM
|
||||||
|
communication channels are used by CMSIS to output the following information:
|
||||||
|
</p>
|
||||||
|
<ul>
|
||||||
|
<li>ITM Channel 0: used for printf-style output via the debug interface.</li>
|
||||||
|
<li>ITM Channel 31: is reserved for RTOS kernel awareness debugging.</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h2>Debug IN / OUT functions</h2>
|
||||||
|
<p>CMSIS provides following debug functions:</p>
|
||||||
|
<ul>
|
||||||
|
<li>ITM_SendChar (uses ITM channel 0)</li>
|
||||||
|
<li>ITM_ReceiveChar (uses global variable)</li>
|
||||||
|
<li>ITM_CheckChar (uses global variable)</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h3>ITM_SendChar</h3>
|
||||||
|
<p>
|
||||||
|
<strong>ITM_SendChar</strong> is used to transmit a character over ITM channel 0 from
|
||||||
|
the microcontroller system to the debug system. <br>
|
||||||
|
Only a 8 bit value is transmitted.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
static __INLINE uint32_t ITM_SendChar (uint32_t ch)
|
||||||
|
{
|
||||||
|
/* check if debugger connected and ITM channel enabled for tracing */
|
||||||
|
if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&
|
||||||
|
(ITM->TCR & ITM_TCR_ITMENA) &&
|
||||||
|
(ITM->TER & (1UL << 0)) )
|
||||||
|
{
|
||||||
|
while (ITM->PORT[0].u32 == 0);
|
||||||
|
ITM->PORT[0].u8 = (uint8_t)ch;
|
||||||
|
}
|
||||||
|
return (ch);
|
||||||
|
}</pre>
|
||||||
|
|
||||||
|
<h3>ITM_ReceiveChar</h3>
|
||||||
|
<p>
|
||||||
|
ITM communication channel is only capable for OUT direction. For IN direction
|
||||||
|
a globel variable is used. A simple mechansim detects if a character is received.
|
||||||
|
The project to test need to be build with debug information.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<p>
|
||||||
|
The globale variable <strong>ITM_RxBuffer</strong> is used to transmit a 8 bit value from debug system
|
||||||
|
to microcontroller system. <strong>ITM_RxBuffer</strong> is 32 bit wide to enshure a proper handshake.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
extern volatile int ITM_RxBuffer; /* variable to receive characters */
|
||||||
|
</pre>
|
||||||
|
<p>
|
||||||
|
A dedicated bit pattern is used to determin if <strong>ITM_RxBuffer</strong> is empty
|
||||||
|
or contains a valid value.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */
|
||||||
|
</pre>
|
||||||
|
<p>
|
||||||
|
<strong>ITM_ReceiveChar</strong> is used to receive a 8 bit value from the debug system. The function is nonblocking.
|
||||||
|
It returns the received character or '-1' if no character was available.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
static __INLINE int ITM_ReceiveChar (void) {
|
||||||
|
int ch = -1; /* no character available */
|
||||||
|
|
||||||
|
if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
|
||||||
|
ch = ITM_RxBuffer;
|
||||||
|
ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
|
||||||
|
}
|
||||||
|
|
||||||
|
return (ch);
|
||||||
|
}
|
||||||
|
</pre>
|
||||||
|
|
||||||
|
<h3>ITM_CheckChar</h3>
|
||||||
|
<p>
|
||||||
|
<strong>ITM_CheckChar</strong> is used to check if a character is received.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
static __INLINE int ITM_CheckChar (void) {
|
||||||
|
|
||||||
|
if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
|
||||||
|
return (0); /* no character available */
|
||||||
|
} else {
|
||||||
|
return (1); /* character available */
|
||||||
|
}
|
||||||
|
}</pre>
|
||||||
|
|
||||||
|
|
||||||
|
<h2>ITM Debug Support in uVision</h2>
|
||||||
|
<p>
|
||||||
|
uVision uses in a debug session the <strong>Debug (printf) Viewer</strong> window to
|
||||||
|
display the debug data.
|
||||||
|
</p>
|
||||||
|
<p>Direction microcontroller system -> uVision:</p>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
Characters received via ITM communication channel 0 are written in a printf style
|
||||||
|
to <strong>Debug (printf) Viewer</strong> window.
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<p>Direction uVision -> microcontroller system:</p>
|
||||||
|
<ul>
|
||||||
|
<li>Check if <strong>ITM_RxBuffer</strong> variable is available (only performed once).</li>
|
||||||
|
<li>Read character from <strong>Debug (printf) Viewer</strong> window.</li>
|
||||||
|
<li>If <strong>ITM_RxBuffer</strong> empty write character to <strong>ITM_RxBuffer</strong>.</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<p class="Note">Note</p>
|
||||||
|
<ul>
|
||||||
|
<li><p>Current solution does not use a buffer machanism for trasmitting the characters.</p>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h2>RTX Kernel awareness in uVision</h2>
|
||||||
|
<p>
|
||||||
|
uVision / RTX are using a simple and efficient solution for RTX Kernel awareness.
|
||||||
|
No format overhead is necessary.<br>
|
||||||
|
uVsion debugger decodes the RTX events via the 32 / 16 / 8 bit ITM write access
|
||||||
|
to ITM communication channel 31.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<p>Following RTX events are traced:</p>
|
||||||
|
<ul>
|
||||||
|
<li>Task Create / Delete event
|
||||||
|
<ol>
|
||||||
|
<li>32 bit access. Task start address is transmitted</li>
|
||||||
|
<li>16 bit access. Task ID and Create/Delete flag are transmitted<br>
|
||||||
|
High byte holds Create/Delete flag, Low byte holds TASK ID.
|
||||||
|
</li>
|
||||||
|
</ol>
|
||||||
|
</li>
|
||||||
|
<li>Task switch event
|
||||||
|
<ol>
|
||||||
|
<li>8 bit access. Task ID of current task is transmitted</li>
|
||||||
|
</ol>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<p class="Note">Note</p>
|
||||||
|
<ul>
|
||||||
|
<li><p>Other RTOS information could be retrieved via memory read access in a polling mode manner.</p>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
|
||||||
|
<p class="MsoNormal"><span lang="EN-GB"> </span></p>
|
||||||
|
|
||||||
|
<hr>
|
||||||
|
|
||||||
|
<p class="TinyT">Copyright © KEIL - An ARM Company.<br>
|
||||||
|
All rights reserved.<br>
|
||||||
|
Visit our web site at <a href="http://www.keil.com">www.keil.com</a>.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
</body>
|
||||||
|
|
||||||
|
</html>
|
|
@ -0,0 +1,320 @@
|
||||||
|
<html>
|
||||||
|
|
||||||
|
<head>
|
||||||
|
<title>CMSIS Changes</title>
|
||||||
|
<meta http-equiv="Content-Type" content="text/html; charset=windows-1252">
|
||||||
|
<meta name="GENERATOR" content="Microsoft FrontPage 6.0">
|
||||||
|
<meta name="ProgId" content="FrontPage.Editor.Document">
|
||||||
|
<style>
|
||||||
|
<!--
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Keil Software CHM Style Sheet
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
body { color: #000000; background-color: #FFFFFF; font-size: 75%; font-family:
|
||||||
|
Verdana, Arial, 'Sans Serif' }
|
||||||
|
a:link { color: #0000FF; text-decoration: underline }
|
||||||
|
a:visited { color: #0000FF; text-decoration: underline }
|
||||||
|
a:active { color: #FF0000; text-decoration: underline }
|
||||||
|
a:hover { color: #FF0000; text-decoration: underline }
|
||||||
|
h1 { font-family: Verdana; font-size: 18pt; color: #000080; font-weight: bold;
|
||||||
|
text-align: Center; margin-right: 3 }
|
||||||
|
h2 { font-family: Verdana; font-size: 14pt; color: #000080; font-weight: bold;
|
||||||
|
background-color: #CCCCCC; margin-top: 24; margin-bottom: 3;
|
||||||
|
padding: 6 }
|
||||||
|
h3 { font-family: Verdana; font-size: 10pt; font-weight: bold; background-color:
|
||||||
|
#CCCCCC; margin-top: 24; margin-bottom: 3; padding: 6 }
|
||||||
|
pre { font-family: Courier New; font-size: 10pt; background-color: #CCFFCC;
|
||||||
|
margin-left: 24; margin-right: 24 }
|
||||||
|
ul { list-style-type: square; margin-top: 6pt; margin-bottom: 0 }
|
||||||
|
ol { margin-top: 6pt; margin-bottom: 0 }
|
||||||
|
li { clear: both; margin-bottom: 6pt }
|
||||||
|
table { font-size: 100%; border-width: 0; padding: 0 }
|
||||||
|
th { color: #FFFFFF; background-color: #000080; text-align: left; vertical-align:
|
||||||
|
bottom; padding-right: 6pt }
|
||||||
|
tr { text-align: left; vertical-align: top }
|
||||||
|
td { text-align: left; vertical-align: top; padding-right: 6pt }
|
||||||
|
.ToolT { font-size: 8pt; color: #808080 }
|
||||||
|
.TinyT { font-size: 8pt; text-align: Center }
|
||||||
|
code { color: #000000; background-color: #E0E0E0; font-family: 'Courier New', Courier;
|
||||||
|
line-height: 120%; font-style: normal }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Notes
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
p.note { font-weight: bold; clear: both; margin-bottom: 3pt; padding-top: 6pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Expanding/Contracting Divisions
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
#expand { text-decoration: none; margin-bottom: 3pt }
|
||||||
|
img.expand { border-style: none; border-width: medium }
|
||||||
|
div.expand { display: none; margin-left: 9pt; margin-top: 0 }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Where List Tags
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
p.wh { font-weight: bold; clear: both; margin-top: 6pt; margin-bottom: 3pt }
|
||||||
|
table.wh { width: 100% }
|
||||||
|
td.whItem { white-space: nowrap; font-style: italic; padding-right: 6pt; padding-bottom:
|
||||||
|
6pt }
|
||||||
|
td.whDesc { padding-bottom: 6pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Keil Table Tags
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
table.kt { border: 1pt solid #000000 }
|
||||||
|
th.kt { white-space: nowrap; border-bottom: 1pt solid #000000; padding-left: 6pt;
|
||||||
|
padding-right: 6pt; padding-top: 4pt; padding-bottom: 4pt }
|
||||||
|
tr.kt { }
|
||||||
|
td.kt { color: #000000; background-color: #E0E0E0; border-top: 1pt solid #A0A0A0;
|
||||||
|
padding-left: 6pt; padding-right: 6pt; padding-top: 2pt;
|
||||||
|
padding-bottom: 2pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
-->
|
||||||
|
|
||||||
|
</style>
|
||||||
|
</head>
|
||||||
|
|
||||||
|
<body>
|
||||||
|
|
||||||
|
<h1>Changes to CMSIS version V1.20</h1>
|
||||||
|
|
||||||
|
<hr>
|
||||||
|
|
||||||
|
<h2>1. Removed CMSIS Middelware packages</h2>
|
||||||
|
<p>
|
||||||
|
CMSIS Middleware is on hold from ARM side until a agreement between all CMSIS partners is found.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<h2>2. SystemFrequency renamed to SystemCoreClock</h2>
|
||||||
|
<p>
|
||||||
|
The variable name <strong>SystemCoreClock</strong> is more precise than <strong>SystemFrequency</strong>
|
||||||
|
because the variable holds the clock value at which the core is running.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<h2>3. Changed startup concept</h2>
|
||||||
|
<p>
|
||||||
|
The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit
|
||||||
|
from main) has the weakness that it does not work for controllers which need a already
|
||||||
|
configuerd clock system to configure the external memory controller.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<h3>Changed startup concept</h3>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
SystemInit() is called from startup file before <strong>premain</strong>.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<strong>SystemInit()</strong> configures the clock system and also configures
|
||||||
|
an existing external memory controller.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<strong>SystemInit()</strong> must not use global variables.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<strong>SystemCoreClock</strong> is initialized with a correct predefined value.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
Additional function <strong>void SystemCoreClockUpdate (void)</strong> is provided.<br>
|
||||||
|
<strong>SystemCoreClockUpdate()</strong> updates the variable <strong>SystemCoreClock</strong>
|
||||||
|
and must be called whenever the core clock is changed.<br>
|
||||||
|
<strong>SystemCoreClockUpdate()</strong> evaluates the clock register settings and calculates
|
||||||
|
the current core clock.
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
|
||||||
|
<h2>4. Advanced Debug Functions</h2>
|
||||||
|
<p>
|
||||||
|
ITM communication channel is only capable for OUT direction. To allow also communication for
|
||||||
|
IN direction a simple concept is provided.
|
||||||
|
</p>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
Global variable <strong>volatile int ITM_RxBuffer</strong> used for IN data.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
Function <strong>int ITM_CheckChar (void)</strong> checks if a new character is available.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
Function <strong>int ITM_ReceiveChar (void)</strong> retrieves the new character.
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<p>
|
||||||
|
For detailed explanation see file <strong>CMSIS debug support.htm</strong>.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
|
||||||
|
<h2>5. Core Register Bit Definitions</h2>
|
||||||
|
<p>
|
||||||
|
Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the
|
||||||
|
defines correspond with the Cortex-M Technical Reference Manual.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
e.g. SysTick structure with bit definitions
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick
|
||||||
|
memory mapped structure for SysTick
|
||||||
|
@{
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
__IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */
|
||||||
|
__IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */
|
||||||
|
__IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */
|
||||||
|
__I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */
|
||||||
|
} SysTick_Type;
|
||||||
|
|
||||||
|
/* SysTick Control / Status Register Definitions */
|
||||||
|
#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
|
||||||
|
#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
|
||||||
|
|
||||||
|
#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
|
||||||
|
#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
|
||||||
|
|
||||||
|
#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
|
||||||
|
#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
|
||||||
|
|
||||||
|
#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
|
||||||
|
#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
|
||||||
|
|
||||||
|
/* SysTick Reload Register Definitions */
|
||||||
|
#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
|
||||||
|
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
|
||||||
|
|
||||||
|
/* SysTick Current Register Definitions */
|
||||||
|
#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
|
||||||
|
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
|
||||||
|
|
||||||
|
/* SysTick Calibration Register Definitions */
|
||||||
|
#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
|
||||||
|
#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
|
||||||
|
|
||||||
|
#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
|
||||||
|
#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
|
||||||
|
|
||||||
|
#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
|
||||||
|
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
|
||||||
|
/*@}*/ /* end of group CMSIS_CM3_SysTick */</pre>
|
||||||
|
|
||||||
|
<h2>7. DoxyGen Tags</h2>
|
||||||
|
<p>
|
||||||
|
DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation
|
||||||
|
using DoxyGen.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<h2>8. Folder Structure</h2>
|
||||||
|
<p>
|
||||||
|
The folder structure is changed to differentiate the single support packages.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<ul>
|
||||||
|
<li>CM0</li>
|
||||||
|
<li>CM3
|
||||||
|
<ul>
|
||||||
|
<li>CoreSupport</li>
|
||||||
|
<li>DeviceSupport</li>
|
||||||
|
<ul>
|
||||||
|
<li>Vendor
|
||||||
|
<ul>
|
||||||
|
<li>Device
|
||||||
|
<ul>
|
||||||
|
<li>Startup
|
||||||
|
<ul>
|
||||||
|
<li>Toolchain</li>
|
||||||
|
<li>Toolchain</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
<li>Device</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
<li>Vendor</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
<li>Example
|
||||||
|
<ul>
|
||||||
|
<li>Toolchain
|
||||||
|
<ul>
|
||||||
|
<li>Device</li>
|
||||||
|
<li>Device</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
<li>Toolchain</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
|
||||||
|
<li>Documentation</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h2>9. Open Points</h2>
|
||||||
|
<p>
|
||||||
|
Following points need to be clarified and solved:
|
||||||
|
</p>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
<p>
|
||||||
|
Equivalent C and Assembler startup files.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
Is there a need for having C startup files although assembler startup files are
|
||||||
|
very efficient and do not need to be changed?
|
||||||
|
<p/>
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<p>
|
||||||
|
Placing of HEAP in external RAM.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
It must be possible to place HEAP in external RAM if the device supports an
|
||||||
|
external memory controller.
|
||||||
|
</p>
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<p>
|
||||||
|
Placing of STACK /HEAP.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
STACK should always be placed at the end of internal RAM.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
If HEAP is placed in internal RAM than it should be placed after RW ZI section.
|
||||||
|
</p>
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<p>
|
||||||
|
Removing core_cm3.c and core_cm0.c.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
On a long term the functions in core_cm3.c and core_cm0.c must be replaced with
|
||||||
|
appropriate compiler intrinsics.
|
||||||
|
</p>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
|
||||||
|
<h2>10. Limitations</h2>
|
||||||
|
<p>
|
||||||
|
The following limitations are not covered with the current CMSIS version:
|
||||||
|
</p>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
No <strong>C startup files</strong> for ARM toolchain are provided.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
No <strong>C startup files</strong> for GNU toolchain are provided.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
No <strong>C startup files</strong> for IAR toolchain are provided.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
No <strong>Tasking</strong> projects are provided yet.
|
||||||
|
</li>
|
||||||
|
</ul>
|
File diff suppressed because it is too large
Load Diff
Binary file not shown.
Binary file not shown.
|
@ -1582,40 +1582,40 @@ OUTPUT(D:/usr/feaser/software/OpenBLT/Target/Demo/ARMCM3_STM32_Olimex_STM32P103_
|
||||||
.comment 0x00000000 0x12 THUMB Debug/../../obj/system_stm32f10x.o
|
.comment 0x00000000 0x12 THUMB Debug/../../obj/system_stm32f10x.o
|
||||||
.comment 0x00000000 0x12 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
.comment 0x00000000 0x12 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||||
|
|
||||||
.debug_line 0x00000000 0x7a0c
|
.debug_line 0x00000000 0x813e
|
||||||
.debug_line 0x00000000 0xf1 THUMB Debug/../../obj/cstart.o
|
.debug_line 0x00000000 0xf1 THUMB Debug/../../obj/cstart.o
|
||||||
.debug_line 0x000000f1 0x25d THUMB Debug/../../obj/led.o
|
.debug_line 0x000000f1 0x2f3 THUMB Debug/../../obj/led.o
|
||||||
.debug_line 0x0000034e 0x1f5 THUMB Debug/../../obj/main.o
|
.debug_line 0x000003e4 0x28b THUMB Debug/../../obj/main.o
|
||||||
.debug_line 0x00000543 0x20b THUMB Debug/../../obj/timer.o
|
.debug_line 0x0000066f 0x2a1 THUMB Debug/../../obj/timer.o
|
||||||
.debug_line 0x0000074e 0x133 THUMB Debug/../../obj/vectors.o
|
.debug_line 0x00000910 0x133 THUMB Debug/../../obj/vectors.o
|
||||||
.debug_line 0x00000881 0x17c THUMB Debug/../../obj/irq.o
|
.debug_line 0x00000a43 0x17c THUMB Debug/../../obj/irq.o
|
||||||
.debug_line 0x000009fd 0x2ac THUMB Debug/../../obj/boot.o
|
.debug_line 0x00000bbf 0x342 THUMB Debug/../../obj/boot.o
|
||||||
.debug_line 0x00000ca9 0x31d THUMB Debug/../../obj/misc.o
|
.debug_line 0x00000f01 0x353 THUMB Debug/../../obj/misc.o
|
||||||
.debug_line 0x00000fc6 0x5fc THUMB Debug/../../obj/stm32f10x_adc.o
|
.debug_line 0x00001254 0x632 THUMB Debug/../../obj/stm32f10x_adc.o
|
||||||
.debug_line 0x000015c2 0x307 THUMB Debug/../../obj/stm32f10x_bkp.o
|
.debug_line 0x00001886 0x33d THUMB Debug/../../obj/stm32f10x_bkp.o
|
||||||
.debug_line 0x000018c9 0x632 THUMB Debug/../../obj/stm32f10x_can.o
|
.debug_line 0x00001bc3 0x668 THUMB Debug/../../obj/stm32f10x_can.o
|
||||||
.debug_line 0x00001efb 0x3ec THUMB Debug/../../obj/stm32f10x_cec.o
|
.debug_line 0x0000222b 0x422 THUMB Debug/../../obj/stm32f10x_cec.o
|
||||||
.debug_line 0x000022e7 0x2a0 THUMB Debug/../../obj/stm32f10x_crc.o
|
.debug_line 0x0000264d 0x2d6 THUMB Debug/../../obj/stm32f10x_crc.o
|
||||||
.debug_line 0x00002587 0x3c8 THUMB Debug/../../obj/stm32f10x_dac.o
|
.debug_line 0x00002923 0x3fe THUMB Debug/../../obj/stm32f10x_dac.o
|
||||||
.debug_line 0x0000294f 0x25b THUMB Debug/../../obj/stm32f10x_dbgmcu.o
|
.debug_line 0x00002d21 0x291 THUMB Debug/../../obj/stm32f10x_dbgmcu.o
|
||||||
.debug_line 0x00002baa 0x3dc THUMB Debug/../../obj/stm32f10x_dma.o
|
.debug_line 0x00002fb2 0x412 THUMB Debug/../../obj/stm32f10x_dma.o
|
||||||
.debug_line 0x00002f86 0x37d THUMB Debug/../../obj/stm32f10x_exti.o
|
.debug_line 0x000033c4 0x3b3 THUMB Debug/../../obj/stm32f10x_exti.o
|
||||||
.debug_line 0x00003303 0x5b2 THUMB Debug/../../obj/stm32f10x_flash.o
|
.debug_line 0x00003777 0x5e8 THUMB Debug/../../obj/stm32f10x_flash.o
|
||||||
.debug_line 0x000038b5 0x52e THUMB Debug/../../obj/stm32f10x_fsmc.o
|
.debug_line 0x00003d5f 0x564 THUMB Debug/../../obj/stm32f10x_fsmc.o
|
||||||
.debug_line 0x00003de3 0x488 THUMB Debug/../../obj/stm32f10x_gpio.o
|
.debug_line 0x000042c3 0x4be THUMB Debug/../../obj/stm32f10x_gpio.o
|
||||||
.debug_line 0x0000426b 0x5b0 THUMB Debug/../../obj/stm32f10x_i2c.o
|
.debug_line 0x00004781 0x5e6 THUMB Debug/../../obj/stm32f10x_i2c.o
|
||||||
.debug_line 0x0000481b 0x291 THUMB Debug/../../obj/stm32f10x_iwdg.o
|
.debug_line 0x00004d67 0x2c7 THUMB Debug/../../obj/stm32f10x_iwdg.o
|
||||||
.debug_line 0x00004aac 0x30b THUMB Debug/../../obj/stm32f10x_pwr.o
|
.debug_line 0x0000502e 0x341 THUMB Debug/../../obj/stm32f10x_pwr.o
|
||||||
.debug_line 0x00004db7 0x596 THUMB Debug/../../obj/stm32f10x_rcc.o
|
.debug_line 0x0000536f 0x5cc THUMB Debug/../../obj/stm32f10x_rcc.o
|
||||||
.debug_line 0x0000534d 0x34e THUMB Debug/../../obj/stm32f10x_rtc.o
|
.debug_line 0x0000593b 0x384 THUMB Debug/../../obj/stm32f10x_rtc.o
|
||||||
.debug_line 0x0000569b 0x524 THUMB Debug/../../obj/stm32f10x_sdio.o
|
.debug_line 0x00005cbf 0x55a THUMB Debug/../../obj/stm32f10x_sdio.o
|
||||||
.debug_line 0x00005bbf 0x4fb THUMB Debug/../../obj/stm32f10x_spi.o
|
.debug_line 0x00006219 0x531 THUMB Debug/../../obj/stm32f10x_spi.o
|
||||||
.debug_line 0x000060ba 0xb6e THUMB Debug/../../obj/stm32f10x_tim.o
|
.debug_line 0x0000674a 0xba4 THUMB Debug/../../obj/stm32f10x_tim.o
|
||||||
.debug_line 0x00006c28 0x574 THUMB Debug/../../obj/stm32f10x_usart.o
|
.debug_line 0x000072ee 0x5aa THUMB Debug/../../obj/stm32f10x_usart.o
|
||||||
.debug_line 0x0000719c 0x2b8 THUMB Debug/../../obj/stm32f10x_wwdg.o
|
.debug_line 0x00007898 0x2ee THUMB Debug/../../obj/stm32f10x_wwdg.o
|
||||||
.debug_line 0x00007454 0x2be THUMB Debug/../../obj/core_cm3.o
|
.debug_line 0x00007b86 0x2be THUMB Debug/../../obj/core_cm3.o
|
||||||
.debug_line 0x00007712 0x286 THUMB Debug/../../obj/system_stm32f10x.o
|
.debug_line 0x00007e44 0x286 THUMB Debug/../../obj/system_stm32f10x.o
|
||||||
.debug_line 0x00007998 0x74 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
.debug_line 0x000080ca 0x74 C:/Program Files (x86)/Rowley Associates Limited/CrossWorks for ARM 2.1/lib/libc_user_libc_v7m_t_le.a(user_libc.o)
|
||||||
|
|
||||||
.debug_info 0x00000000 0xcb46
|
.debug_info 0x00000000 0xcb46
|
||||||
.debug_info 0x00000000 0xec THUMB Debug/../../obj/cstart.o
|
.debug_info 0x00000000 0xec THUMB Debug/../../obj/cstart.o
|
||||||
|
|
|
@ -12,7 +12,6 @@
|
||||||
<file file_name="../led.c"/>
|
<file file_name="../led.c"/>
|
||||||
<file file_name="../led.h"/>
|
<file file_name="../led.h"/>
|
||||||
<file file_name="../main.c"/>
|
<file file_name="../main.c"/>
|
||||||
<file file_name="../stm32f10x.h"/>
|
|
||||||
<file file_name="../timer.c"/>
|
<file file_name="../timer.c"/>
|
||||||
<file file_name="../timer.h"/>
|
<file file_name="../timer.h"/>
|
||||||
<file file_name="../vectors.c"/>
|
<file file_name="../vectors.c"/>
|
||||||
|
|
|
@ -56,7 +56,7 @@
|
||||||
<Watches active="0" update="Never" />
|
<Watches active="0" update="Never" />
|
||||||
</Watch4>
|
</Watch4>
|
||||||
<Files>
|
<Files>
|
||||||
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="28" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Prog\main.c" y="144" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Prog\main.c" left="0" selected="1" name="unnamed" top="129" />
|
<SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="19" debugPath="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Prog\main.c" y="24" path="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Prog\main.c" left="0" selected="1" name="unnamed" top="11" />
|
||||||
</Files>
|
</Files>
|
||||||
<ARMCrossStudioWindow activeProject="demoprog_olimex_stm32p103" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Prog" fileDialogDefaultFilter="*.c" autoConnectCapabilities="266111" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
<ARMCrossStudioWindow activeProject="demoprog_olimex_stm32p103" autoConnectTarget="Olimex ARM-USB-TINY" debugSearchFileMap="" fileDialogInitialDirectory="D:\usr\feaser\software\OpenBLT\Target\Demo\ARMCM3_STM32_Olimex_STM32P103_Crossworks\Prog" fileDialogDefaultFilter="*.c" autoConnectCapabilities="266111" debugSearchPath="" buildConfiguration="THUMB Debug" />
|
||||||
</session>
|
</session>
|
||||||
|
|
Binary file not shown.
|
@ -0,0 +1,188 @@
|
||||||
|
|
||||||
|
bin/openbtl_olimex_stm32p103.elf: file format elf32-littlearm
|
||||||
|
bin/openbtl_olimex_stm32p103.elf
|
||||||
|
architecture: arm, flags 0x00000112:
|
||||||
|
EXEC_P, HAS_SYMS, D_PAGED
|
||||||
|
start address 0x08000000
|
||||||
|
|
||||||
|
Program Header:
|
||||||
|
LOAD off 0x00008000 vaddr 0x08000000 paddr 0x08000000 align 2**15
|
||||||
|
filesz 0x00000f87 memsz 0x00000f87 flags r-x
|
||||||
|
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x08000f87 align 2**15
|
||||||
|
filesz 0x00000014 memsz 0x00000600 flags rw-
|
||||||
|
private flags = 5000002: [Version5 EABI] [has entry point]
|
||||||
|
|
||||||
|
Sections:
|
||||||
|
Idx Name Size VMA LMA File off Algn
|
||||||
|
0 .text 00000f87 08000000 08000000 00008000 2**2
|
||||||
|
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||||
|
1 .data 00000014 20000000 08000f87 00010000 2**2
|
||||||
|
CONTENTS, ALLOC, LOAD, DATA
|
||||||
|
2 .bss 000005ec 20000014 08000f9b 00010014 2**2
|
||||||
|
ALLOC
|
||||||
|
3 .debug_abbrev 00000ed3 00000000 00000000 00010014 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
4 .debug_info 000026dd 00000000 00000000 00010ee7 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
5 .debug_line 00001045 00000000 00000000 000135c4 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
6 .debug_pubtypes 00000471 00000000 00000000 00014609 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
7 .debug_str 00000cfa 00000000 00000000 00014a7a 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
8 .comment 0000002a 00000000 00000000 00015774 2**0
|
||||||
|
CONTENTS, READONLY
|
||||||
|
9 .ARM.attributes 00000031 00000000 00000000 0001579e 2**0
|
||||||
|
CONTENTS, READONLY
|
||||||
|
10 .debug_loc 00000f72 00000000 00000000 000157cf 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
11 .debug_pubnames 00000593 00000000 00000000 00016741 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
12 .debug_aranges 000003f8 00000000 00000000 00016cd4 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
13 .debug_ranges 00000328 00000000 00000000 000170cc 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
14 .debug_frame 000007c0 00000000 00000000 000173f4 2**2
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
SYMBOL TABLE:
|
||||||
|
08000000 l d .text 00000000 .text
|
||||||
|
20000000 l d .data 00000000 .data
|
||||||
|
20000014 l d .bss 00000000 .bss
|
||||||
|
00000000 l d .debug_abbrev 00000000 .debug_abbrev
|
||||||
|
00000000 l d .debug_info 00000000 .debug_info
|
||||||
|
00000000 l d .debug_line 00000000 .debug_line
|
||||||
|
00000000 l d .debug_pubtypes 00000000 .debug_pubtypes
|
||||||
|
00000000 l d .debug_str 00000000 .debug_str
|
||||||
|
00000000 l d .comment 00000000 .comment
|
||||||
|
00000000 l d .ARM.attributes 00000000 .ARM.attributes
|
||||||
|
00000000 l d .debug_loc 00000000 .debug_loc
|
||||||
|
00000000 l d .debug_pubnames 00000000 .debug_pubnames
|
||||||
|
00000000 l d .debug_aranges 00000000 .debug_aranges
|
||||||
|
00000000 l d .debug_ranges 00000000 .debug_ranges
|
||||||
|
00000000 l d .debug_frame 00000000 .debug_frame
|
||||||
|
00000000 l df *ABS* 00000000 vectors.c
|
||||||
|
00000000 l df *ABS* 00000000 cstart.c
|
||||||
|
0800017a l F .text 00000000 zero_loop2
|
||||||
|
08000e52 l F .text 00000000 zero_loop
|
||||||
|
00000000 l df *ABS* 00000000 hooks.c
|
||||||
|
00000000 l df *ABS* 00000000 main.c
|
||||||
|
00000000 l df *ABS* 00000000 core_cm3.c
|
||||||
|
00000000 l df *ABS* 00000000 system_stm32f10x.c
|
||||||
|
00000000 l df *ABS* 00000000 boot.c
|
||||||
|
00000000 l df *ABS* 00000000 com.c
|
||||||
|
20000014 l O .bss 00000001 comEntryStateConnect
|
||||||
|
20000015 l O .bss 00000040 xcpCtoReqPacket.1371
|
||||||
|
00000000 l df *ABS* 00000000 xcp.c
|
||||||
|
0800056c l F .text 0000000c XcpProtectResources
|
||||||
|
08000578 l F .text 00000014 XcpSetCtoError
|
||||||
|
08000e7b l O .text 00000008 xcpStationId
|
||||||
|
20000058 l O .bss 0000004c xcpInfo
|
||||||
|
00000000 l df *ABS* 00000000 backdoor.c
|
||||||
|
200000a4 l O .bss 00000001 backdoorOpen
|
||||||
|
00000000 l df *ABS* 00000000 cop.c
|
||||||
|
00000000 l df *ABS* 00000000 assert.c
|
||||||
|
200000a8 l O .bss 00000004 assert_failure_file
|
||||||
|
200000ac l O .bss 00000004 assert_failure_line
|
||||||
|
00000000 l df *ABS* 00000000 cpu.c
|
||||||
|
00000000 l df *ABS* 00000000 can.c
|
||||||
|
00000000 l df *ABS* 00000000 uart.c
|
||||||
|
08000858 l F .text 0000001c UartReceiveByte
|
||||||
|
08000874 l F .text 0000002c UartTransmitByte
|
||||||
|
200000b0 l O .bss 00000041 xcpCtoReqPacket.1392
|
||||||
|
200000f1 l O .bss 00000001 xcpCtoRxLength.1393
|
||||||
|
200000f2 l O .bss 00000001 xcpCtoRxInProgress.1394
|
||||||
|
00000000 l df *ABS* 00000000 nvm.c
|
||||||
|
00000000 l df *ABS* 00000000 timer.c
|
||||||
|
200000f4 l O .bss 00000002 millisecond_counter
|
||||||
|
00000000 l df *ABS* 00000000 flash.c
|
||||||
|
08000a0c l F .text 0000001c FlashUnlock
|
||||||
|
08000a28 l F .text 00000010 FlashLock
|
||||||
|
08000a38 l F .text 00000038 FlashGetSector
|
||||||
|
08000a70 l F .text 0000008c FlashWriteBlock
|
||||||
|
08000afc l F .text 00000030 FlashGetSectorBaseAddr
|
||||||
|
08000b2c l F .text 00000026 FlashInitBlock
|
||||||
|
08000b54 l F .text 00000044 FlashSwitchBlock
|
||||||
|
08000b98 l F .text 00000080 FlashAddToBlock
|
||||||
|
08000ea8 l O .text 000000b4 flashLayout
|
||||||
|
200000f8 l O .bss 00000204 bootBlockInfo
|
||||||
|
200002fc l O .bss 00000204 blockInfo
|
||||||
|
080004f8 g F .text 0000002c ComInit
|
||||||
|
08000c30 g F .text 0000004c FlashWrite
|
||||||
|
08000312 g F .text 00000006 __set_PRIMASK
|
||||||
|
080007fc g F .text 00000018 AssertFailure
|
||||||
|
08000e34 g F .text 00000038 reset_handler
|
||||||
|
080009b0 g F .text 0000001c TimerUpdate
|
||||||
|
080005b8 g F .text 00000010 XcpPacketTransmitted
|
||||||
|
08000524 g F .text 0000001c ComTask
|
||||||
|
08000550 g F .text 0000000c ComSetConnectEntryState
|
||||||
|
08000318 g F .text 00000006 __get_FAULTMASK
|
||||||
|
08000330 g F .text 00000004 __REV
|
||||||
|
080004d0 g F .text 00000016 BootInit
|
||||||
|
080007e0 g F .text 00000018 BackDoorInit
|
||||||
|
08000364 g F .text 00000006 __STREXW
|
||||||
|
08000352 g F .text 00000006 __LDREXW
|
||||||
|
080007fa g F .text 00000002 CopService
|
||||||
|
08000f87 g .text 00000000 _etext
|
||||||
|
080009a4 g F .text 0000000c TimerReset
|
||||||
|
20000010 g O .data 00000004 SystemCoreClock
|
||||||
|
0800033c g F .text 00000006 __RBIT
|
||||||
|
080004e6 g F .text 00000012 BootTask
|
||||||
|
08000dac g F .text 00000048 FlashWriteChecksum
|
||||||
|
0800031e g F .text 00000006 __set_FAULTMASK
|
||||||
|
08000540 g F .text 00000010 ComTransmitPacket
|
||||||
|
08000324 g F .text 00000006 __get_CONTROL
|
||||||
|
080005a8 g F .text 00000010 XcpIsConnected
|
||||||
|
08000980 g F .text 00000004 NvmInit
|
||||||
|
08000c18 g F .text 00000018 FlashInit
|
||||||
|
080002e4 g F .text 00000008 __get_PSP
|
||||||
|
20000500 g .bss 00000000 _ebss
|
||||||
|
080002ec g F .text 00000006 __set_PSP
|
||||||
|
00000100 g *ABS* 00000000 __STACKSIZE__
|
||||||
|
08000e28 g F .text 0000000c UnusedISR
|
||||||
|
08000342 g F .text 00000008 __LDREXB
|
||||||
|
080008a0 g F .text 00000028 UartInit
|
||||||
|
08000988 g F .text 00000004 NvmErase
|
||||||
|
20000014 g .bss 00000000 _bss
|
||||||
|
0800030c g F .text 00000006 __get_PRIMASK
|
||||||
|
080005c8 g F .text 000001e8 XcpPacketReceived
|
||||||
|
20000000 g O .data 00000010 AHBPrescTable
|
||||||
|
08000df4 g F .text 00000034 FlashDone
|
||||||
|
08000338 g F .text 00000004 __REVSH
|
||||||
|
08000150 g F .text 0000004c EntryFromProg
|
||||||
|
0800055c g F .text 0000000c ComIsConnectEntryState
|
||||||
|
0800058c g F .text 0000001c XcpInit
|
||||||
|
08000c7c g F .text 000000dc FlashErase
|
||||||
|
080001b0 g F .text 00000134 main
|
||||||
|
0800032a g F .text 00000006 __set_CONTROL
|
||||||
|
08000990 g F .text 00000012 NvmDone
|
||||||
|
080008c8 g F .text 00000050 UartTransmitPacket
|
||||||
|
0800098c g F .text 00000004 NvmVerifyChecksum
|
||||||
|
08000834 g F .text 00000020 CpuMemCopy
|
||||||
|
080009cc g F .text 0000000c TimerSet
|
||||||
|
080002f2 g F .text 00000008 __get_MSP
|
||||||
|
0800036c g F .text 000000fc SystemInit
|
||||||
|
08000918 g F .text 00000068 UartReceivePacket
|
||||||
|
08000334 g F .text 00000004 __REV16
|
||||||
|
20000000 g .data 00000000 _data
|
||||||
|
080002fa g F .text 00000006 __set_MSP
|
||||||
|
080007f8 g F .text 00000002 CopInit
|
||||||
|
08000854 g F .text 00000004 CpuReset
|
||||||
|
08000984 g F .text 00000004 NvmWrite
|
||||||
|
08000814 g F .text 00000020 CpuStartUserProgram
|
||||||
|
20000600 g .bss 00000000 _estack
|
||||||
|
08000d58 g F .text 00000054 FlashVerifyChecksum
|
||||||
|
08000306 g F .text 00000006 __set_BASEPRI
|
||||||
|
20000014 g .data 00000000 _edata
|
||||||
|
08000000 g O .text 00000150 _vectab
|
||||||
|
0800035e g F .text 00000006 __STREXH
|
||||||
|
08000468 g F .text 00000068 SystemCoreClockUpdate
|
||||||
|
0800034a g F .text 00000008 __LDREXH
|
||||||
|
08000568 g F .text 00000004 ComIsConnected
|
||||||
|
08000300 g F .text 00000006 __get_BASEPRI
|
||||||
|
080007b0 g F .text 00000030 BackDoorCheck
|
||||||
|
20000500 g .bss 00000000 _stack
|
||||||
|
080009fc g F .text 00000010 TimerGet
|
||||||
|
08000358 g F .text 00000006 __STREXB
|
||||||
|
080009d8 g F .text 00000024 TimerInit
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,253 @@
|
||||||
|
S024000062696E2F6F70656E62746C5F6F6C696D65785F73746D3332703130332E737265639B
|
||||||
|
S3150800000000060020350E0008290E0008290E0008F3
|
||||||
|
S31508000010290E0008290E0008290E0008290E0008D6
|
||||||
|
S31508000020290E0008290E0008290E0008290E0008C6
|
||||||
|
S31508000030290E0008290E0008290E0008290E0008B6
|
||||||
|
S31508000040290E0008290E0008290E0008290E0008A6
|
||||||
|
S31508000050290E0008290E0008290E0008290E000896
|
||||||
|
S31508000060290E0008290E0008290E0008290E000886
|
||||||
|
S31508000070290E0008290E0008290E0008290E000876
|
||||||
|
S31508000080290E0008290E0008290E0008290E000866
|
||||||
|
S31508000090290E0008290E0008290E0008290E000856
|
||||||
|
S315080000A0290E0008290E0008290E0008290E000846
|
||||||
|
S315080000B0290E0008290E0008290E0008290E000836
|
||||||
|
S315080000C0290E0008290E0008290E0008290E000826
|
||||||
|
S315080000D0290E0008290E0008290E0008290E000816
|
||||||
|
S315080000E0290E0008290E0008290E0008290E000806
|
||||||
|
S315080000F0290E0008290E0008290E0008290E0008F6
|
||||||
|
S31508000100290E0008290E0008290E0008290E0008E5
|
||||||
|
S31508000110290E0008290E0008290E0008290E0008D5
|
||||||
|
S31508000120290E0008290E0008290E0008290E0008C5
|
||||||
|
S31508000130290E0008290E0008290E0008290E0008B5
|
||||||
|
S31508000140290E0008290E0008290E0008290E0008A5
|
||||||
|
S3150800015010B572B611481249016012498D460C4A0B
|
||||||
|
S315080001600C4B03E052F8041B43F8041B0A498B4264
|
||||||
|
S31508000170F8D30D480D494FF000028842B8BF40F841
|
||||||
|
S31508000180042BFADB00F0E4F9BDE8104000F010B8E3
|
||||||
|
S31508000190870F0008000000201400002008ED00E08A
|
||||||
|
S315080001A000000008000600201400002000050020BA
|
||||||
|
S315080001B007B5002301930093454B1A6842F00102E4
|
||||||
|
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|
||||||
|
S315080001D0847222F480321A601A6822F480221A6025
|
||||||
|
S315080001E05A6822F4FE025A604FF41F029A601A688F
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||||||
|
S315080001F042F480321A60364B1B6803F400330093CE
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||||||
|
S31508000200019B01330193009B23B9019A40F2DC5309
|
||||||
|
S315080002109A42F0D12E4B1B6813F4003F03D12E48A7
|
||||||
|
S315080002206F2100F0EBFA2D4B1A6842F010021A60A3
|
||||||
|
S315080002301A6822F003021A601A6842F002021A606B
|
||||||
|
S31508000240234B5A685A605A6842F400525A605A68F0
|
||||||
|
S3150800025042F480625A605A6822F47C125A605A68DC
|
||||||
|
S3150800026042F4E8125A601A6842F080721A60184B13
|
||||||
|
S315080002701A6812F0007FFAD05A6822F003025A6010
|
||||||
|
S315080002805A6842F002025A60114B5A6802F00C0290
|
||||||
|
S31508000290082AF9D1DA6942F40032DA619A6942F039
|
||||||
|
S315080002A005029A610E4B1A6822F470621A601A687F
|
||||||
|
S315080002B042F430621A601A6822F470421A601A68A8
|
||||||
|
S315080002C042F480421A6000F003F900F00CF9FCE7EA
|
||||||
|
S315080002D0001002400000FFF8740E000800200240DB
|
||||||
|
S315080002E000080140EFF309800046704780F309884B
|
||||||
|
S315080002F07047EFF308800046704780F30888704718
|
||||||
|
S31508000300EFF31280704780F311887047EFF310807F
|
||||||
|
S31508000310704780F310887047EFF31380704780F3B7
|
||||||
|
S3150800032013887047EFF31480704780F3148870477A
|
||||||
|
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||||||
|
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|
||||||
|
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|
||||||
|
S31508000360500F704741E80000704700003A4B82B0D2
|
||||||
|
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|
||||||
|
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|
||||||
|
S3150800039022F480221A605A6822F4FE025A604FF448
|
||||||
|
S315080003A01F029A600022019200921A6842F4803273
|
||||||
|
S315080003B01A60294B1A6802F400320092019A013237
|
||||||
|
S315080003C00192009A1AB9019AB2F5A06FF1D11B6889
|
||||||
|
S315080003D013F4003318BF01230093009B012B34D17B
|
||||||
|
S315080003E01F4B1A6842F010021A601A6822F00302BC
|
||||||
|
S315080003F01A601A6842F002021A60174B5A685A6065
|
||||||
|
S315080004005A685A605A6842F480625A605A6822F4F6
|
||||||
|
S315080004107C125A605A6842F4E8125A601A6842F026
|
||||||
|
S3150800042080721A600C4B1A6812F0007FFAD05A686C
|
||||||
|
S3150800043022F003025A605A6842F002025A60064BDA
|
||||||
|
S315080004405B6803F00C03082BF9D1064B4FF00062EA
|
||||||
|
S315080004509A6002B0704700BF001002400000FFF823
|
||||||
|
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|
||||||
|
S315080004700C01042901D0082902D0124A1A6011E099
|
||||||
|
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|
||||||
|
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|
||||||
|
S315080004A051431960054A0949526802F0F0021209D7
|
||||||
|
S315080004B08A5C196831FA02F21A6070470010024025
|
||||||
|
S315080004C01000002000127A0000093D0000000020FC
|
||||||
|
S315080004D010B500F091F900F083F900F051FABDE883
|
||||||
|
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|
||||||
|
S315080004F0BDE8104000F05CB907B5FF238DF804305D
|
||||||
|
S31508000500FF3B8DF8053000F041F800F0C9F9044BBF
|
||||||
|
S315080005101B78012B02D101A800F056F80EBD00BFCA
|
||||||
|
S315080005201400002010B5054800F0F6F9012804D19A
|
||||||
|
S315080005300248BDE8104000F047B810BD150000207D
|
||||||
|
S3150800054010B5C9B200F0C0F9BDE8104000F034B8E3
|
||||||
|
S31508000550014B01221A70704714000020014B1878CD
|
||||||
|
S31508000560704700BF1400002000F01EB8014B00229F
|
||||||
|
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|
||||||
|
S315080005801871A3F84420704758000020054B002234
|
||||||
|
S315080005901A709A6483F84320A3F844209A705A7014
|
||||||
|
S315080005A0704700BF58000020024B1878003818BF63
|
||||||
|
S315080005B00120704758000020024B002283F8432090
|
||||||
|
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|
||||||
|
S315080005D0FF2F744C0FD1FFF7C9FF102201234021CA
|
||||||
|
S315080005E02271103A2370E7706271A171E17122726B
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
S3150800062071D3D22F40F0A88088E0FA2F40D006D8A0
|
||||||
|
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|
||||||
|
S3150800064044D0FE2F4DD0FC2F40F096803CE06A78CF
|
||||||
|
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|
||||||
|
S315080006606968201DA1646A7800F0E4F8FF23E37046
|
||||||
|
S315080006706A78A36CD318A3646B78013369E0FF2307
|
||||||
|
S31508000680E3706B683DE0FF23E370A16C6B680022A2
|
||||||
|
S3150800069004E011F8015B013B5219D2B2002BF8D1E4
|
||||||
|
S315080006A0C0F80720012222716371A371082350E064
|
||||||
|
S315080006B0FF23E3703C4BA364002323716371A3718A
|
||||||
|
S315080006C00733C4F80730F1E7002056E0FF236278C5
|
||||||
|
S315080006D0E370FF3B2371A371E371237262710623F2
|
||||||
|
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|
||||||
|
S315080006F06A1C00F047F9002833D0FF23E370A36C87
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
S315080007A0BDE8F081580000207B0E00085B000020A1
|
||||||
|
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|
||||||
|
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|
||||||
|
S315080007D0E9F8BDE8104000F01DB810BDA4000020DF
|
||||||
|
S315080007E0044B012210B51A7000F0F6F8BDE8104067
|
||||||
|
S315080007F0FFF7DEBFA40000207047704708B5034B1B
|
||||||
|
S315080008001860034B1960FFF7F8FFFCE7A800002003
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
S31508000850F5D170BD00F0EEBA054B1A8812F02002E9
|
||||||
|
S3150800086003D09B880370012070471046704700BF6D
|
||||||
|
S315080008700044004008B5094B1A8812F080020AD0D5
|
||||||
|
S31508000880988001E0FFF7B9FF044B1B8813F0800F2F
|
||||||
|
S31508000890F8D0012008BD104608BD00BF004400403E
|
||||||
|
S315080008A0084B00221A819A811A829A821A8340F288
|
||||||
|
S315080008B071221A819A8992B242F4005242F00C02CD
|
||||||
|
S315080008C09A81704700440040402970B506460D4697
|
||||||
|
S315080008D003D910488821FFF791FF2846FFF7CAFF7A
|
||||||
|
S315080008E0012803D00B488B21FFF788FF00240DE071
|
||||||
|
S315080008F0FFF783FF16F8010BFFF7BCFF012803D0AB
|
||||||
|
S3150800090004489321FFF77AFF0134A4B2AC42EFD32F
|
||||||
|
S3150800091070BD00BF830E00082DE9F843154C8146CB
|
||||||
|
S31508000920257845B91448FFF797FF01281FD1134BBF
|
||||||
|
S3150800093020701D701BE0114F0F4E97F8008008F1CC
|
||||||
|
S31508000940010806EB0800FFF787FF012805460DD1C9
|
||||||
|
S3150800095032785FFA88F8424587F8008006D148461B
|
||||||
|
S31508000960711CFFF767FF0023237000E00025284667
|
||||||
|
S31508000970BDE8F883F2000020B0000020F100002056
|
||||||
|
S3150800098000F04AB900F054B900F078B900F0E4B9BB
|
||||||
|
S3150800099010B500F00BFA18B1BDE8104000F02ABAFD
|
||||||
|
S315080009A010BD0000014B00221A60704710E000E0FD
|
||||||
|
S315080009B0044B1B6813F4803F03D0034B1A8801329B
|
||||||
|
S315080009C01A80704710E000E0F4000020014B188000
|
||||||
|
S315080009D0704700BFF400002010B5FFF7E3FF054B92
|
||||||
|
S315080009E0054A00205A60052298601A60BDE8104042
|
||||||
|
S315080009F0FFF7ECBF10E000E03F19010008B5FFF76C
|
||||||
|
S31508000A00D7FF014B188808BDF4000020034B044AA1
|
||||||
|
S31508000A105A60044A5A603422DA607047002002405D
|
||||||
|
S31508000A2023016745AB89EFCD024B1A6942F0800274
|
||||||
|
S31508000A301A6170470020024070B500240646254614
|
||||||
|
S31508000A40FFF7DBFE094B1A59964209D3191949686B
|
||||||
|
S31508000A505218964204D20C2202FB0533187A70BD4E
|
||||||
|
S31508000A600C340135B42CEBD1FF2070BDA80E00085C
|
||||||
|
S31508000A70F8B504460068FFF7DFFFFF2838D0FFF710
|
||||||
|
S31508000A80C5FF1D4BDD6815F0010502D0FFF7CCFF49
|
||||||
|
S31508000A902EE01A6942F001021A61234653F8042B24
|
||||||
|
S31508000AA05E59AF18B3B2AB5201E0FFF7A6FE124B80
|
||||||
|
S31508000AB0DB6813F0010FF8D1330C7B8001E0FFF7F8
|
||||||
|
S31508000AC09CFE0D4BDB6813F00103F8D13A68B2427D
|
||||||
|
S31508000AD005D10435B5F5007FDFD1012400E01C46B9
|
||||||
|
S31508000AE0054B1A6922F001021A61FFF79DFF00E023
|
||||||
|
S31508000AF000242046F8BD00BF00200240F8B50A4D84
|
||||||
|
S31508000B00074600242E46FFF778FE2B7ABB4203D110
|
||||||
|
S31508000B100C235C433059F8BD01340C350F2CF2D147
|
||||||
|
S31508000B204FF0FF30F8BD00BFA80E0008CA05D20D69
|
||||||
|
S31508000B3008B552B902688A4209D040F8041B4FF436
|
||||||
|
S31508000B400072FFF777FE012008BD002008BD0120CE
|
||||||
|
S31508000B5008BD000038B50D4B044698420D4606D030
|
||||||
|
S31508000B600B4A914205D0FFF783FF58B102E0094CC2
|
||||||
|
S31508000B7000E01C4620462946FFF7D8FF002808BF94
|
||||||
|
S31508000B80002400E00446204638BD00BFF8000020D7
|
||||||
|
S31508000B9000200008FC0200202DE9F0419846036871
|
||||||
|
S31508000BA021F4FE77B3F1FF3F04460D46164627F0BB
|
||||||
|
S31508000BB0030703D13946FFF7B9FF58B32368BB4289
|
||||||
|
S31508000BC005D020463946FFF7C5FF0446F0B123682D
|
||||||
|
S31508000BD0ED1A65190435FFF710FE231DEB1AB3F558
|
||||||
|
S31508000BE0007F07D3204607F50071FFF7B3FF0446D9
|
||||||
|
S31508000BF060B1051D16F8013B08F1FF381FFA88F8A1
|
||||||
|
S31508000C002B70B8F1000F04D00135E4E72046BDE8A3
|
||||||
|
S31508000C10F0810120BDE8F081034A4FF0FF331360ED
|
||||||
|
S31508000C20024A1360704700BFFC020020F80000204B
|
||||||
|
S31508000C3070B504460E461546FFF7FEFEFF2815D08A
|
||||||
|
S31508000C40601E8019FFF7F8FEFF280FD024F4FE7304
|
||||||
|
S31508000C50074A23F0030393420CBF06480648B3B27B
|
||||||
|
S31508000C6021462A46BDE87040FFF796BF002070BDB2
|
||||||
|
S31508000C7000200008F8000020FC0200202DE9F843B7
|
||||||
|
S31508000C8004460E46FFF7D8FE0546601E8019FFF794
|
||||||
|
S31508000C90D3FEFF2D044655D0FF2856D0854251D89D
|
||||||
|
S31508000CA0002D4CD00F284DD8FFF7B0FE284BDE6834
|
||||||
|
S31508000CB016F0010602D0FFF7B7FE43E01A69284688
|
||||||
|
S31508000CC042F002021A61FFF719FF05462046FFF7B0
|
||||||
|
S31508000CD015FF204F8046B946FFF78FFD3B7AA342A2
|
||||||
|
S31508000CE004D10C2303FB0696736804E001360C371F
|
||||||
|
S31508000CF00F2EF1D10023C5EB0806F618B60AB6B2D0
|
||||||
|
S31508000D00002410E05D611A6942F040021A6101E0B0
|
||||||
|
S31508000D10FFF773FD0E4BDB6813F0010FF8D10134B2
|
||||||
|
S31508000D20A4B205F58065B442094BEBD31A6922F0E3
|
||||||
|
S31508000D3002021A61FFF778FE0120BDE8F88328460B
|
||||||
|
S31508000D40BDE8F8830020BDE8F8830020BDE8F883F5
|
||||||
|
S31508000D5000200240A80E00080D4B1868043B1B68CB
|
||||||
|
S31508000D60C0180C4B1B68C0180B4B1B68C0180B4BE4
|
||||||
|
S31508000D701B68C0180A4B1B68C0180A4B1B68C018AA
|
||||||
|
S31508000D80094B1B68C018D0F1010038BF0020704716
|
||||||
|
S31508000D9004200008082000080C200008102000087D
|
||||||
|
S31508000DA01420000818200008502100080F4A13B51F
|
||||||
|
S31508000DB0D1689468131D52686418A418DA68A418D0
|
||||||
|
S31508000DC01A69A4185A699B69A418E418644201941C
|
||||||
|
S31508000DD0FFF7C2FF844206D004210DEB0102044846
|
||||||
|
S31508000DE0FFF726FF00E001201CBD00BFF800002029
|
||||||
|
S31508000DF0502100080A4808B50368B3F1FF3F02D03E
|
||||||
|
S31508000E00FFF736FE58B107480368B3F1FF3F05D030
|
||||||
|
S31508000E10FFF72EFE003818BF012008BD012008BDC7
|
||||||
|
S31508000E20F8000020FC02002001483621FFF7E6BC46
|
||||||
|
S31508000E305C0F000872B60A4A0A4B03E052F8041B14
|
||||||
|
S31508000E4043F8041B08498B42F8D3084808494FF071
|
||||||
|
S31508000E5000028842B8BF40F8042BFADBFFF7A8B9AE
|
||||||
|
S31508000E60870F00080000002014000020140000204E
|
||||||
|
S31508000E70000500206D61696E2E63004F70656E4235
|
||||||
|
S31508000E804C54002E2E2F2E2E2F2E2E2F536F75726A
|
||||||
|
S31508000E9063652F41524D434D335F53544D33322FC3
|
||||||
|
S31508000EA0756172742E63000000200008002000009F
|
||||||
|
S31508000EB001000000004000080020000002000000B9
|
||||||
|
S31508000EC00060000800200000030000000080000801
|
||||||
|
S31508000ED0002000000400000000A000080020000018
|
||||||
|
S31508000EE00500000000C00008002000000600000001
|
||||||
|
S31508000EF000E00008002000000700000000000108CC
|
||||||
|
S31508000F000020000008000000002001080020000062
|
||||||
|
S31508000F100900000000400108002000000A00000047
|
||||||
|
S31508000F2000600108002000000B0000000080010896
|
||||||
|
S31508000F30002000000C00000000A0010800200000AE
|
||||||
|
S31508000F400D00000000C00108002000000E0000008F
|
||||||
|
S31508000F5000E00108002000000F0000002E2E2F2EB2
|
||||||
|
S31508000F602E2F2E2E2F536F757263652F41524D43C8
|
||||||
|
S31508000F704D335F53544D33322F4743432F766563C2
|
||||||
|
S30C08000F80746F72732E630003
|
||||||
|
S31508000F870000000000000000010203040607080924
|
||||||
|
S30908000F9700A24A0458
|
||||||
|
S70508000000F2
|
|
@ -0,0 +1,2 @@
|
||||||
|
@echo off
|
||||||
|
make --directory=../ all
|
|
@ -0,0 +1,2 @@
|
||||||
|
@echo off
|
||||||
|
make --directory=../ clean
|
|
@ -0,0 +1 @@
|
||||||
|
"C:\Program Files (x86)\OpenOCD\0.4.0\bin\openocd.exe" -f debug.cfg
|
|
@ -0,0 +1,15 @@
|
||||||
|
###
|
||||||
|
# Description: starts the OpenOCD GDB server (localhost:3333)
|
||||||
|
# once started use arm-elf-insight <program>.elf to start the debug session
|
||||||
|
# Usage: openocd.exe" -f debug.cfg
|
||||||
|
###
|
||||||
|
source [find interface/olimex-arm-usb-tiny-h.cfg]
|
||||||
|
source [find board/olimex_stm32_h103.cfg]
|
||||||
|
|
||||||
|
jtag_khz 1000
|
||||||
|
init
|
||||||
|
reset
|
||||||
|
halt
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1 @@
|
||||||
|
"C:\Program Files (x86)\OpenOCD\0.4.0\bin\openocd.exe" -f flash.cfg
|
|
@ -0,0 +1,21 @@
|
||||||
|
###
|
||||||
|
# Description: mass erases and flashes the binary with OpenOCD
|
||||||
|
# Usage: openocd.exe" -f flash.cfg
|
||||||
|
###
|
||||||
|
|
||||||
|
source [find interface/olimex-arm-usb-tiny-h.cfg]
|
||||||
|
source [find board/olimex_stm32_h103.cfg]
|
||||||
|
|
||||||
|
jtag_khz 1000
|
||||||
|
|
||||||
|
init
|
||||||
|
reset
|
||||||
|
sleep 500
|
||||||
|
halt
|
||||||
|
stm32x mass_erase 0
|
||||||
|
flash write_image ..\\bin\\openbtl_olimex_stm32p103.elf
|
||||||
|
#flash write_image erase ..\\bin\\openbtl_olimex_stm32p103.elf
|
||||||
|
reset run
|
||||||
|
shutdown
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,128 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: bootloader configuration header file
|
||||||
|
| File Name: config.h
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
#ifndef CONFIG_H
|
||||||
|
#define CONFIG_H
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* C P U D R I V E R C O N F I G U R A T I O N
|
||||||
|
****************************************************************************************/
|
||||||
|
/* To properly initialize the baudrate clocks of the communication interface, typically
|
||||||
|
* the speed of the crystal oscillator and/or the speed at which the system runs is
|
||||||
|
* needed. Set these through configurables BOOT_CPU_XTAL_SPEED_KHZ and
|
||||||
|
* BOOT_CPU_SYSTEM_SPEED_KHZ, respectively. To enable data exchange with the host that is
|
||||||
|
* not dependent on the targets architecture, the byte ordering needs to be known.
|
||||||
|
* Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects little endian mode and 0 selects
|
||||||
|
* big endian mode.
|
||||||
|
*/
|
||||||
|
#define BOOT_CPU_XTAL_SPEED_KHZ (8000)
|
||||||
|
#define BOOT_CPU_SYSTEM_SPEED_KHZ (72000)
|
||||||
|
#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* C O M M U N I C A T I O N I N T E R F A C E C O N F I G U R A T I O N
|
||||||
|
****************************************************************************************/
|
||||||
|
/* The CAN communication interface is selected by setting the BOOT_COM_CAN_ENABLE
|
||||||
|
* configurable to 1. Configurable BOOT_COM_CAN_BAUDRATE selects the communication speed
|
||||||
|
* in bits/second. Two CAN messages are reserved for communication with the host. The
|
||||||
|
* message identifier for sending data from the target to the host is configured with
|
||||||
|
* BOOT_COM_CAN_TXMSG_ID. The one for receiving data from the host is configured with
|
||||||
|
* BOOT_COM_CAN_RXMSG_ID. The maximum amount of data bytes in a message for data
|
||||||
|
* transmission and reception is set through BOOT_COM_CAN_TX_MAX_DATA and
|
||||||
|
* BOOT_COM_CAN_RX_MAX_DATA, respectively. It is common for a microcontroller to have more
|
||||||
|
* than 1 CAN controller on board. The zero-based BOOT_COM_CAN_CHANNEL_INDEX selects the
|
||||||
|
* CAN controller channel.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#define BOOT_COM_CAN_ENABLE (0)
|
||||||
|
#define BOOT_COM_CAN_BAUDRATE (500000)
|
||||||
|
#define BOOT_COM_CAN_TX_MSG_ID (0x7E1)
|
||||||
|
#define BOOT_COM_CAN_TX_MAX_DATA (8)
|
||||||
|
#define BOOT_COM_CAN_RX_MSG_ID (0x667)
|
||||||
|
#define BOOT_COM_CAN_RX_MAX_DATA (8)
|
||||||
|
#define BOOT_COM_CAN_CHANNEL_INDEX (0)
|
||||||
|
|
||||||
|
/* The UART communication interface is selected by setting the BOOT_COM_UART_ENABLE
|
||||||
|
* configurable to 1. Configurable BOOT_COM_UART_BAUDRATE selects the communication speed
|
||||||
|
* in bits/second. The maximum amount of data bytes in a message for data transmission
|
||||||
|
* and reception is set through BOOT_COM_UART_TX_MAX_DATA and BOOT_COM_UART_RX_MAX_DATA,
|
||||||
|
* respectively. It is common for a microcontroller to have more than 1 UART interface
|
||||||
|
* on board. The zero-based BOOT_COM_UART_CHANNEL_INDEX selects the UART interface.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#define BOOT_COM_UART_ENABLE (1)
|
||||||
|
#define BOOT_COM_UART_BAUDRATE (57600)
|
||||||
|
#define BOOT_COM_UART_TX_MAX_DATA (64)
|
||||||
|
#define BOOT_COM_UART_RX_MAX_DATA (64)
|
||||||
|
#define BOOT_COM_UART_CHANNEL_INDEX (1)
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* B A C K D O O R E N T R Y C O N F I G U R A T I O N
|
||||||
|
****************************************************************************************/
|
||||||
|
/* It is possible to implement an application specific method to force the bootloader to
|
||||||
|
* stay active after a reset. Such a backdoor entry into the bootloader is desired in
|
||||||
|
* situations where the user program does not run properly and therefore cannot
|
||||||
|
* reactivate the bootloader. By enabling these hook functions, the application can
|
||||||
|
* implement the backdoor, which overrides the default backdoor entry that is programmed
|
||||||
|
* into the bootloader. When desired for security purposes, these hook functions can
|
||||||
|
* also be implemented in a way that disables the backdoor entry altogether.
|
||||||
|
*/
|
||||||
|
#define BOOT_BACKDOOR_HOOKS_ENABLE (0)
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* N O N - V O L A T I L E M E M O R Y D R I V E R C O N F I G U R A T I O N
|
||||||
|
****************************************************************************************/
|
||||||
|
/* The NVM driver typically supports erase and program operations of the internal memory
|
||||||
|
* present on the microcontroller. Through these hook functions the NVM driver can be
|
||||||
|
* extended to support additional memory types such as external flash memory and serial
|
||||||
|
* eeproms. The size of the internal memory in kilobytes is specified with configurable
|
||||||
|
* BOOT_NVM_SIZE_KB.
|
||||||
|
*/
|
||||||
|
#define BOOT_NVM_HOOKS_ENABLE (0)
|
||||||
|
#define BOOT_NVM_SIZE_KB (128)
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* W A T C H D O G D R I V E R C O N F I G U R A T I O N
|
||||||
|
****************************************************************************************/
|
||||||
|
/* The COP driver cannot be configured internally in the bootloader, because its use
|
||||||
|
* and configuration is application specific. The bootloader does need to service the
|
||||||
|
* watchdog in case it is used. When the application requires the use of a watchdog,
|
||||||
|
* set BOOT_COP_HOOKS_ENABLE to be able to initialize and service the watchdog through
|
||||||
|
* hook functions.
|
||||||
|
*/
|
||||||
|
#define BOOT_COP_HOOKS_ENABLE (0)
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* CONFIG_H */
|
||||||
|
/*********************************** end of config.h ***********************************/
|
|
@ -0,0 +1,186 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: bootloader callback source file
|
||||||
|
| File Name: hooks.c
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "boot.h" /* bootloader generic header */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* B A C K D O O R E N T R Y H O O K F U N C T I O N S
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
#if (BOOT_BACKDOOR_HOOKS_ENABLE > 0)
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BackDoorInitHook
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Initializes the backdoor entry option.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void BackDoorInitHook(void)
|
||||||
|
{
|
||||||
|
/* configure the button connected to P0.16 as a digital input */
|
||||||
|
IO0DIR &= ~(1<<16);
|
||||||
|
} /*** end of BackDoorInitHook ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BackDoorEntryHook
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: BLT_TRUE if the backdoor entry is requested, BLT_FALSE otherwise.
|
||||||
|
** DESCRIPTION: Checks if a backdoor entry is requested.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
blt_bool BackDoorEntryHook(void)
|
||||||
|
{
|
||||||
|
/* button P0.16 has a pullup, so will read high by default. enter backdoor only when
|
||||||
|
* this button is pressed. this is the case when it reads low */
|
||||||
|
if ((IO0PIN & (1<<16)) == 0)
|
||||||
|
{
|
||||||
|
return BLT_TRUE;
|
||||||
|
}
|
||||||
|
return BLT_FALSE;
|
||||||
|
} /*** end of BackDoorEntryHook ***/
|
||||||
|
#endif /* BOOT_BACKDOOR_HOOKS_ENABLE > 0 */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* N O N - V O L A T I L E M E M O R Y D R I V E R H O O K F U N C T I O N S
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
#if (BOOT_NVM_HOOKS_ENABLE > 0)
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: NvmInitHook
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Callback that gets called at the start of the internal NVM driver
|
||||||
|
** initialization routine.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void NvmInitHook(void)
|
||||||
|
{
|
||||||
|
} /*** end of NvmInitHook ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: NvmWriteHook
|
||||||
|
** PARAMETER: addr start address
|
||||||
|
** len length in bytes
|
||||||
|
** data pointer to the data buffer.
|
||||||
|
** RETURN VALUE: BTL_NVM_OKAY if successful, BTL_NVM_NOT_IN_RANGE if the address is
|
||||||
|
** not within the supported memory range, or BTL_NVM_ERROR is the write
|
||||||
|
** operation failed.
|
||||||
|
** DESCRIPTION: Callback that gets called at the start of the NVM driver write
|
||||||
|
** routine. It allows additional memory to be operated on. If the address
|
||||||
|
** is not within the range of the additional memory, then
|
||||||
|
** BTL_NVM_NOT_IN_RANGE must be returned to indicate that the data hasn't
|
||||||
|
** been written yet.
|
||||||
|
**
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
blt_int8u NvmWriteHook(blt_addr addr, blt_int32u len, blt_int8u *data)
|
||||||
|
{
|
||||||
|
return BTL_NVM_NOT_IN_RANGE;
|
||||||
|
} /*** end of NvmWriteHook ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: NvmEraseHook
|
||||||
|
** PARAMETER: addr start address
|
||||||
|
** len length in bytes
|
||||||
|
** RETURN VALUE: BTL_NVM_OKAY if successful, BTL_NVM_NOT_IN_RANGE if the address is
|
||||||
|
** not within the supported memory range, or BTL_NVM_ERROR is the erase
|
||||||
|
** operation failed.
|
||||||
|
** DESCRIPTION: Callback that gets called at the start of the NVM driver erase
|
||||||
|
** routine. It allows additional memory to be operated on. If the address
|
||||||
|
** is not within the range of the additional memory, then
|
||||||
|
** BTL_NVM_NOT_IN_RANGE must be returned to indicate that the memory
|
||||||
|
** hasn't been erased yet.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
blt_bool NvmEraseHook(blt_addr addr, blt_int32u len)
|
||||||
|
{
|
||||||
|
return BTL_NVM_NOT_IN_RANGE;
|
||||||
|
} /*** end of NvmEraseHook ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: NvmDoneHook
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: BLT_TRUE is successful, BLT_FALSE otherwise.
|
||||||
|
** DESCRIPTION: Callback that gets called at the end of the NVM programming session.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
blt_bool NvmDoneHook(void)
|
||||||
|
{
|
||||||
|
return BLT_TRUE;
|
||||||
|
} /*** end of NvmDoneHook ***/
|
||||||
|
#endif /* BOOT_NVM_HOOKS_ENABLE > 0 */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* W A T C H D O G D R I V E R H O O K F U N C T I O N S
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
#if (BOOT_COP_HOOKS_ENABLE > 0)
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: CopInitHook
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Callback that gets called at the end of the internal COP driver
|
||||||
|
** initialization routine. It can be used to configure and enable the
|
||||||
|
** watchdog.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void CopInitHook(void)
|
||||||
|
{
|
||||||
|
} /*** end of CopInitHook ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: CopServiceHook
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Callback that gets called at the end of the internal COP driver
|
||||||
|
** service routine. This gets called upon initialization and during
|
||||||
|
** potential long lasting loops and routine. It can be used to service
|
||||||
|
** the watchdog to prevent a watchdog reset.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void CopServiceHook(void)
|
||||||
|
{
|
||||||
|
} /*** end of CopServiceHook ***/
|
||||||
|
#endif /* BOOT_COP_HOOKS_ENABLE > 0 */
|
||||||
|
|
||||||
|
|
||||||
|
/*********************************** end of hooks.c ************************************/
|
|
@ -0,0 +1,144 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8"?>
|
||||||
|
<CodeLite_Project Name="DemoBoot" InternalType="">
|
||||||
|
<Plugins>
|
||||||
|
<Plugin Name="qmake">
|
||||||
|
<![CDATA[00010001N0005Debug000000000000]]>
|
||||||
|
</Plugin>
|
||||||
|
</Plugins>
|
||||||
|
<VirtualDirectory Name="Source">
|
||||||
|
<VirtualDirectory Name="ARMCM3_STM32">
|
||||||
|
<VirtualDirectory Name="GCC">
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/GCC/cstart.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/GCC/vectors.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/GCC/memory.x"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/can.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/can.h"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/cpu.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/cpu.h"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/flash.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/flash.h"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/nvm.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/nvm.h"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/timer.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/timer.h"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/types.h"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/uart.c"/>
|
||||||
|
<File Name="../../../../Source/ARMCM3_STM32/uart.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<File Name="../../../../Source/assert.c"/>
|
||||||
|
<File Name="../../../../Source/assert.h"/>
|
||||||
|
<File Name="../../../../Source/backdoor.c"/>
|
||||||
|
<File Name="../../../../Source/backdoor.h"/>
|
||||||
|
<File Name="../../../../Source/boot.c"/>
|
||||||
|
<File Name="../../../../Source/boot.h"/>
|
||||||
|
<File Name="../../../../Source/com.c"/>
|
||||||
|
<File Name="../../../../Source/com.h"/>
|
||||||
|
<File Name="../../../../Source/cop.c"/>
|
||||||
|
<File Name="../../../../Source/cop.h"/>
|
||||||
|
<File Name="../../../../Source/plausibility.h"/>
|
||||||
|
<File Name="../../../../Source/xcp.c"/>
|
||||||
|
<File Name="../../../../Source/xcp.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<VirtualDirectory Name="Demo">
|
||||||
|
<VirtualDirectory Name="ARMCM3_STM32_Olimex_STM32P103_GCC">
|
||||||
|
<VirtualDirectory Name="Boot">
|
||||||
|
<VirtualDirectory Name="lib">
|
||||||
|
<VirtualDirectory Name="CMSIS">
|
||||||
|
<VirtualDirectory Name="CM3">
|
||||||
|
<VirtualDirectory Name="DeviceSupport">
|
||||||
|
<VirtualDirectory Name="ST">
|
||||||
|
<VirtualDirectory Name="STM32F10x">
|
||||||
|
<File Name="../lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h"/>
|
||||||
|
<File Name="../lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c"/>
|
||||||
|
<File Name="../lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<VirtualDirectory Name="CoreSupport">
|
||||||
|
<File Name="../lib/CMSIS/CM3/CoreSupport/core_cm3.c"/>
|
||||||
|
<File Name="../lib/CMSIS/CM3/CoreSupport/core_cm3.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<File Name="../config.h"/>
|
||||||
|
<File Name="../hooks.c"/>
|
||||||
|
<File Name="../main.c"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<Description/>
|
||||||
|
<Dependencies/>
|
||||||
|
<Settings Type="Dynamic Library">
|
||||||
|
<GlobalSettings>
|
||||||
|
<Compiler Options="" C_Options="">
|
||||||
|
<IncludePath Value="."/>
|
||||||
|
</Compiler>
|
||||||
|
<Linker Options="">
|
||||||
|
<LibraryPath Value="."/>
|
||||||
|
</Linker>
|
||||||
|
<ResourceCompiler Options=""/>
|
||||||
|
</GlobalSettings>
|
||||||
|
<Configuration Name="Debug" CompilerType="gnu gcc" DebuggerType="GNU gdb debugger" Type="Dynamic Library" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
|
||||||
|
<Compiler Options="-g" C_Options="-g" Required="yes" PreCompiledHeader="">
|
||||||
|
<IncludePath Value="."/>
|
||||||
|
</Compiler>
|
||||||
|
<Linker Options="" Required="yes"/>
|
||||||
|
<ResourceCompiler Options="" Required="no"/>
|
||||||
|
<General OutputFile="" IntermediateDirectory="../obj" Command="openbtl_olimex_lpc_l2294_20mhz.elf" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(WorkspacePath)/../bin" PauseExecWhenProcTerminates="yes"/>
|
||||||
|
<Environment EnvVarSetName="<Use Defaults>" DbgSetName="<Use Defaults>"/>
|
||||||
|
<Debugger IsRemote="yes" RemoteHostName="localhost" RemoteHostPort="3333" DebuggerPath="C:\Program Files (x86)\CodeSourcery\Sourcery G++ Lite\bin\arm-none-eabi-gdb.exe">
|
||||||
|
<PostConnectCommands/>
|
||||||
|
<StartupCommands>break main
|
||||||
|
continue
|
||||||
|
</StartupCommands>
|
||||||
|
</Debugger>
|
||||||
|
<PreBuild/>
|
||||||
|
<PostBuild/>
|
||||||
|
<CustomBuild Enabled="yes">
|
||||||
|
<RebuildCommand/>
|
||||||
|
<CleanCommand>make clean</CleanCommand>
|
||||||
|
<BuildCommand>make</BuildCommand>
|
||||||
|
<PreprocessFileCommand/>
|
||||||
|
<SingleFileCommand/>
|
||||||
|
<MakefileGenerationCommand/>
|
||||||
|
<ThirdPartyToolName>None</ThirdPartyToolName>
|
||||||
|
<WorkingDirectory>$(WorkspacePath)/..</WorkingDirectory>
|
||||||
|
</CustomBuild>
|
||||||
|
<AdditionalRules>
|
||||||
|
<CustomPostBuild/>
|
||||||
|
<CustomPreBuild/>
|
||||||
|
</AdditionalRules>
|
||||||
|
</Configuration>
|
||||||
|
<Configuration Name="Release" CompilerType="gnu gcc" DebuggerType="GNU gdb debugger" Type="Dynamic Library" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
|
||||||
|
<Compiler Options="" C_Options="" Required="yes" PreCompiledHeader="">
|
||||||
|
<IncludePath Value="."/>
|
||||||
|
</Compiler>
|
||||||
|
<Linker Options="-O2" Required="yes"/>
|
||||||
|
<ResourceCompiler Options="" Required="no"/>
|
||||||
|
<General OutputFile="" IntermediateDirectory="./Release" Command="" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(IntermediateDirectory)" PauseExecWhenProcTerminates="yes"/>
|
||||||
|
<Environment EnvVarSetName="<Use Defaults>" DbgSetName="<Use Defaults>"/>
|
||||||
|
<Debugger IsRemote="no" RemoteHostName="" RemoteHostPort="" DebuggerPath="">
|
||||||
|
<PostConnectCommands/>
|
||||||
|
<StartupCommands/>
|
||||||
|
</Debugger>
|
||||||
|
<PreBuild/>
|
||||||
|
<PostBuild/>
|
||||||
|
<CustomBuild Enabled="yes">
|
||||||
|
<RebuildCommand/>
|
||||||
|
<CleanCommand>make clean</CleanCommand>
|
||||||
|
<BuildCommand>make</BuildCommand>
|
||||||
|
<PreprocessFileCommand/>
|
||||||
|
<SingleFileCommand/>
|
||||||
|
<MakefileGenerationCommand/>
|
||||||
|
<ThirdPartyToolName>None</ThirdPartyToolName>
|
||||||
|
<WorkingDirectory>$(WorkspacePath)</WorkingDirectory>
|
||||||
|
</CustomBuild>
|
||||||
|
<AdditionalRules>
|
||||||
|
<CustomPostBuild/>
|
||||||
|
<CustomPreBuild/>
|
||||||
|
</AdditionalRules>
|
||||||
|
</Configuration>
|
||||||
|
</Settings>
|
||||||
|
</CodeLite_Project>
|
|
@ -0,0 +1,12 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8"?>
|
||||||
|
<CodeLite_Workspace Name="DemoBoot" Database="./DemoBoot.tags">
|
||||||
|
<Project Name="DemoBoot" Path="DemoBoot.project" Active="Yes"/>
|
||||||
|
<BuildMatrix>
|
||||||
|
<WorkspaceConfiguration Name="Debug" Selected="yes">
|
||||||
|
<Project Name="DemoBoot" ConfigName="Debug"/>
|
||||||
|
</WorkspaceConfiguration>
|
||||||
|
<WorkspaceConfiguration Name="Release" Selected="yes">
|
||||||
|
<Project Name="DemoBoot" ConfigName="Release"/>
|
||||||
|
</WorkspaceConfiguration>
|
||||||
|
</BuildMatrix>
|
||||||
|
</CodeLite_Workspace>
|
|
@ -0,0 +1,4 @@
|
||||||
|
Integrated Development Environment
|
||||||
|
----------------------------------
|
||||||
|
Codelite was used as the editor during the development of this software program. This directory contains the Codelite
|
||||||
|
workspace and project files. Codelite is a cross platform open source C/C++ IDE, available at http://www.codelite.org/.
|
|
@ -0,0 +1,784 @@
|
||||||
|
/**************************************************************************//**
|
||||||
|
* @file core_cm3.c
|
||||||
|
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
|
||||||
|
* @version V1.30
|
||||||
|
* @date 30. October 2009
|
||||||
|
*
|
||||||
|
* @note
|
||||||
|
* Copyright (C) 2009 ARM Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||||
|
* processor based microcontrollers. This file can be freely distributed
|
||||||
|
* within development tools that are supporting such ARM based processors.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||||
|
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
|
||||||
|
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
*
|
||||||
|
******************************************************************************/
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
/* define compiler specific symbols */
|
||||||
|
#if defined ( __CC_ARM )
|
||||||
|
#define __ASM __asm /*!< asm keyword for ARM Compiler */
|
||||||
|
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
|
||||||
|
|
||||||
|
#elif defined ( __ICCARM__ )
|
||||||
|
#define __ASM __asm /*!< asm keyword for IAR Compiler */
|
||||||
|
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
|
||||||
|
|
||||||
|
#elif defined ( __GNUC__ )
|
||||||
|
#define __ASM __asm /*!< asm keyword for GNU Compiler */
|
||||||
|
#define __INLINE inline /*!< inline keyword for GNU Compiler */
|
||||||
|
|
||||||
|
#elif defined ( __TASKING__ )
|
||||||
|
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
|
||||||
|
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/* ################### Compiler specific Intrinsics ########################### */
|
||||||
|
|
||||||
|
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
|
||||||
|
/* ARM armcc specific functions */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @return ProcessStackPointer
|
||||||
|
*
|
||||||
|
* Return the actual process stack pointer
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
mrs r0, psp
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfProcStack Process Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value ProcessStackPointer to the MSP
|
||||||
|
* (process stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
__ASM void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
msr psp, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @return Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Return the current value of the MSP (main stack pointer)
|
||||||
|
* Cortex processor register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
mrs r0, msp
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfMainStack Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value mainStackPointer to the MSP
|
||||||
|
* (main stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
__ASM void __set_MSP(uint32_t mainStackPointer)
|
||||||
|
{
|
||||||
|
msr msp, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in unsigned short value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in unsigned short value
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __REV16(uint16_t value)
|
||||||
|
{
|
||||||
|
rev16 r0, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*/
|
||||||
|
__ASM int32_t __REVSH(int16_t value)
|
||||||
|
{
|
||||||
|
revsh r0, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#if (__ARMCC_VERSION < 400000)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Remove the exclusive lock created by ldrex
|
||||||
|
*
|
||||||
|
* Removes the exclusive lock which is created by ldrex.
|
||||||
|
*/
|
||||||
|
__ASM void __CLREX(void)
|
||||||
|
{
|
||||||
|
clrex
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Base Priority value
|
||||||
|
*
|
||||||
|
* @return BasePriority
|
||||||
|
*
|
||||||
|
* Return the content of the base priority register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_BASEPRI(void)
|
||||||
|
{
|
||||||
|
mrs r0, basepri
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Base Priority value
|
||||||
|
*
|
||||||
|
* @param basePri BasePriority
|
||||||
|
*
|
||||||
|
* Set the base priority register
|
||||||
|
*/
|
||||||
|
__ASM void __set_BASEPRI(uint32_t basePri)
|
||||||
|
{
|
||||||
|
msr basepri, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Priority Mask value
|
||||||
|
*
|
||||||
|
* @return PriMask
|
||||||
|
*
|
||||||
|
* Return state of the priority mask bit from the priority mask register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_PRIMASK(void)
|
||||||
|
{
|
||||||
|
mrs r0, primask
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Priority Mask value
|
||||||
|
*
|
||||||
|
* @param priMask PriMask
|
||||||
|
*
|
||||||
|
* Set the priority mask bit in the priority mask register
|
||||||
|
*/
|
||||||
|
__ASM void __set_PRIMASK(uint32_t priMask)
|
||||||
|
{
|
||||||
|
msr primask, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Fault Mask value
|
||||||
|
*
|
||||||
|
* @return FaultMask
|
||||||
|
*
|
||||||
|
* Return the content of the fault mask register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_FAULTMASK(void)
|
||||||
|
{
|
||||||
|
mrs r0, faultmask
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Fault Mask value
|
||||||
|
*
|
||||||
|
* @param faultMask faultMask value
|
||||||
|
*
|
||||||
|
* Set the fault mask register
|
||||||
|
*/
|
||||||
|
__ASM void __set_FAULTMASK(uint32_t faultMask)
|
||||||
|
{
|
||||||
|
msr faultmask, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Control Register value
|
||||||
|
*
|
||||||
|
* @return Control value
|
||||||
|
*
|
||||||
|
* Return the content of the control register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_CONTROL(void)
|
||||||
|
{
|
||||||
|
mrs r0, control
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Control Register value
|
||||||
|
*
|
||||||
|
* @param control Control value
|
||||||
|
*
|
||||||
|
* Set the control register
|
||||||
|
*/
|
||||||
|
__ASM void __set_CONTROL(uint32_t control)
|
||||||
|
{
|
||||||
|
msr control, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* __ARMCC_VERSION */
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
|
||||||
|
/* IAR iccarm specific functions */
|
||||||
|
#pragma diag_suppress=Pe940
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @return ProcessStackPointer
|
||||||
|
*
|
||||||
|
* Return the actual process stack pointer
|
||||||
|
*/
|
||||||
|
uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
__ASM("mrs r0, psp");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfProcStack Process Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value ProcessStackPointer to the MSP
|
||||||
|
* (process stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
__ASM("msr psp, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @return Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Return the current value of the MSP (main stack pointer)
|
||||||
|
* Cortex processor register
|
||||||
|
*/
|
||||||
|
uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
__ASM("mrs r0, msp");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfMainStack Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value mainStackPointer to the MSP
|
||||||
|
* (main stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_MSP(uint32_t topOfMainStack)
|
||||||
|
{
|
||||||
|
__ASM("msr msp, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in unsigned short value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in unsigned short value
|
||||||
|
*/
|
||||||
|
uint32_t __REV16(uint16_t value)
|
||||||
|
{
|
||||||
|
__ASM("rev16 r0, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse bit order of value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse bit order of value
|
||||||
|
*/
|
||||||
|
uint32_t __RBIT(uint32_t value)
|
||||||
|
{
|
||||||
|
__ASM("rbit r0, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 8 bit values)
|
||||||
|
*/
|
||||||
|
uint8_t __LDREXB(uint8_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("ldrexb r0, [r0]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint16_t __LDREXH(uint16_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("ldrexh r0, [r0]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __LDREXW(uint32_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("ldrex r0, [r0]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 8 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXB(uint8_t value, uint8_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("strexb r0, r0, [r1]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXH(uint16_t value, uint16_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("strexh r0, r0, [r1]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXW(uint32_t value, uint32_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("strex r0, r0, [r1]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
#pragma diag_default=Pe940
|
||||||
|
|
||||||
|
|
||||||
|
#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
|
||||||
|
/* GNU gcc specific functions */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @return ProcessStackPointer
|
||||||
|
*
|
||||||
|
* Return the actual process stack pointer
|
||||||
|
*/
|
||||||
|
uint32_t __get_PSP(void) __attribute__( ( naked ) );
|
||||||
|
uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, psp\n\t"
|
||||||
|
"MOV r0, %0 \n\t"
|
||||||
|
"BX lr \n\t" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfProcStack Process Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value ProcessStackPointer to the MSP
|
||||||
|
* (process stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
|
||||||
|
void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR psp, %0\n\t"
|
||||||
|
"BX lr \n\t" : : "r" (topOfProcStack) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @return Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Return the current value of the MSP (main stack pointer)
|
||||||
|
* Cortex processor register
|
||||||
|
*/
|
||||||
|
uint32_t __get_MSP(void) __attribute__( ( naked ) );
|
||||||
|
uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, msp\n\t"
|
||||||
|
"MOV r0, %0 \n\t"
|
||||||
|
"BX lr \n\t" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfMainStack Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value mainStackPointer to the MSP
|
||||||
|
* (main stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
|
||||||
|
void __set_MSP(uint32_t topOfMainStack)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR msp, %0\n\t"
|
||||||
|
"BX lr \n\t" : : "r" (topOfMainStack) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Base Priority value
|
||||||
|
*
|
||||||
|
* @return BasePriority
|
||||||
|
*
|
||||||
|
* Return the content of the base priority register
|
||||||
|
*/
|
||||||
|
uint32_t __get_BASEPRI(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Base Priority value
|
||||||
|
*
|
||||||
|
* @param basePri BasePriority
|
||||||
|
*
|
||||||
|
* Set the base priority register
|
||||||
|
*/
|
||||||
|
void __set_BASEPRI(uint32_t value)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR basepri, %0" : : "r" (value) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Priority Mask value
|
||||||
|
*
|
||||||
|
* @return PriMask
|
||||||
|
*
|
||||||
|
* Return state of the priority mask bit from the priority mask register
|
||||||
|
*/
|
||||||
|
uint32_t __get_PRIMASK(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, primask" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Priority Mask value
|
||||||
|
*
|
||||||
|
* @param priMask PriMask
|
||||||
|
*
|
||||||
|
* Set the priority mask bit in the priority mask register
|
||||||
|
*/
|
||||||
|
void __set_PRIMASK(uint32_t priMask)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Fault Mask value
|
||||||
|
*
|
||||||
|
* @return FaultMask
|
||||||
|
*
|
||||||
|
* Return the content of the fault mask register
|
||||||
|
*/
|
||||||
|
uint32_t __get_FAULTMASK(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Fault Mask value
|
||||||
|
*
|
||||||
|
* @param faultMask faultMask value
|
||||||
|
*
|
||||||
|
* Set the fault mask register
|
||||||
|
*/
|
||||||
|
void __set_FAULTMASK(uint32_t faultMask)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Control Register value
|
||||||
|
*
|
||||||
|
* @return Control value
|
||||||
|
*
|
||||||
|
* Return the content of the control register
|
||||||
|
*/
|
||||||
|
uint32_t __get_CONTROL(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, control" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Control Register value
|
||||||
|
*
|
||||||
|
* @param control Control value
|
||||||
|
*
|
||||||
|
* Set the control register
|
||||||
|
*/
|
||||||
|
void __set_CONTROL(uint32_t control)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR control, %0" : : "r" (control) );
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in integer value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in integer value
|
||||||
|
*/
|
||||||
|
uint32_t __REV(uint32_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in unsigned short value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in unsigned short value
|
||||||
|
*/
|
||||||
|
uint32_t __REV16(uint16_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*/
|
||||||
|
int32_t __REVSH(int16_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse bit order of value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse bit order of value
|
||||||
|
*/
|
||||||
|
uint32_t __RBIT(uint32_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 8 bit value
|
||||||
|
*/
|
||||||
|
uint8_t __LDREXB(uint8_t *addr)
|
||||||
|
{
|
||||||
|
uint8_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint16_t __LDREXH(uint16_t *addr)
|
||||||
|
{
|
||||||
|
uint16_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __LDREXW(uint32_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 8 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXB(uint8_t value, uint8_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXH(uint16_t value, uint16_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXW(uint32_t value, uint32_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
|
||||||
|
/* TASKING carm specific functions */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||||
|
* Please use "carm -?i" to get an up to date list of all instrinsics,
|
||||||
|
* Including the CMSIS ones.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,284 @@
|
||||||
|
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||||
|
<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||||
|
<link rel="File-List" href="Library_files/filelist.xml">
|
||||||
|
<link rel="Edit-Time-Data" href="Library_files/editdata.mso"><!--[if !mso]> <style> v\:* {behavior:url(#default#VML);} o\:* {behavior:url(#default#VML);} w\:* {behavior:url(#default#VML);} .shape {behavior:url(#default#VML);} </style> <![endif]--><title>Release Notes for STM32F10x CMSIS</title><!--[if gte mso 9]><xml> <o:DocumentProperties> <o:Author>STMicroelectronics</o:Author> <o:LastAuthor>STMicroelectronics</o:LastAuthor> <o:Revision>37</o:Revision> <o:TotalTime>136</o:TotalTime> <o:Created>2009-02-27T19:26:00Z</o:Created> <o:LastSaved>2009-03-01T17:56:00Z</o:LastSaved> <o:Pages>1</o:Pages> <o:Words>522</o:Words> <o:Characters>2977</o:Characters> <o:Company>STMicroelectronics</o:Company> <o:Lines>24</o:Lines> <o:Paragraphs>6</o:Paragraphs> <o:CharactersWithSpaces>3493</o:CharactersWithSpaces> <o:Version>11.6568</o:Version> </o:DocumentProperties> </xml><![endif]--><!--[if gte mso 9]><xml> <w:WordDocument> <w:Zoom>110</w:Zoom> <w:ValidateAgainstSchemas/> <w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid> <w:IgnoreMixedContent>false</w:IgnoreMixedContent> <w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText> <w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel> </w:WordDocument> </xml><![endif]--><!--[if gte mso 9]><xml> <w:LatentStyles DefLockedState="false" LatentStyleCount="156"> </w:LatentStyles> </xml><![endif]-->
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
<style>
|
||||||
|
<!--
|
||||||
|
/* Style Definitions */
|
||||||
|
p.MsoNormal, li.MsoNormal, div.MsoNormal
|
||||||
|
{mso-style-parent:"";
|
||||||
|
margin:0in;
|
||||||
|
margin-bottom:.0001pt;
|
||||||
|
mso-pagination:widow-orphan;
|
||||||
|
font-size:12.0pt;
|
||||||
|
font-family:"Times New Roman";
|
||||||
|
mso-fareast-font-family:"Times New Roman";}
|
||||||
|
h2
|
||||||
|
{mso-style-next:Normal;
|
||||||
|
margin-top:12.0pt;
|
||||||
|
margin-right:0in;
|
||||||
|
margin-bottom:3.0pt;
|
||||||
|
margin-left:0in;
|
||||||
|
mso-pagination:widow-orphan;
|
||||||
|
page-break-after:avoid;
|
||||||
|
mso-outline-level:2;
|
||||||
|
font-size:14.0pt;
|
||||||
|
font-family:Arial;
|
||||||
|
font-weight:bold;
|
||||||
|
font-style:italic;}
|
||||||
|
a:link, span.MsoHyperlink
|
||||||
|
{color:blue;
|
||||||
|
text-decoration:underline;
|
||||||
|
text-underline:single;}
|
||||||
|
a:visited, span.MsoHyperlinkFollowed
|
||||||
|
{color:blue;
|
||||||
|
text-decoration:underline;
|
||||||
|
text-underline:single;}
|
||||||
|
p
|
||||||
|
{mso-margin-top-alt:auto;
|
||||||
|
margin-right:0in;
|
||||||
|
mso-margin-bottom-alt:auto;
|
||||||
|
margin-left:0in;
|
||||||
|
mso-pagination:widow-orphan;
|
||||||
|
font-size:12.0pt;
|
||||||
|
font-family:"Times New Roman";
|
||||||
|
mso-fareast-font-family:"Times New Roman";}
|
||||||
|
@page Section1
|
||||||
|
{size:8.5in 11.0in;
|
||||||
|
margin:1.0in 1.25in 1.0in 1.25in;
|
||||||
|
mso-header-margin:.5in;
|
||||||
|
mso-footer-margin:.5in;
|
||||||
|
mso-paper-source:0;}
|
||||||
|
div.Section1
|
||||||
|
{page:Section1;}
|
||||||
|
-->
|
||||||
|
</style><!--[if gte mso 10]> <style> /* Style Definitions */ table.MsoNormalTable {mso-style-name:"Table Normal"; mso-tstyle-rowband-size:0; mso-tstyle-colband-size:0; mso-style-noshow:yes; mso-style-parent:""; mso-padding-alt:0in 5.4pt 0in 5.4pt; mso-para-margin:0in; mso-para-margin-bottom:.0001pt; mso-pagination:widow-orphan; font-size:10.0pt; font-family:"Times New Roman"; mso-ansi-language:#0400; mso-fareast-language:#0400; mso-bidi-language:#0400;} </style> <![endif]--><!--[if gte mso 9]><xml> <o:shapedefaults v:ext="edit" spidmax="5122"/> </xml><![endif]--><!--[if gte mso 9]><xml> <o:shapelayout v:ext="edit"> <o:idmap v:ext="edit" data="1"/> </o:shapelayout></xml><![endif]--></head>
|
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|
<body lang="EN-US" link="blue" vlink="blue">
|
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<div class="Section1">
|
||||||
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<p class="MsoNormal"><span style="font-family: Arial;"><o:p><br>
|
||||||
|
</o:p></span></p>
|
||||||
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<div align="center">
|
||||||
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<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
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<tbody>
|
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<tr style="">
|
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<td style="padding: 0cm;" valign="top">
|
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<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
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<tbody>
|
||||||
|
<tr>
|
||||||
|
<td style="vertical-align: top;"><span style="font-size: 8pt; font-family: Arial; color: blue;"><a href="../../../../../../Release_Notes.html">Back to Release page</a></span></td>
|
||||||
|
</tr>
|
||||||
|
<tr style="">
|
||||||
|
<td style="padding: 1.5pt;">
|
||||||
|
<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
|
||||||
|
Notes for STM32F10x CMSIS</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
|
||||||
|
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright 2011 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||||
|
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;"><img alt="" id="_x0000_i1025" src="../../../../../../_htmresc/logo.bmp" style="border: 0px solid ; width: 86px; height: 65px;"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||||
|
</td>
|
||||||
|
</tr>
|
||||||
|
</tbody>
|
||||||
|
</table>
|
||||||
|
<p class="MsoNormal"><span style="font-family: Arial; display: none;"><o:p> </o:p></span></p>
|
||||||
|
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" width="900">
|
||||||
|
<tbody>
|
||||||
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<tr>
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<td style="padding: 0cm;" valign="top">
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||||||
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<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
|
||||||
|
<ol style="margin-top: 0cm;" start="1" type="1">
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32F10x CMSIS
|
||||||
|
update History</a><o:p></o:p></span></li>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
|
||||||
|
</ol>
|
||||||
|
<span style="font-family: "Times New Roman";"></span>
|
||||||
|
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F10x CMSIS
|
||||||
|
update History</span></h2><br>
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V3.5.0 / 11-March-2011<o:p></o:p></span></h3>
|
||||||
|
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||||
|
Changes<o:p></o:p></span></u></b></p>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0cm;" type="square">
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32f10x.h
|
||||||
|
</span>and <span style="font-style: italic;">startup_stm32f10x_hd_vl.s</span> files: remove the FSMC interrupt
|
||||||
|
definition for STM32F10x High-density Value line devices.<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">system_stm32f10x.c</span> file provided within the CMSIS folder. <br>
|
||||||
|
</span></li>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.4.0
|
||||||
|
- 10/15/2010</span></h3>
|
||||||
|
|
||||||
|
<ol>
|
||||||
|
<li><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b></li>
|
||||||
|
</ol>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||||
|
for <b>STM32F10x High-density Value line devices</b>.</span></li>
|
||||||
|
</ul>
|
||||||
|
<ol start="2">
|
||||||
|
<li><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x CMSIS Device Peripheral Access Layer </span></i></b></li>
|
||||||
|
</ol>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File:</span> <span style="font-weight: bold; font-style: italic;">stm32f10x.h</span></span><br>
|
||||||
|
</li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Update to support High-density Value line devices</span><span style="font-size: 10pt; font-family: Verdana;"></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new define <span style="font-style: italic;">STM32F10X_HD_VL</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">RCC, AFIO, FSMC bits definition updated</span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style="">
|
||||||
|
|
||||||
|
<span style="font-size: 10pt; font-family: "Verdana","sans-serif";">All
|
||||||
|
STM32 devices definitions are commented by default. User has to select the
|
||||||
|
appropriate device before starting else an error will be signaled on compile
|
||||||
|
time.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: "Verdana","sans-serif";">Add new IRQs definitons inside the IRQn_Type enumeration for STM23 High-density Value line devices.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: "Verdana","sans-serif";">"<span style="font-weight: bold;">bool</span>" type removed.</span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: "Verdana","sans-serif";"></span></li>
|
||||||
|
</ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files:</span> <span style="font-weight: bold; font-style: italic;">system_stm32f10x.h and system_stm32f10x.c</span></span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"></span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;">"system_stm32f10x.c" </span><span style="font-weight: bold;"></span>moved to to "<span style="font-weight: bold; font-style: italic;">STM32F10x_StdPeriph_Template</span>" directory. This file is also moved to each example directory under "<span style="font-weight: bold; font-style: italic;">STM32F10x_StdPeriph_Examples</span>".</span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"></span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SystemInit_ExtMemCtl() </span>function: update to support High-density Value line devices.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add "<span style="font-style: italic;">VECT_TAB_SRAM</span>" inside "</span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;">system_stm32f10x.c</span></span><span style="font-size: 10pt; font-family: Verdana;">"
|
||||||
|
to select if the user want to place the Vector Table in internal SRAM.
|
||||||
|
An additional define is also to specify the Vector Table offset "<span style="font-style: italic;">VECT_TAB_OFFSET</span>".<br>
|
||||||
|
</span></li>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS startup files:</span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;">startup_stm32f10x_xx.s</span></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add three
|
||||||
|
startup files for STM32 High-density Value line devices:
|
||||||
|
<span style="font-weight: bold; font-style: italic;">startup_stm32f10x_hd_vl.s</span></span></li></ul>
|
||||||
|
</ul>
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.3.0
|
||||||
|
- 04/16/2010</span></h3>
|
||||||
|
|
||||||
|
<ol><li><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b></li></ol>
|
||||||
|
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||||
|
for <b>STM32F10x XL-density devices</b>.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add startup files for TrueSTUDIO toolchain<br></span></li></ul><ol start="2"><li><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x CMSIS Device Peripheral Access Layer </span></i></b></li></ol>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File:</span> <span style="font-weight: bold; font-style: italic;">stm32f10x.h</span></span><br>
|
||||||
|
</li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Update to support XL-density devices</span><span style="font-size: 10pt; font-family: Verdana;"></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new define <span style="font-style: italic;">STM32F10X_XL</span></span></li></ul><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new IRQs for </span><span style="font-size: 10pt; font-family: Verdana;">TIM9..14</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Update FLASH_TypeDef structure</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new IP instances TIM9..14</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">RCC, AFIO, DBGMCU bits definition updated</span></li></ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Correct IRQs definition for MD-, LD-, MD_VL- and LD_VL-density devices (remove comma "," at the end of enum list)<br></span></li></ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files:</span> <span style="font-weight: bold; font-style: italic;">system_stm32f10x.h and system_stm32f10x.c</span></span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SystemInit_ExtMemCtl() </span>function: update to support XL-density devices</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SystemInit()</span> function: swap the order of SetSysClock() and SystemInit_ExtMemCtl() functions. </span><span style="font-size: 10pt; font-family: Verdana;"><br>
|
||||||
|
</span></li></ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS startup files:</span><span style="font-weight: bold; font-style: italic;"></span><span style="font-style: italic;"><span style="font-weight: bold;"></span></span></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">add three
|
||||||
|
startup files for STM32 XL-density devices:
|
||||||
|
<span style="font-weight: bold; font-style: italic;">startup_stm32f10x_xl.s</span></span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;">startup_stm32f10x_md_vl.s</span> for RIDE7: add USART3 IRQ Handler (was missing in previous version)</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add startup files for TrueSTUDIO toolchain</span></li></ul></ul><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;"></span></span>
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.2.0
|
||||||
|
- 03/01/2010</span></h3>
|
||||||
|
<ol style="margin-top: 0in;" start="1" type="1">
|
||||||
|
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"></span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li>
|
||||||
|
</ol>
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">STM32F10x CMSIS files updated to <span style="font-weight: bold;">CMSIS V1.30</span> release</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Directory structure updated to be aligned with CMSIS V1.30<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||||
|
for <b>STM32 Low-density Value line (STM32F100x4/6) and
|
||||||
|
Medium-density Value line (STM32F100x8/B) devices</b>. </span><span style="font-size: 10pt;"><o:p></o:p></span></li>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
<ol style="margin-top: 0in;" start="2" type="1">
|
||||||
|
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">CMSIS Core Peripheral Access Layer</span></i></b></li></ol>
|
||||||
|
<ul>
|
||||||
|
<li><b><i><span style="font-size: 10pt; font-family: Verdana;"></span></i></b><span style="font-size: 10pt; font-family: Verdana;"> Refer to <a href="../../../CMSIS_changes.htm" target="_blank">CMSIS changes</a></span></li>
|
||||||
|
</ul>
|
||||||
|
<ol style="margin-top: 0in; list-style-type: decimal;" start="3">
|
||||||
|
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x CMSIS Device Peripheral Access Layer </span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li>
|
||||||
|
|
||||||
|
</ol>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File:</span> <span style="font-weight: bold; font-style: italic;">stm32f10x.h</span></span><br>
|
||||||
|
</li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Update
|
||||||
|
the stm32f10x.h file to support new Value line devices features: CEC
|
||||||
|
peripheral, new General purpose timers TIM15, TIM16 and TIM17.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Peripherals Bits definitions updated to be in line with Value line devices available features.<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">HSE_Value,
|
||||||
|
HSI_Value and HSEStartup_TimeOut changed to upper case: HSE_VALUE,
|
||||||
|
HSI_VALUE and HSE_STARTUP_TIMEOUT. Old names are kept for legacy
|
||||||
|
purposes.<br>
|
||||||
|
</span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files:</span> <span style="font-weight: bold; font-style: italic;">system_stm32f10x.h and system_stm32f10x.c</span></span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"></span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SystemFrequency variable name changed to SystemCoreClock</span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"></span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Default
|
||||||
|
</span></span><span style="font-size: 10pt; font-family: Verdana;">SystemCoreClock</span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"> is changed to 24MHz when Value line devices are selected and to 72MHz on other devices.</span></span><span style="font-size: 10pt;"><o:p></o:p></span><span style="font-size: 10pt; font-family: Verdana;"> <br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">All while(1) loop were removed from all clock setting functions. User has to handle the HSE startup failure.<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Additional function <span style="font-weight: bold; font-style: italic;">void SystemCoreClockUpdate (void)</span> is provided.<br>
|
||||||
|
</span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Startup files:</span> <span style="font-weight: bold; font-style: italic;">startup_stm32f10x_xx.s</span></span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new
|
||||||
|
startup files for STM32 Low-density Value line devices:
|
||||||
|
<span style="font-weight: bold; font-style: italic;">startup_stm32f10x_ld_vl.s</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new startup
|
||||||
|
files for STM32 Medium-density Value line devices:
|
||||||
|
<span style="font-weight: bold; font-style: italic;">startup_stm32f10x_md_vl.s</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SystemInit() function is called from startup file (startup_stm32f10x_xx.s) before to branch to application main.<br>
|
||||||
|
To reconfigure the default setting of SystemInit() function, refer to system_stm32f10x.c file <br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">GNU startup file for Low density devices (startup_stm32f10x_ld.s) is updated to fix compilation errors.<br>
|
||||||
|
</span></li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
</ul>
|
||||||
|
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2>
|
||||||
|
<p class="MsoNormal" style="margin: 4.5pt 0cm;"><span style="font-size: 10pt; font-family: Verdana; color: black;">The
|
||||||
|
enclosed firmware and all the related documentation are not covered by
|
||||||
|
a License Agreement, if you need such License you can contact your
|
||||||
|
local STMicroelectronics office.<u1:p></u1:p><o:p></o:p></span></p>
|
||||||
|
<p class="MsoNormal"><b style=""><span style="font-size: 10pt; font-family: Verdana; color: black;">THE
|
||||||
|
PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO
|
||||||
|
SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR
|
||||||
|
ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY
|
||||||
|
CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY
|
||||||
|
CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH
|
||||||
|
THEIR PRODUCTS. <o:p></o:p></span></b></p>
|
||||||
|
<p class="MsoNormal"><span style="color: black;"><o:p> </o:p></span></p>
|
||||||
|
<div class="MsoNormal" style="text-align: center;" align="center"><span style="color: black;">
|
||||||
|
<hr align="center" size="2" width="100%"></span></div>
|
||||||
|
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt; text-align: center;" align="center"><span style="font-size: 10pt; font-family: Verdana; color: black;">For
|
||||||
|
complete documentation on </span><span style="font-size: 10pt; font-family: Verdana;">STM32(<span style="color: black;">CORTEX M3) 32-Bit Microcontrollers
|
||||||
|
visit </span><u><span style="color: blue;"><a href="http://www.st.com/stm32" target="_blank">www.st.com/STM32</a></span></u></span><span style="color: black;"><o:p></o:p></span></p>
|
||||||
|
</td>
|
||||||
|
</tr>
|
||||||
|
</tbody>
|
||||||
|
</table>
|
||||||
|
<p class="MsoNormal"><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||||
|
</td>
|
||||||
|
</tr>
|
||||||
|
</tbody>
|
||||||
|
</table>
|
||||||
|
</div>
|
||||||
|
<p class="MsoNormal"><o:p> </o:p></p>
|
||||||
|
</div>
|
||||||
|
</body></html>
|
|
@ -65,7 +65,7 @@
|
||||||
#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL)
|
#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL)
|
||||||
/* #define STM32F10X_LD */ /*!< STM32F10X_LD: STM32 Low density devices */
|
/* #define STM32F10X_LD */ /*!< STM32F10X_LD: STM32 Low density devices */
|
||||||
/* #define STM32F10X_LD_VL */ /*!< STM32F10X_LD_VL: STM32 Low density Value Line devices */
|
/* #define STM32F10X_LD_VL */ /*!< STM32F10X_LD_VL: STM32 Low density Value Line devices */
|
||||||
/* #define STM32F10X_MD */ /*!< STM32F10X_MD: STM32 Medium density devices */
|
/* #define STM32F10X_MD */ /*!< STM32F10X_MD: STM32 Medium density devices */
|
||||||
/* #define STM32F10X_MD_VL */ /*!< STM32F10X_MD_VL: STM32 Medium density Value Line devices */
|
/* #define STM32F10X_MD_VL */ /*!< STM32F10X_MD_VL: STM32 Medium density Value Line devices */
|
||||||
/* #define STM32F10X_HD */ /*!< STM32F10X_HD: STM32 High density devices */
|
/* #define STM32F10X_HD */ /*!< STM32F10X_HD: STM32 High density devices */
|
||||||
/* #define STM32F10X_HD_VL */ /*!< STM32F10X_HD_VL: STM32 High density value line devices */
|
/* #define STM32F10X_HD_VL */ /*!< STM32F10X_HD_VL: STM32 High density value line devices */
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,98 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32f10x.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32f10x_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Define to prevent recursive inclusion
|
||||||
|
*/
|
||||||
|
#ifndef __SYSTEM_STM32F10X_H
|
||||||
|
#define __SYSTEM_STM32F10X_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Exported_types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
extern void SystemInit(void);
|
||||||
|
extern void SystemCoreClockUpdate(void);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__SYSTEM_STM32F10X_H */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,243 @@
|
||||||
|
<html>
|
||||||
|
|
||||||
|
<head>
|
||||||
|
<title>CMSIS Debug Support</title>
|
||||||
|
<meta http-equiv="Content-Type" content="text/html; charset=windows-1252">
|
||||||
|
<meta name="GENERATOR" content="Microsoft FrontPage 6.0">
|
||||||
|
<meta name="ProgId" content="FrontPage.Editor.Document">
|
||||||
|
<style>
|
||||||
|
<!--
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Keil Software CHM Style Sheet
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
body { color: #000000; background-color: #FFFFFF; font-size: 75%; font-family:
|
||||||
|
Verdana, Arial, 'Sans Serif' }
|
||||||
|
a:link { color: #0000FF; text-decoration: underline }
|
||||||
|
a:visited { color: #0000FF; text-decoration: underline }
|
||||||
|
a:active { color: #FF0000; text-decoration: underline }
|
||||||
|
a:hover { color: #FF0000; text-decoration: underline }
|
||||||
|
h1 { font-family: Verdana; font-size: 18pt; color: #000080; font-weight: bold;
|
||||||
|
text-align: Center; margin-right: 3 }
|
||||||
|
h2 { font-family: Verdana; font-size: 14pt; color: #000080; font-weight: bold;
|
||||||
|
background-color: #CCCCCC; margin-top: 24; margin-bottom: 3;
|
||||||
|
padding: 6 }
|
||||||
|
h3 { font-family: Verdana; font-size: 10pt; font-weight: bold; background-color:
|
||||||
|
#CCCCCC; margin-top: 24; margin-bottom: 3; padding: 6 }
|
||||||
|
pre { font-family: Courier New; font-size: 10pt; background-color: #CCFFCC;
|
||||||
|
margin-left: 24; margin-right: 24 }
|
||||||
|
ul { list-style-type: square; margin-top: 6pt; margin-bottom: 0 }
|
||||||
|
ol { margin-top: 6pt; margin-bottom: 0 }
|
||||||
|
li { clear: both; margin-bottom: 6pt }
|
||||||
|
table { font-size: 100%; border-width: 0; padding: 0 }
|
||||||
|
th { color: #FFFFFF; background-color: #000080; text-align: left; vertical-align:
|
||||||
|
bottom; padding-right: 6pt }
|
||||||
|
tr { text-align: left; vertical-align: top }
|
||||||
|
td { text-align: left; vertical-align: top; padding-right: 6pt }
|
||||||
|
.ToolT { font-size: 8pt; color: #808080 }
|
||||||
|
.TinyT { font-size: 8pt; text-align: Center }
|
||||||
|
code { color: #000000; background-color: #E0E0E0; font-family: 'Courier New', Courier;
|
||||||
|
line-height: 120%; font-style: normal }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Notes
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
p.note { font-weight: bold; clear: both; margin-bottom: 3pt; padding-top: 6pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Expanding/Contracting Divisions
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
#expand { text-decoration: none; margin-bottom: 3pt }
|
||||||
|
img.expand { border-style: none; border-width: medium }
|
||||||
|
div.expand { display: none; margin-left: 9pt; margin-top: 0 }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Where List Tags
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
p.wh { font-weight: bold; clear: both; margin-top: 6pt; margin-bottom: 3pt }
|
||||||
|
table.wh { width: 100% }
|
||||||
|
td.whItem { white-space: nowrap; font-style: italic; padding-right: 6pt; padding-bottom:
|
||||||
|
6pt }
|
||||||
|
td.whDesc { padding-bottom: 6pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Keil Table Tags
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
table.kt { border: 1pt solid #000000 }
|
||||||
|
th.kt { white-space: nowrap; border-bottom: 1pt solid #000000; padding-left: 6pt;
|
||||||
|
padding-right: 6pt; padding-top: 4pt; padding-bottom: 4pt }
|
||||||
|
tr.kt { }
|
||||||
|
td.kt { color: #000000; background-color: #E0E0E0; border-top: 1pt solid #A0A0A0;
|
||||||
|
padding-left: 6pt; padding-right: 6pt; padding-top: 2pt;
|
||||||
|
padding-bottom: 2pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
-->
|
||||||
|
|
||||||
|
</style>
|
||||||
|
</head>
|
||||||
|
|
||||||
|
<body>
|
||||||
|
|
||||||
|
<h1>CMSIS Debug Support</h1>
|
||||||
|
|
||||||
|
<hr>
|
||||||
|
|
||||||
|
<h2>Cortex-M3 ITM Debug Access</h2>
|
||||||
|
<p>
|
||||||
|
The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that provides together with
|
||||||
|
the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has
|
||||||
|
32 communication channels which are able to transmit 32 / 16 / 8 bit values; two ITM
|
||||||
|
communication channels are used by CMSIS to output the following information:
|
||||||
|
</p>
|
||||||
|
<ul>
|
||||||
|
<li>ITM Channel 0: used for printf-style output via the debug interface.</li>
|
||||||
|
<li>ITM Channel 31: is reserved for RTOS kernel awareness debugging.</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h2>Debug IN / OUT functions</h2>
|
||||||
|
<p>CMSIS provides following debug functions:</p>
|
||||||
|
<ul>
|
||||||
|
<li>ITM_SendChar (uses ITM channel 0)</li>
|
||||||
|
<li>ITM_ReceiveChar (uses global variable)</li>
|
||||||
|
<li>ITM_CheckChar (uses global variable)</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h3>ITM_SendChar</h3>
|
||||||
|
<p>
|
||||||
|
<strong>ITM_SendChar</strong> is used to transmit a character over ITM channel 0 from
|
||||||
|
the microcontroller system to the debug system. <br>
|
||||||
|
Only a 8 bit value is transmitted.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
static __INLINE uint32_t ITM_SendChar (uint32_t ch)
|
||||||
|
{
|
||||||
|
/* check if debugger connected and ITM channel enabled for tracing */
|
||||||
|
if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&
|
||||||
|
(ITM->TCR & ITM_TCR_ITMENA) &&
|
||||||
|
(ITM->TER & (1UL << 0)) )
|
||||||
|
{
|
||||||
|
while (ITM->PORT[0].u32 == 0);
|
||||||
|
ITM->PORT[0].u8 = (uint8_t)ch;
|
||||||
|
}
|
||||||
|
return (ch);
|
||||||
|
}</pre>
|
||||||
|
|
||||||
|
<h3>ITM_ReceiveChar</h3>
|
||||||
|
<p>
|
||||||
|
ITM communication channel is only capable for OUT direction. For IN direction
|
||||||
|
a globel variable is used. A simple mechansim detects if a character is received.
|
||||||
|
The project to test need to be build with debug information.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<p>
|
||||||
|
The globale variable <strong>ITM_RxBuffer</strong> is used to transmit a 8 bit value from debug system
|
||||||
|
to microcontroller system. <strong>ITM_RxBuffer</strong> is 32 bit wide to enshure a proper handshake.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
extern volatile int ITM_RxBuffer; /* variable to receive characters */
|
||||||
|
</pre>
|
||||||
|
<p>
|
||||||
|
A dedicated bit pattern is used to determin if <strong>ITM_RxBuffer</strong> is empty
|
||||||
|
or contains a valid value.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */
|
||||||
|
</pre>
|
||||||
|
<p>
|
||||||
|
<strong>ITM_ReceiveChar</strong> is used to receive a 8 bit value from the debug system. The function is nonblocking.
|
||||||
|
It returns the received character or '-1' if no character was available.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
static __INLINE int ITM_ReceiveChar (void) {
|
||||||
|
int ch = -1; /* no character available */
|
||||||
|
|
||||||
|
if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
|
||||||
|
ch = ITM_RxBuffer;
|
||||||
|
ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
|
||||||
|
}
|
||||||
|
|
||||||
|
return (ch);
|
||||||
|
}
|
||||||
|
</pre>
|
||||||
|
|
||||||
|
<h3>ITM_CheckChar</h3>
|
||||||
|
<p>
|
||||||
|
<strong>ITM_CheckChar</strong> is used to check if a character is received.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
static __INLINE int ITM_CheckChar (void) {
|
||||||
|
|
||||||
|
if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
|
||||||
|
return (0); /* no character available */
|
||||||
|
} else {
|
||||||
|
return (1); /* character available */
|
||||||
|
}
|
||||||
|
}</pre>
|
||||||
|
|
||||||
|
|
||||||
|
<h2>ITM Debug Support in uVision</h2>
|
||||||
|
<p>
|
||||||
|
uVision uses in a debug session the <strong>Debug (printf) Viewer</strong> window to
|
||||||
|
display the debug data.
|
||||||
|
</p>
|
||||||
|
<p>Direction microcontroller system -> uVision:</p>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
Characters received via ITM communication channel 0 are written in a printf style
|
||||||
|
to <strong>Debug (printf) Viewer</strong> window.
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<p>Direction uVision -> microcontroller system:</p>
|
||||||
|
<ul>
|
||||||
|
<li>Check if <strong>ITM_RxBuffer</strong> variable is available (only performed once).</li>
|
||||||
|
<li>Read character from <strong>Debug (printf) Viewer</strong> window.</li>
|
||||||
|
<li>If <strong>ITM_RxBuffer</strong> empty write character to <strong>ITM_RxBuffer</strong>.</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<p class="Note">Note</p>
|
||||||
|
<ul>
|
||||||
|
<li><p>Current solution does not use a buffer machanism for trasmitting the characters.</p>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h2>RTX Kernel awareness in uVision</h2>
|
||||||
|
<p>
|
||||||
|
uVision / RTX are using a simple and efficient solution for RTX Kernel awareness.
|
||||||
|
No format overhead is necessary.<br>
|
||||||
|
uVsion debugger decodes the RTX events via the 32 / 16 / 8 bit ITM write access
|
||||||
|
to ITM communication channel 31.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<p>Following RTX events are traced:</p>
|
||||||
|
<ul>
|
||||||
|
<li>Task Create / Delete event
|
||||||
|
<ol>
|
||||||
|
<li>32 bit access. Task start address is transmitted</li>
|
||||||
|
<li>16 bit access. Task ID and Create/Delete flag are transmitted<br>
|
||||||
|
High byte holds Create/Delete flag, Low byte holds TASK ID.
|
||||||
|
</li>
|
||||||
|
</ol>
|
||||||
|
</li>
|
||||||
|
<li>Task switch event
|
||||||
|
<ol>
|
||||||
|
<li>8 bit access. Task ID of current task is transmitted</li>
|
||||||
|
</ol>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<p class="Note">Note</p>
|
||||||
|
<ul>
|
||||||
|
<li><p>Other RTOS information could be retrieved via memory read access in a polling mode manner.</p>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
|
||||||
|
<p class="MsoNormal"><span lang="EN-GB"> </span></p>
|
||||||
|
|
||||||
|
<hr>
|
||||||
|
|
||||||
|
<p class="TinyT">Copyright © KEIL - An ARM Company.<br>
|
||||||
|
All rights reserved.<br>
|
||||||
|
Visit our web site at <a href="http://www.keil.com">www.keil.com</a>.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
</body>
|
||||||
|
|
||||||
|
</html>
|
|
@ -0,0 +1,320 @@
|
||||||
|
<html>
|
||||||
|
|
||||||
|
<head>
|
||||||
|
<title>CMSIS Changes</title>
|
||||||
|
<meta http-equiv="Content-Type" content="text/html; charset=windows-1252">
|
||||||
|
<meta name="GENERATOR" content="Microsoft FrontPage 6.0">
|
||||||
|
<meta name="ProgId" content="FrontPage.Editor.Document">
|
||||||
|
<style>
|
||||||
|
<!--
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Keil Software CHM Style Sheet
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
body { color: #000000; background-color: #FFFFFF; font-size: 75%; font-family:
|
||||||
|
Verdana, Arial, 'Sans Serif' }
|
||||||
|
a:link { color: #0000FF; text-decoration: underline }
|
||||||
|
a:visited { color: #0000FF; text-decoration: underline }
|
||||||
|
a:active { color: #FF0000; text-decoration: underline }
|
||||||
|
a:hover { color: #FF0000; text-decoration: underline }
|
||||||
|
h1 { font-family: Verdana; font-size: 18pt; color: #000080; font-weight: bold;
|
||||||
|
text-align: Center; margin-right: 3 }
|
||||||
|
h2 { font-family: Verdana; font-size: 14pt; color: #000080; font-weight: bold;
|
||||||
|
background-color: #CCCCCC; margin-top: 24; margin-bottom: 3;
|
||||||
|
padding: 6 }
|
||||||
|
h3 { font-family: Verdana; font-size: 10pt; font-weight: bold; background-color:
|
||||||
|
#CCCCCC; margin-top: 24; margin-bottom: 3; padding: 6 }
|
||||||
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pre { font-family: Courier New; font-size: 10pt; background-color: #CCFFCC;
|
||||||
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margin-left: 24; margin-right: 24 }
|
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ul { list-style-type: square; margin-top: 6pt; margin-bottom: 0 }
|
||||||
|
ol { margin-top: 6pt; margin-bottom: 0 }
|
||||||
|
li { clear: both; margin-bottom: 6pt }
|
||||||
|
table { font-size: 100%; border-width: 0; padding: 0 }
|
||||||
|
th { color: #FFFFFF; background-color: #000080; text-align: left; vertical-align:
|
||||||
|
bottom; padding-right: 6pt }
|
||||||
|
tr { text-align: left; vertical-align: top }
|
||||||
|
td { text-align: left; vertical-align: top; padding-right: 6pt }
|
||||||
|
.ToolT { font-size: 8pt; color: #808080 }
|
||||||
|
.TinyT { font-size: 8pt; text-align: Center }
|
||||||
|
code { color: #000000; background-color: #E0E0E0; font-family: 'Courier New', Courier;
|
||||||
|
line-height: 120%; font-style: normal }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Notes
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
p.note { font-weight: bold; clear: both; margin-bottom: 3pt; padding-top: 6pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Expanding/Contracting Divisions
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
#expand { text-decoration: none; margin-bottom: 3pt }
|
||||||
|
img.expand { border-style: none; border-width: medium }
|
||||||
|
div.expand { display: none; margin-left: 9pt; margin-top: 0 }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Where List Tags
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
p.wh { font-weight: bold; clear: both; margin-top: 6pt; margin-bottom: 3pt }
|
||||||
|
table.wh { width: 100% }
|
||||||
|
td.whItem { white-space: nowrap; font-style: italic; padding-right: 6pt; padding-bottom:
|
||||||
|
6pt }
|
||||||
|
td.whDesc { padding-bottom: 6pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Keil Table Tags
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
table.kt { border: 1pt solid #000000 }
|
||||||
|
th.kt { white-space: nowrap; border-bottom: 1pt solid #000000; padding-left: 6pt;
|
||||||
|
padding-right: 6pt; padding-top: 4pt; padding-bottom: 4pt }
|
||||||
|
tr.kt { }
|
||||||
|
td.kt { color: #000000; background-color: #E0E0E0; border-top: 1pt solid #A0A0A0;
|
||||||
|
padding-left: 6pt; padding-right: 6pt; padding-top: 2pt;
|
||||||
|
padding-bottom: 2pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
-->
|
||||||
|
|
||||||
|
</style>
|
||||||
|
</head>
|
||||||
|
|
||||||
|
<body>
|
||||||
|
|
||||||
|
<h1>Changes to CMSIS version V1.20</h1>
|
||||||
|
|
||||||
|
<hr>
|
||||||
|
|
||||||
|
<h2>1. Removed CMSIS Middelware packages</h2>
|
||||||
|
<p>
|
||||||
|
CMSIS Middleware is on hold from ARM side until a agreement between all CMSIS partners is found.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<h2>2. SystemFrequency renamed to SystemCoreClock</h2>
|
||||||
|
<p>
|
||||||
|
The variable name <strong>SystemCoreClock</strong> is more precise than <strong>SystemFrequency</strong>
|
||||||
|
because the variable holds the clock value at which the core is running.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<h2>3. Changed startup concept</h2>
|
||||||
|
<p>
|
||||||
|
The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit
|
||||||
|
from main) has the weakness that it does not work for controllers which need a already
|
||||||
|
configuerd clock system to configure the external memory controller.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<h3>Changed startup concept</h3>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
SystemInit() is called from startup file before <strong>premain</strong>.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<strong>SystemInit()</strong> configures the clock system and also configures
|
||||||
|
an existing external memory controller.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<strong>SystemInit()</strong> must not use global variables.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<strong>SystemCoreClock</strong> is initialized with a correct predefined value.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
Additional function <strong>void SystemCoreClockUpdate (void)</strong> is provided.<br>
|
||||||
|
<strong>SystemCoreClockUpdate()</strong> updates the variable <strong>SystemCoreClock</strong>
|
||||||
|
and must be called whenever the core clock is changed.<br>
|
||||||
|
<strong>SystemCoreClockUpdate()</strong> evaluates the clock register settings and calculates
|
||||||
|
the current core clock.
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
|
||||||
|
<h2>4. Advanced Debug Functions</h2>
|
||||||
|
<p>
|
||||||
|
ITM communication channel is only capable for OUT direction. To allow also communication for
|
||||||
|
IN direction a simple concept is provided.
|
||||||
|
</p>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
Global variable <strong>volatile int ITM_RxBuffer</strong> used for IN data.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
Function <strong>int ITM_CheckChar (void)</strong> checks if a new character is available.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
Function <strong>int ITM_ReceiveChar (void)</strong> retrieves the new character.
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<p>
|
||||||
|
For detailed explanation see file <strong>CMSIS debug support.htm</strong>.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
|
||||||
|
<h2>5. Core Register Bit Definitions</h2>
|
||||||
|
<p>
|
||||||
|
Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the
|
||||||
|
defines correspond with the Cortex-M Technical Reference Manual.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
e.g. SysTick structure with bit definitions
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick
|
||||||
|
memory mapped structure for SysTick
|
||||||
|
@{
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
__IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */
|
||||||
|
__IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */
|
||||||
|
__IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */
|
||||||
|
__I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */
|
||||||
|
} SysTick_Type;
|
||||||
|
|
||||||
|
/* SysTick Control / Status Register Definitions */
|
||||||
|
#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
|
||||||
|
#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
|
||||||
|
|
||||||
|
#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
|
||||||
|
#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
|
||||||
|
|
||||||
|
#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
|
||||||
|
#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
|
||||||
|
|
||||||
|
#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
|
||||||
|
#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
|
||||||
|
|
||||||
|
/* SysTick Reload Register Definitions */
|
||||||
|
#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
|
||||||
|
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
|
||||||
|
|
||||||
|
/* SysTick Current Register Definitions */
|
||||||
|
#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
|
||||||
|
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
|
||||||
|
|
||||||
|
/* SysTick Calibration Register Definitions */
|
||||||
|
#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
|
||||||
|
#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
|
||||||
|
|
||||||
|
#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
|
||||||
|
#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
|
||||||
|
|
||||||
|
#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
|
||||||
|
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
|
||||||
|
/*@}*/ /* end of group CMSIS_CM3_SysTick */</pre>
|
||||||
|
|
||||||
|
<h2>7. DoxyGen Tags</h2>
|
||||||
|
<p>
|
||||||
|
DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation
|
||||||
|
using DoxyGen.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<h2>8. Folder Structure</h2>
|
||||||
|
<p>
|
||||||
|
The folder structure is changed to differentiate the single support packages.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<ul>
|
||||||
|
<li>CM0</li>
|
||||||
|
<li>CM3
|
||||||
|
<ul>
|
||||||
|
<li>CoreSupport</li>
|
||||||
|
<li>DeviceSupport</li>
|
||||||
|
<ul>
|
||||||
|
<li>Vendor
|
||||||
|
<ul>
|
||||||
|
<li>Device
|
||||||
|
<ul>
|
||||||
|
<li>Startup
|
||||||
|
<ul>
|
||||||
|
<li>Toolchain</li>
|
||||||
|
<li>Toolchain</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
<li>Device</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
<li>Vendor</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
<li>Example
|
||||||
|
<ul>
|
||||||
|
<li>Toolchain
|
||||||
|
<ul>
|
||||||
|
<li>Device</li>
|
||||||
|
<li>Device</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
<li>Toolchain</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
|
||||||
|
<li>Documentation</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h2>9. Open Points</h2>
|
||||||
|
<p>
|
||||||
|
Following points need to be clarified and solved:
|
||||||
|
</p>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
<p>
|
||||||
|
Equivalent C and Assembler startup files.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
Is there a need for having C startup files although assembler startup files are
|
||||||
|
very efficient and do not need to be changed?
|
||||||
|
<p/>
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<p>
|
||||||
|
Placing of HEAP in external RAM.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
It must be possible to place HEAP in external RAM if the device supports an
|
||||||
|
external memory controller.
|
||||||
|
</p>
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<p>
|
||||||
|
Placing of STACK /HEAP.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
STACK should always be placed at the end of internal RAM.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
If HEAP is placed in internal RAM than it should be placed after RW ZI section.
|
||||||
|
</p>
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<p>
|
||||||
|
Removing core_cm3.c and core_cm0.c.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
On a long term the functions in core_cm3.c and core_cm0.c must be replaced with
|
||||||
|
appropriate compiler intrinsics.
|
||||||
|
</p>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
|
||||||
|
<h2>10. Limitations</h2>
|
||||||
|
<p>
|
||||||
|
The following limitations are not covered with the current CMSIS version:
|
||||||
|
</p>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
No <strong>C startup files</strong> for ARM toolchain are provided.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
No <strong>C startup files</strong> for GNU toolchain are provided.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
No <strong>C startup files</strong> for IAR toolchain are provided.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
No <strong>Tasking</strong> projects are provided yet.
|
||||||
|
</li>
|
||||||
|
</ul>
|
File diff suppressed because it is too large
Load Diff
Binary file not shown.
|
@ -0,0 +1,193 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: bootloader application source file
|
||||||
|
| File Name: main.c
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "boot.h" /* bootloader generic header */
|
||||||
|
#include "stm32f10x.h" /* microcontroller registers */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Function prototypes
|
||||||
|
****************************************************************************************/
|
||||||
|
static void Init(void);
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: main
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: program return code
|
||||||
|
** DESCRIPTION: This is the entry point for the bootloader application and is called
|
||||||
|
** by the reset interrupt vector after the C-startup routines executed.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
int main(void)
|
||||||
|
{
|
||||||
|
/* initialize the microcontroller */
|
||||||
|
Init();
|
||||||
|
/* initialize the bootloader */
|
||||||
|
BootInit();
|
||||||
|
|
||||||
|
/* start the infinite program loop */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* run the bootloader task */
|
||||||
|
BootTask();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* program should never get here */
|
||||||
|
return 0;
|
||||||
|
} /*** end of main ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: Init
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Initializes the microcontroller. The interrupts are disabled, the
|
||||||
|
** clocks are configured and the flash wait states are configured.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
static void Init(void)
|
||||||
|
{
|
||||||
|
volatile blt_int32u StartUpCounter = 0, HSEStatus = 0;
|
||||||
|
blt_int32u pll_multiplier;
|
||||||
|
|
||||||
|
/* reset the RCC clock configuration to the default reset state (for debug purpose) */
|
||||||
|
/* set HSION bit */
|
||||||
|
RCC->CR |= (blt_int32u)0x00000001;
|
||||||
|
/* reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
|
||||||
|
RCC->CFGR &= (blt_int32u)0xF8FF0000;
|
||||||
|
/* reset HSEON, CSSON and PLLON bits */
|
||||||
|
RCC->CR &= (blt_int32u)0xFEF6FFFF;
|
||||||
|
/* reset HSEBYP bit */
|
||||||
|
RCC->CR &= (blt_int32u)0xFFFBFFFF;
|
||||||
|
/* reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
|
||||||
|
RCC->CFGR &= (blt_int32u)0xFF80FFFF;
|
||||||
|
/* disable all interrupts and clear pending bits */
|
||||||
|
RCC->CIR = 0x009F0000;
|
||||||
|
/* enable HSE */
|
||||||
|
RCC->CR |= ((blt_int32u)RCC_CR_HSEON);
|
||||||
|
/* wait till HSE is ready and if Time out is reached exit */
|
||||||
|
do
|
||||||
|
{
|
||||||
|
HSEStatus = RCC->CR & RCC_CR_HSERDY;
|
||||||
|
StartUpCounter++;
|
||||||
|
}
|
||||||
|
while((HSEStatus == 0) && (StartUpCounter != 1500));
|
||||||
|
/* check if time out was reached */
|
||||||
|
if ((RCC->CR & RCC_CR_HSERDY) == RESET)
|
||||||
|
{
|
||||||
|
/* cannot continue when HSE is not ready */
|
||||||
|
ASSERT_RT(BLT_FALSE);
|
||||||
|
}
|
||||||
|
/* enable flash prefetch buffer */
|
||||||
|
FLASH->ACR |= FLASH_ACR_PRFTBE;
|
||||||
|
/* reset flash wait state configuration to default 0 wait states */
|
||||||
|
FLASH->ACR &= (blt_int32u)((blt_int32u)~FLASH_ACR_LATENCY);
|
||||||
|
#if (BOOT_CPU_SYSTEM_SPEED_KHZ > 48000)
|
||||||
|
/* configure 2 flash wait states */
|
||||||
|
FLASH->ACR |= (blt_int32u)FLASH_ACR_LATENCY_2;
|
||||||
|
#elif (BOOT_CPU_SYSTEM_SPEED_KHZ > 24000)
|
||||||
|
/* configure 1 flash wait states */
|
||||||
|
FLASH->ACR |= (blt_int32u)FLASH_ACR_LATENCY_1;
|
||||||
|
#endif
|
||||||
|
/* HCLK = SYSCLK */
|
||||||
|
RCC->CFGR |= (blt_int32u)RCC_CFGR_HPRE_DIV1;
|
||||||
|
/* PCLK2 = HCLK/2 */
|
||||||
|
RCC->CFGR |= (blt_int32u)RCC_CFGR_PPRE2_DIV2;
|
||||||
|
/* PCLK1 = HCLK/2 */
|
||||||
|
RCC->CFGR |= (blt_int32u)RCC_CFGR_PPRE1_DIV2;
|
||||||
|
/* reset PLL configuration */
|
||||||
|
RCC->CFGR &= (blt_int32u)((blt_int32u)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | \
|
||||||
|
RCC_CFGR_PLLMULL));
|
||||||
|
/* assert that the pll_multiplier is between 2 and 16 */
|
||||||
|
ASSERT_CT((BOOT_CPU_SYSTEM_SPEED_KHZ/BOOT_CPU_XTAL_SPEED_KHZ) >= 2);
|
||||||
|
ASSERT_CT((BOOT_CPU_SYSTEM_SPEED_KHZ/BOOT_CPU_XTAL_SPEED_KHZ) <= 16);
|
||||||
|
/* calculate multiplier value */
|
||||||
|
pll_multiplier = BOOT_CPU_SYSTEM_SPEED_KHZ/BOOT_CPU_XTAL_SPEED_KHZ;
|
||||||
|
/* convert to register value */
|
||||||
|
pll_multiplier = (blt_int32u)((pll_multiplier - 2) << 18);
|
||||||
|
/* set the PLL multiplier and clock source */
|
||||||
|
RCC->CFGR |= (blt_int32u)(RCC_CFGR_PLLSRC_HSE | pll_multiplier);
|
||||||
|
/* enable PLL */
|
||||||
|
RCC->CR |= RCC_CR_PLLON;
|
||||||
|
/* wait till PLL is ready */
|
||||||
|
while((RCC->CR & RCC_CR_PLLRDY) == 0)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
/* select PLL as system clock source */
|
||||||
|
RCC->CFGR &= (blt_int32u)((blt_int32u)~(RCC_CFGR_SW));
|
||||||
|
RCC->CFGR |= (blt_int32u)RCC_CFGR_SW_PLL;
|
||||||
|
/* wait till PLL is used as system clock source */
|
||||||
|
while ((RCC->CFGR & (blt_int32u)RCC_CFGR_SWS) != (blt_int32u)0x08)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
#if (BOOT_COM_UART_ENABLE > 0)
|
||||||
|
/* enable clock for USART2 peripheral */
|
||||||
|
RCC->APB1ENR |= (blt_int32u)0x00020000;
|
||||||
|
/* enable clocks for USART2 transmitter and receiver pins (GPIOA and AFIO) */
|
||||||
|
RCC->APB2ENR |= (blt_int32u)(0x00000004 | 0x00000001);
|
||||||
|
/* configure USART2 Tx (GPIOA2) as alternate function push-pull */
|
||||||
|
/* first reset the configuration */
|
||||||
|
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 8);
|
||||||
|
/* CNF2[1:0] = %10 and MODE2[1:0] = %11 */
|
||||||
|
GPIOA->CRL |= (blt_int32u)((blt_int32u)0xb << 8);
|
||||||
|
/* configure USART2 Rx (GPIOA3) as alternate function input floating */
|
||||||
|
/* first reset the configuration */
|
||||||
|
GPIOA->CRL &= ~(blt_int32u)((blt_int32u)0xf << 12);
|
||||||
|
/* CNF2[1:0] = %01 and MODE2[1:0] = %00 */
|
||||||
|
GPIOA->CRL |= (blt_int32u)((blt_int32u)0x4 << 12);
|
||||||
|
#endif
|
||||||
|
#if (BOOT_COM_CAN_ENABLE > 0)
|
||||||
|
/* enable clocks for CAN transmitter and receiver pins (GPIOB and AFIO) */
|
||||||
|
RCC->APB2ENR |= (blt_int32u)(0x00000008 | 0x00000001);
|
||||||
|
/* configure CAN Rx (GPIOB8) as alternate function input pull-up */
|
||||||
|
/* first reset the configuration */
|
||||||
|
GPIOB->CRH &= ~(blt_int32u)((blt_int32u)0xf << 0);
|
||||||
|
/* CNF8[1:0] = %10 and MODE8[1:0] = %00 */
|
||||||
|
GPIOB->CRH |= (blt_int32u)((blt_int32u)0x8 << 0);
|
||||||
|
/* configure CAN Tx (GPIOB9) as alternate function push-pull */
|
||||||
|
/* first reset the configuration */
|
||||||
|
GPIOB->CRH &= ~(blt_int32u)((blt_int32u)0xf << 4);
|
||||||
|
/* CNF9[1:0] = %10 and MODE9[1:0] = %11 */
|
||||||
|
GPIOB->CRH |= (blt_int32u)((blt_int32u)0xb << 4);
|
||||||
|
/* remap CAN1 pins to PortB */
|
||||||
|
AFIO->MAPR &= ~(blt_int32u)((blt_int32u)0x3 << 13);
|
||||||
|
AFIO->MAPR |= (blt_int32u)((blt_int32u)0x2 << 13);
|
||||||
|
/* enable clocks for CAN controller peripheral */
|
||||||
|
RCC->APB1ENR |= (blt_int32u)0x02000000;
|
||||||
|
#endif
|
||||||
|
} /*** end of Init ***/
|
||||||
|
|
||||||
|
|
||||||
|
/*********************************** end of main.c *************************************/
|
|
@ -0,0 +1,178 @@
|
||||||
|
#****************************************************************************************
|
||||||
|
#| Description: Makefile for STM32 using CodeSourcery GNU GCC compiler toolset
|
||||||
|
#| File Name: makefile
|
||||||
|
#|
|
||||||
|
#|---------------------------------------------------------------------------------------
|
||||||
|
#| C O P Y R I G H T
|
||||||
|
#|---------------------------------------------------------------------------------------
|
||||||
|
#| Copyright (c) 2011 by Feaser LLC http://www.feaser.com All rights reserved
|
||||||
|
#|
|
||||||
|
#|---------------------------------------------------------------------------------------
|
||||||
|
#| L I C E N S E
|
||||||
|
#|---------------------------------------------------------------------------------------
|
||||||
|
#| This file is part of OpenBTL. OpenBTL is free software: you can redistribute it and/or
|
||||||
|
#| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
#| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
#| version.
|
||||||
|
#|
|
||||||
|
#| OpenBTL is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
#| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
#| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
#|
|
||||||
|
#| You should have received a copy of the GNU General Public License along with OpenBTL.
|
||||||
|
#| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
#|
|
||||||
|
#****************************************************************************************
|
||||||
|
SHELL = sh
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Configure project name |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
PROJ_NAME=openbtl_olimex_stm32p103
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Speficy project source files |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
PROJ_FILES= \
|
||||||
|
config.h \
|
||||||
|
hooks.c \
|
||||||
|
main.c \
|
||||||
|
./lib/CMSIS/CM3/CoreSupport/core_cm3.c \
|
||||||
|
./lib/CMSIS/CM3/CoreSupport/core_cm3.h \
|
||||||
|
./lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h \
|
||||||
|
./lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c \
|
||||||
|
./lib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.h \
|
||||||
|
../../../Source/boot.c \
|
||||||
|
../../../Source/boot.h \
|
||||||
|
../../../Source/com.c \
|
||||||
|
../../../Source/com.h \
|
||||||
|
../../../Source/xcp.c \
|
||||||
|
../../../Source/xcp.h \
|
||||||
|
../../../Source/backdoor.c \
|
||||||
|
../../../Source/backdoor.h \
|
||||||
|
../../../Source/cop.c \
|
||||||
|
../../../Source/cop.h \
|
||||||
|
../../../Source/assert.c \
|
||||||
|
../../../Source/assert.h \
|
||||||
|
../../../Source/plausibility.h \
|
||||||
|
../../../Source/ARMCM3_STM32/types.h \
|
||||||
|
../../../Source/ARMCM3_STM32/cpu.c \
|
||||||
|
../../../Source/ARMCM3_STM32/cpu.h \
|
||||||
|
../../../Source/ARMCM3_STM32/can.c \
|
||||||
|
../../../Source/ARMCM3_STM32/can.h \
|
||||||
|
../../../Source/ARMCM3_STM32/uart.c \
|
||||||
|
../../../Source/ARMCM3_STM32/uart.h \
|
||||||
|
../../../Source/ARMCM3_STM32/nvm.c \
|
||||||
|
../../../Source/ARMCM3_STM32/nvm.h \
|
||||||
|
../../../Source/ARMCM3_STM32/timer.c \
|
||||||
|
../../../Source/ARMCM3_STM32/timer.h \
|
||||||
|
../../../Source/ARMCM3_STM32/GCC/flash.c \
|
||||||
|
../../../Source/ARMCM3_STM32/GCC/flash.h \
|
||||||
|
../../../Source/ARMCM3_STM32/GCC/vectors.c \
|
||||||
|
../../../Source/ARMCM3_STM32/GCC/cstart.c
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Compiler binaries |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
CC = arm-none-eabi-gcc
|
||||||
|
LN = arm-none-eabi-gcc
|
||||||
|
OC = arm-none-eabi-objcopy
|
||||||
|
OD = arm-none-eabi-objdump
|
||||||
|
AS = arm-none-eabi-as
|
||||||
|
SZ = arm-none-eabi-size
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Extract file names |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
PROJ_ASRCS = $(filter %.s,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
|
||||||
|
PROJ_CSRCS = $(filter %.c,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
|
||||||
|
PROJ_CHDRS = $(filter %.h,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
|
||||||
|
PROJ_CCMPL = $(patsubst %.c,%.cpl,$(PROJ_CSRCS))
|
||||||
|
PROJ_ACMPL = $(patsubst %.s,%.cpl,$(PROJ_ASRCS))
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Set important path variables |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
VPATH = $(foreach path,$(sort $(foreach file,$(PROJ_FILES),$(dir $(file)))) $(subst \,/,$(OBJ_PATH)),$(path) :)
|
||||||
|
OBJ_PATH = obj
|
||||||
|
BIN_PATH = bin
|
||||||
|
INC_PATH = $(patsubst %,-I%,$(sort $(foreach file,$(filter %.h,$(PROJ_FILES)),$(dir $(file)))))
|
||||||
|
INC_PATH += -I.
|
||||||
|
LIB_PATH = -L../../../Source/ARMCM3_STM32/GCC/
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Options for compiler binaries |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
CFLAGS = -g -D inline= -mthumb -mcpu=cortex-m3 -Os -T memory.x
|
||||||
|
CFLAGS += -D PACK_STRUCT_END=__attribute\(\(packed\)\) -Wno-main
|
||||||
|
CFLAGS += -D ALIGN_STRUCT_END=__attribute\(\(aligned\(4\)\)\)
|
||||||
|
CFLAGS += -ffunction-sections -fdata-sections $(INC_PATH) -D STM32F10X_MD -D GCC_ARMCM3
|
||||||
|
CFLAGS += -Wa,-adhlns="$(OBJ_PATH)/$(subst .o,.lst,$@)"
|
||||||
|
LFLAGS = -nostartfiles -Xlinker -M -Xlinker -Map=$(BIN_PATH)/$(PROJ_NAME).map
|
||||||
|
LFLAGS += $(LIB_PATH) -Xlinker --no-gc-sections
|
||||||
|
OFLAGS = -O srec
|
||||||
|
ODFLAGS = -x
|
||||||
|
SZFLAGS = -B -d
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Specify library files |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
LIBS =
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Define targets |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
AOBJS = $(patsubst %.s,%.o,$(PROJ_ASRCS))
|
||||||
|
COBJS = $(patsubst %.c,%.o,$(PROJ_CSRCS))
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Make ALL |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
all : $(BIN_PATH)/$(PROJ_NAME).srec
|
||||||
|
|
||||||
|
|
||||||
|
$(BIN_PATH)/$(PROJ_NAME).srec : $(BIN_PATH)/$(PROJ_NAME).elf
|
||||||
|
@$(OC) $< $(OFLAGS) $@
|
||||||
|
@$(OD) $(ODFLAGS) $< > $(BIN_PATH)/$(PROJ_NAME).map
|
||||||
|
@echo +++ Summary of memory consumption:
|
||||||
|
@$(SZ) $(SZFLAGS) $<
|
||||||
|
@echo +++ Build complete [$(notdir $@)]
|
||||||
|
|
||||||
|
$(BIN_PATH)/$(PROJ_NAME).elf : $(AOBJS) $(COBJS)
|
||||||
|
@echo +++ Linking [$(notdir $@)]
|
||||||
|
@$(LN) $(CFLAGS) -o $@ $(patsubst %.o,$(OBJ_PATH)/%.o,$(^F)) $(LIBS) $(LFLAGS)
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Compile and assemble |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
$(AOBJS): %.o: %.s $(PROJ_CHDRS)
|
||||||
|
@echo +++ Assembling [$(notdir $<)]
|
||||||
|
@$(AS) $(AFLAGS) $< -o $(OBJ_PATH)/$(@F)
|
||||||
|
|
||||||
|
$(COBJS): %.o: %.c $(PROJ_CHDRS)
|
||||||
|
@echo +++ Compiling [$(notdir $<)]
|
||||||
|
@$(CC) $(CFLAGS) -c $< -o $(OBJ_PATH)/$(@F)
|
||||||
|
|
||||||
|
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
#| Make CLEAN |
|
||||||
|
#|---------------------------------------------------------------------------------------|
|
||||||
|
clean :
|
||||||
|
@echo +++ Cleaning build environment
|
||||||
|
@rm -f $(foreach file,$(AOBJS),$(OBJ_PATH)/$(file))
|
||||||
|
@rm -f $(foreach file,$(COBJS),$(OBJ_PATH)/$(file))
|
||||||
|
@rm -f $(patsubst %.o,%.lst,$(foreach file,$(COBJS),$(OBJ_PATH)/$(file)))
|
||||||
|
@rm -f $(BIN_PATH)/$(PROJ_NAME).elf $(BIN_PATH)/$(PROJ_NAME).map
|
||||||
|
@rm -f $(BIN_PATH)/$(PROJ_NAME).srec
|
||||||
|
@echo +++ Clean complete
|
||||||
|
|
||||||
|
|
Binary file not shown.
|
@ -0,0 +1,628 @@
|
||||||
|
|
||||||
|
bin/demoprog_olimex_stm32p103.elf: file format elf32-littlearm
|
||||||
|
bin/demoprog_olimex_stm32p103.elf
|
||||||
|
architecture: arm, flags 0x00000112:
|
||||||
|
EXEC_P, HAS_SYMS, D_PAGED
|
||||||
|
start address 0x08002000
|
||||||
|
|
||||||
|
Program Header:
|
||||||
|
LOAD off 0x00000000 vaddr 0x08000000 paddr 0x08000000 align 2**15
|
||||||
|
filesz 0x00007764 memsz 0x00007764 flags r-x
|
||||||
|
LOAD off 0x00008000 vaddr 0x20000000 paddr 0x08007764 align 2**15
|
||||||
|
filesz 0x00000028 memsz 0x00000180 flags rw-
|
||||||
|
private flags = 5000002: [Version5 EABI] [has entry point]
|
||||||
|
|
||||||
|
Sections:
|
||||||
|
Idx Name Size VMA LMA File off Algn
|
||||||
|
0 .text 00005764 08002000 08002000 00002000 2**2
|
||||||
|
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||||
|
1 .data 00000028 20000000 08007764 00008000 2**2
|
||||||
|
CONTENTS, ALLOC, LOAD, DATA
|
||||||
|
2 .bss 00000158 20000028 0800778c 00008028 2**2
|
||||||
|
ALLOC
|
||||||
|
3 .debug_abbrev 00002ec0 00000000 00000000 00008028 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
4 .debug_info 0000cb7c 00000000 00000000 0000aee8 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
5 .debug_line 00005a4f 00000000 00000000 00017a64 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
6 .debug_loc 000061cc 00000000 00000000 0001d4b3 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
7 .debug_pubnames 00002d93 00000000 00000000 0002367f 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
8 .debug_pubtypes 000010d8 00000000 00000000 00026412 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
9 .debug_aranges 000012f8 00000000 00000000 000274ea 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
10 .debug_ranges 000010f8 00000000 00000000 000287e2 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
11 .debug_str 0000525f 00000000 00000000 000298da 2**0
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
12 .comment 0000002a 00000000 00000000 0002eb39 2**0
|
||||||
|
CONTENTS, READONLY
|
||||||
|
13 .ARM.attributes 00000031 00000000 00000000 0002eb63 2**0
|
||||||
|
CONTENTS, READONLY
|
||||||
|
14 .debug_frame 0000258c 00000000 00000000 0002eb94 2**2
|
||||||
|
CONTENTS, READONLY, DEBUGGING
|
||||||
|
SYMBOL TABLE:
|
||||||
|
08002000 l d .text 00000000 .text
|
||||||
|
20000000 l d .data 00000000 .data
|
||||||
|
20000028 l d .bss 00000000 .bss
|
||||||
|
00000000 l d .debug_abbrev 00000000 .debug_abbrev
|
||||||
|
00000000 l d .debug_info 00000000 .debug_info
|
||||||
|
00000000 l d .debug_line 00000000 .debug_line
|
||||||
|
00000000 l d .debug_loc 00000000 .debug_loc
|
||||||
|
00000000 l d .debug_pubnames 00000000 .debug_pubnames
|
||||||
|
00000000 l d .debug_pubtypes 00000000 .debug_pubtypes
|
||||||
|
00000000 l d .debug_aranges 00000000 .debug_aranges
|
||||||
|
00000000 l d .debug_ranges 00000000 .debug_ranges
|
||||||
|
00000000 l d .debug_str 00000000 .debug_str
|
||||||
|
00000000 l d .comment 00000000 .comment
|
||||||
|
00000000 l d .ARM.attributes 00000000 .ARM.attributes
|
||||||
|
00000000 l d .debug_frame 00000000 .debug_frame
|
||||||
|
00000000 l df *ABS* 00000000 vectors.c
|
||||||
|
00000000 l df *ABS* 00000000 boot.c
|
||||||
|
08002154 l F .text 00000032 UartReceiveByte
|
||||||
|
20000028 l O .bss 00000001 xcpCtoRxInProgress.3647
|
||||||
|
2000002c l O .bss 00000041 xcpCtoReqPacket.3645
|
||||||
|
20000070 l O .bss 00000001 xcpCtoRxLength.3646
|
||||||
|
00000000 l df *ABS* 00000000 cstart.c
|
||||||
|
08002316 l F .text 00000000 zero_loop
|
||||||
|
00000000 l df *ABS* 00000000 irq.c
|
||||||
|
08002334 l F .text 00000004 __enable_irq
|
||||||
|
20000071 l O .bss 00000001 interruptNesting
|
||||||
|
00000000 l df *ABS* 00000000 led.c
|
||||||
|
20000074 l O .bss 00000004 timer_counter_last.3638
|
||||||
|
20000078 l O .bss 00000001 led_toggle_state.3637
|
||||||
|
00000000 l df *ABS* 00000000 main.c
|
||||||
|
00000000 l df *ABS* 00000000 timer.c
|
||||||
|
2000007c l O .bss 00000004 millisecond_counter
|
||||||
|
00000000 l df *ABS* 00000000 core_cm3.c
|
||||||
|
00000000 l df *ABS* 00000000 system_stm32f10x.c
|
||||||
|
00000000 l df *ABS* 00000000 misc.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_adc.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_bkp.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_can.c
|
||||||
|
08002ea8 l F .text 0000000a CheckITStatus
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_cec.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_crc.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_dac.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_dbgmcu.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_dma.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_exti.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_flash.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_fsmc.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_gpio.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_i2c.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_iwdg.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_pwr.c
|
||||||
|
08005410 l F .text 00000004 __WFI
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_rcc.c
|
||||||
|
20000014 l O .data 00000004 ADCPrescTable
|
||||||
|
20000018 l O .data 00000010 APBAHBPrescTable
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_rtc.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_sdio.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_spi.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_tim.c
|
||||||
|
080060c8 l F .text 000000b4 TI1_Config
|
||||||
|
0800617c l F .text 000000b6 TI2_Config
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_usart.c
|
||||||
|
00000000 l df *ABS* 00000000 stm32f10x_wwdg.c
|
||||||
|
080054b0 g F .text 00000030 PWR_EnterSTANDBYMode
|
||||||
|
08006884 g F .text 00000014 TIM_TimeBaseStructInit
|
||||||
|
08004aa0 g F .text 00000018 FSMC_GetECC
|
||||||
|
08003888 g F .text 0000001e CEC_Cmd
|
||||||
|
08002600 g F .text 00000006 __set_PRIMASK
|
||||||
|
0800752c g F .text 00000012 USART_SetGuardTime
|
||||||
|
080055b0 g F .text 0000000c RCC_HSICmd
|
||||||
|
08006aa8 g F .text 00000018 TIM_ForcedOC2Config
|
||||||
|
08004024 g F .text 0000001e FLASH_Unlock
|
||||||
|
080055d4 g F .text 0000000c RCC_PLLCmd
|
||||||
|
08004e28 g F .text 00000022 GPIO_EventOutputConfig
|
||||||
|
08006ec0 g F .text 00000004 TIM_SetCompare2
|
||||||
|
08003e08 g F .text 0000001a DMA_Cmd
|
||||||
|
08002ddc g F .text 0000001e BKP_RTCOutputConfig
|
||||||
|
080022d0 g F .text 00000056 reset_handler
|
||||||
|
08006b10 g F .text 00000020 TIM_SelectCOM
|
||||||
|
0800409c g F .text 0000000c FLASH_GetWriteProtectionOptionByte
|
||||||
|
08005954 g F .text 0000000c RCC_ClearITPendingBit
|
||||||
|
08005cb8 g F .text 0000000c SDIO_StopSDIOReadWait
|
||||||
|
08005250 g F .text 00000020 I2C_TransmitPEC
|
||||||
|
08004250 g F .text 000000c0 FLASH_ReadOutProtection
|
||||||
|
08004dec g F .text 0000000c GPIO_ReadOutputDataBit
|
||||||
|
08004710 g F .text 00000020 FSMC_PCCARDDeInit
|
||||||
|
08006d30 g F .text 00000026 TIM_CCxCmd
|
||||||
|
08006f90 g F .text 0000001e TIM_SetIC4Prescaler
|
||||||
|
08003e74 g F .text 0000001c DMA_GetITStatus
|
||||||
|
08006b50 g F .text 00000020 TIM_CCPreloadControl
|
||||||
|
080051c4 g F .text 00000006 I2C_ReceiveData
|
||||||
|
08005f9c g F .text 00000004 SPI_I2S_SendData
|
||||||
|
08005d2c g F .text 0000000c SDIO_ClearFlag
|
||||||
|
08003678 g F .text 00000114 CAN_GetITStatus
|
||||||
|
0800378c g F .text 000000bc CAN_ClearITPendingBit
|
||||||
|
08004490 g F .text 0000007e FLASH_ProgramWord
|
||||||
|
08002fec g F .text 0000013e CAN_FilterInit
|
||||||
|
08005988 g F .text 00000014 RTC_EnterConfigMode
|
||||||
|
080039f0 g F .text 0000000c CRC_GetIDRegister
|
||||||
|
08002338 g F .text 00000008 IrqInterruptEnable
|
||||||
|
0800532c g F .text 00000010 I2C_GetLastEvent
|
||||||
|
08002a60 g F .text 00000016 ADC_DMACmd
|
||||||
|
08003b2c g F .text 0000002c DAC_WaveGenerationCmd
|
||||||
|
08004a38 g F .text 0000002e FSMC_PCCARDCmd
|
||||||
|
08005a98 g F .text 00000014 RTC_ClearFlag
|
||||||
|
08005ce8 g F .text 0000000c SDIO_CommandCompletionCmd
|
||||||
|
08005b64 g F .text 0000001a SDIO_SetPowerState
|
||||||
|
08002608 g F .text 00000006 __get_FAULTMASK
|
||||||
|
080039a8 g F .text 0000002e CRC_CalcBlockCRC
|
||||||
|
08006b70 g F .text 00000016 TIM_OC1PreloadConfig
|
||||||
|
08002aa4 g F .text 0000000a ADC_StartCalibration
|
||||||
|
08002628 g F .text 00000004 __REV
|
||||||
|
080058b0 g F .text 0000000c RCC_MCOConfig
|
||||||
|
08002890 g F .text 00000084 NVIC_Init
|
||||||
|
080052b4 g F .text 00000020 I2C_ARPCmd
|
||||||
|
0800514c g F .text 0000001a I2C_OwnAddress2Config
|
||||||
|
08002d80 g F .text 0000001c ADC_GetITStatus
|
||||||
|
08005fa0 g F .text 00000006 SPI_I2S_ReceiveData
|
||||||
|
08005d58 g F .text 00000074 SPI_I2S_DeInit
|
||||||
|
080032ec g F .text 00000092 CAN_TransmitStatus
|
||||||
|
08003ac8 g F .text 0000003c DAC_SoftwareTriggerCmd
|
||||||
|
08006040 g F .text 00000006 SPI_GetCRCPolynomial
|
||||||
|
0800698c g F .text 00000014 TIM_ETRClockMode2Config
|
||||||
|
08005650 g F .text 00000024 RCC_ITConfig
|
||||||
|
08005a2c g F .text 00000018 RTC_GetDivider
|
||||||
|
08006ca0 g F .text 00000016 TIM_OC1NPolarityConfig
|
||||||
|
08006a90 g F .text 00000016 TIM_ForcedOC1Config
|
||||||
|
080039e4 g F .text 0000000c CRC_SetIDRegister
|
||||||
|
08004454 g F .text 0000003a FLASH_ProgramHalfWord
|
||||||
|
08006944 g F .text 00000018 TIM_DMACmd
|
||||||
|
080069a0 g F .text 0000001e TIM_ETRClockMode1Config
|
||||||
|
08006048 g F .text 0000001c SPI_BiDirectionalLineConfig
|
||||||
|
08002664 g F .text 00000006 __STREXW
|
||||||
|
08003928 g F .text 00000024 CEC_ClearFlag
|
||||||
|
080059b8 g F .text 00000014 RTC_GetCounter
|
||||||
|
08006f74 g F .text 0000001c TIM_SetIC3Prescaler
|
||||||
|
08007554 g F .text 00000020 USART_SmartCardCmd
|
||||||
|
08007630 g F .text 0000000c USART_GetFlagStatus
|
||||||
|
08006c5c g F .text 00000016 TIM_ClearOC3Ref
|
||||||
|
0800264c g F .text 00000006 __LDREXW
|
||||||
|
08007764 g .text 00000000 _etext
|
||||||
|
08005b90 g F .text 00000024 SDIO_ITConfig
|
||||||
|
08002d6c g F .text 0000000c ADC_GetFlagStatus
|
||||||
|
080055e0 g F .text 00000016 RCC_SYSCLKConfig
|
||||||
|
08002bb8 g F .text 00000016 ADC_ExternalTrigConvCmd
|
||||||
|
08003468 g F .text 00000016 CAN_FIFORelease
|
||||||
|
08003dac g F .text 00000040 DMA_Init
|
||||||
|
08004600 g F .text 00000040 FLASH_ErasePage
|
||||||
|
08003ea4 g F .text 00000020 EXTI_DeInit
|
||||||
|
080058f0 g F .text 0000003a RCC_WaitForHSEStartUp
|
||||||
|
08007474 g F .text 0000001c USART_SetAddress
|
||||||
|
08003e3c g F .text 00000006 DMA_GetCurrDataCounter
|
||||||
|
08004e4c g F .text 0000000c GPIO_EventOutputCmd
|
||||||
|
08005cd0 g F .text 0000000c SDIO_SetSDIOOperation
|
||||||
|
08007540 g F .text 00000014 USART_SetPrescaler
|
||||||
|
08003fec g F .text 0000001a FLASH_HalfCycleAccessCmd
|
||||||
|
080025b0 g F .text 00000012 TimerISRHandler
|
||||||
|
08002bfc g F .text 00000016 ADC_InjectedDiscModeCmd
|
||||||
|
08005898 g F .text 0000000c RCC_BackupResetCmd
|
||||||
|
080075d4 g F .text 00000020 USART_OneBitMethodCmd
|
||||||
|
080049d0 g F .text 0000002e FSMC_NORSRAMCmd
|
||||||
|
08003998 g F .text 0000000e CRC_CalcCRC
|
||||||
|
080053d0 g F .text 0000000c IWDG_SetReload
|
||||||
|
080068f8 g F .text 00000028 TIM_CtrlPWMOutputs
|
||||||
|
080051a8 g F .text 00000018 I2C_ITConfig
|
||||||
|
08002914 g F .text 00000016 NVIC_SetVectorTable
|
||||||
|
08002a48 g F .text 00000016 ADC_Cmd
|
||||||
|
080040ec g F .text 00000028 FLASH_GetFlagStatus
|
||||||
|
08003be0 g F .text 00000010 DBGMCU_GetREVID
|
||||||
|
08002e1c g F .text 00000020 BKP_WriteBackupRegister
|
||||||
|
08002d34 g F .text 0000000e ADC_AnalogWatchdogSingleChannelConfig
|
||||||
|
08004e58 g F .text 0000007a GPIO_PinRemapConfig
|
||||||
|
08002ad8 g F .text 00000012 ADC_DiscModeChannelCountConfig
|
||||||
|
080035a4 g F .text 00000008 CAN_GetLSBTransmitErrorCounter
|
||||||
|
080038d8 g F .text 0000000e CEC_ReceiveDataByte
|
||||||
|
080040b8 g F .text 00000010 FLASH_GetPrefetchBufferStatus
|
||||||
|
08007754 g F .text 00000010 WWDG_ClearFlag
|
||||||
|
080058a4 g F .text 0000000c RCC_ClockSecuritySystemCmd
|
||||||
|
08003154 g F .text 0000003e CAN_SlaveStartBank
|
||||||
|
0800592c g F .text 00000012 RCC_ClearFlag
|
||||||
|
080068d8 g F .text 00000020 TIM_Cmd
|
||||||
|
08006bb8 g F .text 00000018 TIM_OC4PreloadConfig
|
||||||
|
20000010 g O .data 00000004 SystemCoreClock
|
||||||
|
080046b0 g F .text 0000003a FSMC_NORSRAMDeInit
|
||||||
|
08002d9c g F .text 00000008 ADC_ClearITPendingBit
|
||||||
|
080045c4 g F .text 0000003c FLASH_EraseAllPages
|
||||||
|
08005d18 g F .text 00000014 SDIO_GetFlagStatus
|
||||||
|
08003380 g F .text 0000002a CAN_CancelTransmit
|
||||||
|
08002634 g F .text 00000006 __RBIT
|
||||||
|
08007514 g F .text 0000000c USART_ReceiveData
|
||||||
|
0800554c g F .text 0000004a RCC_HSEConfig
|
||||||
|
080031ac g F .text 0000005e CAN_TTComModeCmd
|
||||||
|
080071c8 g F .text 0000000a TIM_ClearFlag
|
||||||
|
08004b70 g F .text 00000036 FSMC_GetITStatus
|
||||||
|
080038b4 g F .text 0000000c CEC_OwnAddressConfig
|
||||||
|
08006010 g F .text 00000020 SPI_CalculateCRC
|
||||||
|
080071ec g F .text 0000000a TIM_ClearITPendingBit
|
||||||
|
08002610 g F .text 00000006 __set_FAULTMASK
|
||||||
|
08003e38 g F .text 00000004 DMA_SetCurrDataCounter
|
||||||
|
080071ac g F .text 00000006 TIM_GetCounter
|
||||||
|
08006070 g F .text 0000000a SPI_I2S_ClearFlag
|
||||||
|
08005808 g F .text 00000024 RCC_APB2PeriphClockCmd
|
||||||
|
08005c00 g F .text 0000000e SDIO_GetCommandResponse
|
||||||
|
080050ac g F .text 00000020 I2C_DMACmd
|
||||||
|
0800719c g F .text 00000006 TIM_GetCapture3
|
||||||
|
08005270 g F .text 0000001c I2C_PECPositionConfig
|
||||||
|
08004d00 g F .text 000000c4 GPIO_Init
|
||||||
|
080055bc g F .text 00000018 RCC_PLLConfig
|
||||||
|
08005680 g F .text 00000016 RCC_ADCCLKConfig
|
||||||
|
0800359c g F .text 00000008 CAN_GetReceiveErrorCounter
|
||||||
|
08002a90 g F .text 0000000a ADC_ResetCalibration
|
||||||
|
08007400 g F .text 00000020 USART_Cmd
|
||||||
|
08002d18 g F .text 00000012 ADC_AnalogWatchdogCmd
|
||||||
|
08004ce4 g F .text 0000001a GPIO_AFIODeInit
|
||||||
|
08002e70 g F .text 00000014 BKP_ClearFlag
|
||||||
|
0800718c g F .text 00000006 TIM_GetCapture1
|
||||||
|
0800394c g F .text 00000018 CEC_GetITStatus
|
||||||
|
08007610 g F .text 00000020 USART_IrDACmd
|
||||||
|
08002950 g F .text 0000001a SysTick_CLKSourceConfig
|
||||||
|
08004e14 g F .text 00000004 GPIO_Write
|
||||||
|
0800408c g F .text 00000010 FLASH_GetUserOptionByte
|
||||||
|
08004df8 g F .text 00000006 GPIO_ReadOutputData
|
||||||
|
08006728 g F .text 000000aa TIM_OC3Init
|
||||||
|
08005698 g F .text 0000003a RCC_LSEConfig
|
||||||
|
0800528c g F .text 00000020 I2C_CalculatePEC
|
||||||
|
0800769c g F .text 00000016 USART_ClearITPendingBit
|
||||||
|
080056f4 g F .text 0000000c RCC_RTCCLKCmd
|
||||||
|
08002c5c g F .text 0000006e ADC_InjectedChannelConfig
|
||||||
|
08003e90 g F .text 00000014 DMA_ClearITPendingBit
|
||||||
|
08006234 g F .text 00000280 TIM_DeInit
|
||||||
|
0800582c g F .text 00000024 RCC_APB1PeriphClockCmd
|
||||||
|
080041dc g F .text 00000074 FLASH_UserOptionByteConfig
|
||||||
|
080035c0 g F .text 0000007c CAN_GetFlagStatus
|
||||||
|
08005940 g F .text 00000014 RCC_GetITStatus
|
||||||
|
08005460 g F .text 0000000c PWR_WakeUpPinCmd
|
||||||
|
08004990 g F .text 00000040 FSMC_PCCARDStructInit
|
||||||
|
08002618 g F .text 00000006 __get_CONTROL
|
||||||
|
0800607c g F .text 00000032 SPI_I2S_GetITStatus
|
||||||
|
080071bc g F .text 0000000c TIM_GetFlagStatus
|
||||||
|
08006064 g F .text 0000000c SPI_I2S_GetFlagStatus
|
||||||
|
080057e4 g F .text 00000024 RCC_AHBPeriphClockCmd
|
||||||
|
08002b04 g F .text 000000b4 ADC_RegularChannelConfig
|
||||||
|
08006c00 g F .text 00000016 TIM_OC3FastConfig
|
||||||
|
080051c0 g F .text 00000004 I2C_SendData
|
||||||
|
08004674 g F .text 0000003c FLASH_EraseAllBank1Pages
|
||||||
|
08002bd0 g F .text 00000006 ADC_GetConversionValue
|
||||||
|
08002eb4 g F .text 00000042 CAN_DeInit
|
||||||
|
08006b30 g F .text 00000020 TIM_SelectCCDMA
|
||||||
|
080038f8 g F .text 0000000c CEC_EndOfMessageCmd
|
||||||
|
080040c8 g F .text 00000024 FLASH_ITConfig
|
||||||
|
080075b4 g F .text 00000020 USART_OverSampling8Cmd
|
||||||
|
08003b04 g F .text 00000026 DAC_DualSoftwareTriggerCmd
|
||||||
|
08003dec g F .text 0000001c DMA_StructInit
|
||||||
|
08007170 g F .text 0000001c TIM_SetClockDivision
|
||||||
|
08005f3c g F .text 00000020 I2S_Cmd
|
||||||
|
080059ec g F .text 00000020 RTC_SetPrescaler
|
||||||
|
08004954 g F .text 0000003c FSMC_NANDStructInit
|
||||||
|
08005fc8 g F .text 00000020 SPI_SSOutputCmd
|
||||||
|
08005fe8 g F .text 0000001c SPI_DataSizeConfig
|
||||||
|
08004064 g F .text 00000012 FLASH_Lock
|
||||||
|
080053dc g F .text 00000010 IWDG_ReloadCounter
|
||||||
|
08004f68 g F .text 00000104 I2C_Init
|
||||||
|
08003e44 g F .text 0000001c DMA_GetFlagStatus
|
||||||
|
08002d2c g F .text 00000006 ADC_AnalogWatchdogThresholdsConfig
|
||||||
|
08003fc8 g F .text 0000000c EXTI_ClearITPendingBit
|
||||||
|
08002dc4 g F .text 0000000c BKP_TamperPinCmd
|
||||||
|
08005430 g F .text 0000000c PWR_BackupAccessCmd
|
||||||
|
080025c8 g F .text 00000008 __get_PSP
|
||||||
|
08002ab0 g F .text 00000008 ADC_GetCalibrationStatus
|
||||||
|
20000080 g .bss 00000000 _ebss
|
||||||
|
08003548 g F .text 0000001c CAN_Sleep
|
||||||
|
08007648 g F .text 00000054 USART_GetITStatus
|
||||||
|
08005c74 g F .text 0000000c SDIO_GetDataCounter
|
||||||
|
080025d0 g F .text 00000006 __set_PSP
|
||||||
|
08004510 g F .text 000000b4 FLASH_EraseOptionBytes
|
||||||
|
08005a0c g F .text 00000020 RTC_SetAlarm
|
||||||
|
080065a4 g F .text 000000d2 TIM_OC1Init
|
||||||
|
08002ab8 g F .text 00000016 ADC_SoftwareStartConvCmd
|
||||||
|
08006ba0 g F .text 00000016 TIM_OC3PreloadConfig
|
||||||
|
08002a9c g F .text 00000008 ADC_GetResetCalibrationStatus
|
||||||
|
08005ca0 g F .text 0000000c SDIO_GetFIFOCount
|
||||||
|
08004de4 g F .text 00000006 GPIO_ReadInputData
|
||||||
|
08006eb8 g F .text 00000004 TIM_SetAutoreload
|
||||||
|
080074cc g F .text 0000001c USART_LINBreakDetectLengthConfig
|
||||||
|
08005a58 g F .text 0000002a RTC_WaitForSynchro
|
||||||
|
00000100 g *ABS* 00000000 __STACKSIZE__
|
||||||
|
080058bc g F .text 00000032 RCC_GetFlagStatus
|
||||||
|
080025c4 g F .text 00000002 UnusedISR
|
||||||
|
08005b58 g F .text 0000000c SDIO_ClockCmd
|
||||||
|
08002da4 g F .text 00000014 BKP_DeInit
|
||||||
|
0800237c g F .text 0000003a LedInit
|
||||||
|
08004640 g F .text 00000032 FLASH_WaitForLastBank1Operation
|
||||||
|
08005cdc g F .text 0000000c SDIO_SendSDIOSuspendCmd
|
||||||
|
08003498 g F .text 000000ae CAN_OperatingModeRequest
|
||||||
|
08005cac g F .text 0000000c SDIO_StartSDIOReadWait
|
||||||
|
08005c2c g F .text 00000030 SDIO_DataConfig
|
||||||
|
08004e00 g F .text 00000004 GPIO_SetBits
|
||||||
|
08003f88 g F .text 00000014 EXTI_GetFlagStatus
|
||||||
|
08002c14 g F .text 0000000e ADC_ExternalTrigInjectedConvConfig
|
||||||
|
080055f8 g F .text 00000010 RCC_GetSYSCLKSource
|
||||||
|
08006af0 g F .text 00000020 TIM_ARRPreloadConfig
|
||||||
|
08004e08 g F .text 0000000a GPIO_WriteBit
|
||||||
|
08002e84 g F .text 0000000e BKP_GetITStatus
|
||||||
|
08002be4 g F .text 00000016 ADC_AutoInjectedConvCmd
|
||||||
|
080059cc g F .text 00000020 RTC_SetCounter
|
||||||
|
08002c3c g F .text 00000016 ADC_SoftwareStartInjectedConvCmd
|
||||||
|
08005d38 g F .text 00000014 SDIO_GetITStatus
|
||||||
|
080050ec g F .text 00000020 I2C_GenerateSTART
|
||||||
|
0800506c g F .text 0000001e I2C_StructInit
|
||||||
|
08002e94 g F .text 00000014 BKP_ClearITPendingBit
|
||||||
|
08007724 g F .text 00000010 WWDG_SetCounter
|
||||||
|
0800263c g F .text 00000008 __LDREXB
|
||||||
|
08004f18 g F .text 0000000c GPIO_ETH_MediaInterfaceConfig
|
||||||
|
080071d4 g F .text 00000018 TIM_GetITStatus
|
||||||
|
08005700 g F .text 000000e4 RCC_GetClocksFreq
|
||||||
|
08004008 g F .text 0000001a FLASH_PrefetchBufferCmd
|
||||||
|
08006d80 g F .text 00000062 TIM_SelectOCxM
|
||||||
|
08005218 g F .text 0000001c I2C_NACKPositionConfig
|
||||||
|
08002360 g F .text 0000001c IrqInterruptRestore
|
||||||
|
08003f74 g F .text 00000012 EXTI_GenerateSWInterrupt
|
||||||
|
080072b8 g F .text 000000f0 USART_Init
|
||||||
|
08004a00 g F .text 00000036 FSMC_NANDCmd
|
||||||
|
08004b14 g F .text 0000002a FSMC_GetFlagStatus
|
||||||
|
08004ab8 g F .text 0000005a FSMC_ITConfig
|
||||||
|
080033ac g F .text 000000ba CAN_Receive
|
||||||
|
0800363c g F .text 0000003c CAN_ClearFlag
|
||||||
|
08002ef8 g F .text 000000f4 CAN_Init
|
||||||
|
20000028 g .bss 00000000 _bss
|
||||||
|
080025f8 g F .text 00000006 __get_PRIMASK
|
||||||
|
08006bd0 g F .text 00000016 TIM_OC1FastConfig
|
||||||
|
080038e8 g F .text 00000010 CEC_StartOfMessage
|
||||||
|
080053b8 g F .text 0000000c IWDG_WriteAccessCmd
|
||||||
|
08004120 g F .text 00000044 FLASH_GetStatus
|
||||||
|
0800312c g F .text 00000028 CAN_StructInit
|
||||||
|
20000000 g O .data 00000010 AHBPrescTable
|
||||||
|
08007594 g F .text 00000020 USART_HalfDuplexCmd
|
||||||
|
08003f9c g F .text 0000000c EXTI_ClearFlag
|
||||||
|
08003c04 g F .text 00000024 DBGMCU_Config
|
||||||
|
0800533c g F .text 00000040 I2C_GetFlagStatus
|
||||||
|
08004114 g F .text 0000000c FLASH_ClearFlag
|
||||||
|
080050cc g F .text 00000020 I2C_DMALastTransferCmd
|
||||||
|
080041a8 g F .text 00000032 FLASH_WaitForLastOperation
|
||||||
|
08006b88 g F .text 00000018 TIM_OC2PreloadConfig
|
||||||
|
080056e0 g F .text 00000012 RCC_RTCCLKConfig
|
||||||
|
080069e0 g F .text 00000016 TIM_SelectInputTrigger
|
||||||
|
08005cc4 g F .text 0000000c SDIO_SetSDIOReadWaitMode
|
||||||
|
08006920 g F .text 00000018 TIM_ITConfig
|
||||||
|
08005234 g F .text 0000001c I2C_SMBusAlertConfig
|
||||||
|
08006678 g F .text 000000ae TIM_OC2Init
|
||||||
|
080053ec g F .text 00000010 IWDG_Enable
|
||||||
|
08007420 g F .text 0000003a USART_ITConfig
|
||||||
|
08003ba0 g F .text 00000018 DAC_SetDualChannelData
|
||||||
|
08003ec4 g F .text 0000009c EXTI_Init
|
||||||
|
08002630 g F .text 00000004 __REVSH
|
||||||
|
080039d8 g F .text 0000000c CRC_GetCRC
|
||||||
|
080039fc g F .text 0000001c DAC_DeInit
|
||||||
|
08003b58 g F .text 00000024 DAC_SetChannel1Data
|
||||||
|
08004ba8 g F .text 0000002e FSMC_ClearITPendingBit
|
||||||
|
080069c0 g F .text 00000006 TIM_PrescalerConfig
|
||||||
|
08005fa8 g F .text 0000001e SPI_NSSInternalSoftwareConfig
|
||||||
|
08004f24 g F .text 00000042 I2C_DeInit
|
||||||
|
08005cf4 g F .text 00000016 SDIO_CEATAITCmd
|
||||||
|
0800508c g F .text 00000020 I2C_Cmd
|
||||||
|
08005aac g F .text 00000028 RTC_GetITStatus
|
||||||
|
08004e04 g F .text 00000004 GPIO_ResetBits
|
||||||
|
08006d18 g F .text 00000018 TIM_OC4PolarityConfig
|
||||||
|
08006e60 g F .text 0000001c TIM_SelectOutputTrigger
|
||||||
|
0800537c g F .text 0000000a I2C_ClearFlag
|
||||||
|
08005d0c g F .text 0000000c SDIO_SendCEATACmd
|
||||||
|
08006004 g F .text 0000000c SPI_TransmitCRC
|
||||||
|
080043f8 g F .text 0000005a FLASH_ProgramOptionByteData
|
||||||
|
080076d0 g F .text 00000016 WWDG_SetPrescaler
|
||||||
|
080075f4 g F .text 0000001c USART_IrDAConfig
|
||||||
|
08006ec4 g F .text 00000004 TIM_SetCompare3
|
||||||
|
080035ac g F .text 00000014 CAN_ITConfig
|
||||||
|
080067d4 g F .text 0000008c TIM_OC4Init
|
||||||
|
08005b44 g F .text 00000012 SDIO_StructInit
|
||||||
|
08005bc0 g F .text 00000030 SDIO_SendCommand
|
||||||
|
08002ad0 g F .text 00000008 ADC_GetSoftwareStartConvStatus
|
||||||
|
08004730 g F .text 000000da FSMC_NORSRAMInit
|
||||||
|
08006e24 g F .text 00000020 TIM_SelectHallSensor
|
||||||
|
08007714 g F .text 00000010 WWDG_EnableIT
|
||||||
|
08003564 g F .text 0000002e CAN_WakeUp
|
||||||
|
08002bd8 g F .text 0000000c ADC_GetDualModeConversionValue
|
||||||
|
08004ed4 g F .text 00000042 GPIO_EXTILineConfig
|
||||||
|
08003b7c g F .text 00000024 DAC_SetChannel2Data
|
||||||
|
080051cc g F .text 00000010 I2C_Send7bitAddress
|
||||||
|
08005d4c g F .text 0000000c SDIO_ClearITPendingBit
|
||||||
|
08006ed0 g F .text 0000001c TIM_SetIC1Prescaler
|
||||||
|
080071f8 g F .text 000000c0 USART_DeInit
|
||||||
|
08005f04 g F .text 00000016 I2S_StructInit
|
||||||
|
080076e8 g F .text 0000002c WWDG_SetWindowValue
|
||||||
|
08005c80 g F .text 0000000e SDIO_ReadData
|
||||||
|
080052f4 g F .text 0000001c I2C_FastModeDutyCycleConfig
|
||||||
|
08003fa8 g F .text 00000020 EXTI_GetITStatus
|
||||||
|
08006ad8 g F .text 00000018 TIM_ForcedOC4Config
|
||||||
|
0800546c g F .text 00000044 PWR_EnterSTOPMode
|
||||||
|
08005bb4 g F .text 0000000c SDIO_DMACmd
|
||||||
|
08003fd4 g F .text 00000016 FLASH_SetLatency
|
||||||
|
08005598 g F .text 00000016 RCC_AdjustHSICalibrationValue
|
||||||
|
08002428 g F .text 00000136 main
|
||||||
|
080060b0 g F .text 00000016 SPI_I2S_ClearITPendingBit
|
||||||
|
08005bf0 g F .text 00000010 SDIO_CmdStructInit
|
||||||
|
080073c4 g F .text 0000002c USART_ClockInit
|
||||||
|
08006a2c g F .text 00000014 TIM_ITRxExternalClockConfig
|
||||||
|
08006ce8 g F .text 00000018 TIM_OC3PolarityConfig
|
||||||
|
0800480c g F .text 00000068 FSMC_NANDInit
|
||||||
|
08007744 g F .text 0000000e WWDG_GetFlagStatus
|
||||||
|
08007520 g F .text 0000000c USART_SendBreak
|
||||||
|
08005f84 g F .text 00000018 SPI_I2S_DMACmd
|
||||||
|
08002620 g F .text 00000006 __set_CONTROL
|
||||||
|
0800695c g F .text 00000012 TIM_InternalClockConfig
|
||||||
|
08006c88 g F .text 00000016 TIM_OC1PolarityConfig
|
||||||
|
08006be8 g F .text 00000018 TIM_OC2FastConfig
|
||||||
|
08005620 g F .text 00000016 RCC_PCLK1Config
|
||||||
|
080038cc g F .text 0000000c CEC_SendDataByte
|
||||||
|
08003f60 g F .text 00000012 EXTI_StructInit
|
||||||
|
08005c10 g F .text 0000001c SDIO_GetResponse
|
||||||
|
080053fc g F .text 00000014 IWDG_GetFlagStatus
|
||||||
|
08006eb4 g F .text 00000004 TIM_SetCounter
|
||||||
|
08005674 g F .text 0000000c RCC_USBCLKConfig
|
||||||
|
08003480 g F .text 00000018 CAN_MessagePending
|
||||||
|
08002560 g F .text 0000000c TimerSet
|
||||||
|
08005638 g F .text 00000016 RCC_PCLK2Config
|
||||||
|
08003904 g F .text 00000022 CEC_GetFlagStatus
|
||||||
|
08006ec8 g F .text 00000006 TIM_SetCompare4
|
||||||
|
08005188 g F .text 00000020 I2C_GeneralCallCmd
|
||||||
|
08007194 g F .text 00000006 TIM_GetCapture2
|
||||||
|
08005f1c g F .text 00000020 SPI_Cmd
|
||||||
|
080025d8 g F .text 00000008 __get_MSP
|
||||||
|
0800763c g F .text 0000000a USART_ClearFlag
|
||||||
|
080071b4 g F .text 00000006 TIM_GetPrescaler
|
||||||
|
08002188 g F .text 0000009a BootComInit
|
||||||
|
08006c48 g F .text 00000014 TIM_ClearOC2Ref
|
||||||
|
080051f8 g F .text 00000020 I2C_SoftwareResetCmd
|
||||||
|
0800266c g F .text 00000130 SystemInit
|
||||||
|
08004a68 g F .text 00000036 FSMC_NANDECCCmd
|
||||||
|
08006fb0 g F .text 000001c0 TIM_ICInit
|
||||||
|
08004bd8 g F .text 0000010c GPIO_DeInit
|
||||||
|
08003a50 g F .text 0000000e DAC_StructInit
|
||||||
|
08002ccc g F .text 00000012 ADC_InjectedSequencerLengthConfig
|
||||||
|
08005508 g F .text 00000044 RCC_DeInit
|
||||||
|
08005414 g F .text 0000001c PWR_DeInit
|
||||||
|
080068b0 g F .text 00000014 TIM_ICStructInit
|
||||||
|
08006f0c g F .text 00000066 TIM_PWMIConfig
|
||||||
|
08005c5c g F .text 00000016 SDIO_DataStructInit
|
||||||
|
08004078 g F .text 00000012 FLASH_LockBank1
|
||||||
|
08003964 g F .text 00000024 CEC_ClearITPendingBit
|
||||||
|
08003bf0 g F .text 00000014 DBGMCU_GetDEVID
|
||||||
|
08002a30 g F .text 00000016 ADC_StructInit
|
||||||
|
0800262c g F .text 00000004 __REV16
|
||||||
|
08002a78 g F .text 00000016 ADC_ITConfig
|
||||||
|
08006cd0 g F .text 00000018 TIM_OC2NPolarityConfig
|
||||||
|
0800292c g F .text 00000024 NVIC_SystemLPConfig
|
||||||
|
08006c30 g F .text 00000016 TIM_ClearOC1Ref
|
||||||
|
08004874 g F .text 00000070 FSMC_PCCARDInit
|
||||||
|
08002e3c g F .text 00000022 BKP_ReadBackupRegister
|
||||||
|
08005874 g F .text 00000024 RCC_APB1PeriphResetCmd
|
||||||
|
08002d78 g F .text 00000008 ADC_ClearFlag
|
||||||
|
20000000 g .data 00000000 _data
|
||||||
|
080025e0 g F .text 00000006 __set_MSP
|
||||||
|
080023b8 g F .text 00000070 LedToggle
|
||||||
|
08003e24 g F .text 00000014 DMA_ITConfig
|
||||||
|
08002dfc g F .text 0000001e BKP_SetRTCCalibrationValue
|
||||||
|
080046ec g F .text 00000022 FSMC_NANDDeInit
|
||||||
|
08005388 g F .text 00000022 I2C_GetITStatus
|
||||||
|
08006e04 g F .text 00000020 TIM_UpdateRequestConfig
|
||||||
|
08006ac0 g F .text 00000016 TIM_ForcedOC3Config
|
||||||
|
080069f8 g F .text 00000034 TIM_TIxExternalClockConfig
|
||||||
|
080052d4 g F .text 00000020 I2C_StretchClockCmd
|
||||||
|
08007490 g F .text 0000001c USART_WakeUpConfig
|
||||||
|
08004dc4 g F .text 00000014 GPIO_StructInit
|
||||||
|
0800296c g F .text 00000074 ADC_DeInit
|
||||||
|
080068c4 g F .text 00000014 TIM_BDTRStructInit
|
||||||
|
08006898 g F .text 00000016 TIM_OCStructInit
|
||||||
|
080040a8 g F .text 00000010 FLASH_GetReadOutProtectionStatus
|
||||||
|
08006d00 g F .text 00000018 TIM_OC3NPolarityConfig
|
||||||
|
08002c24 g F .text 00000016 ADC_ExternalTrigInjectedConvCmd
|
||||||
|
080029e0 g F .text 00000050 ADC_Init
|
||||||
|
08007508 g F .text 0000000c USART_SendData
|
||||||
|
20000180 g .bss 00000000 _estack
|
||||||
|
08006d58 g F .text 00000026 TIM_CCxNCmd
|
||||||
|
08003848 g F .text 0000001c CEC_DeInit
|
||||||
|
08002ce0 g F .text 00000018 ADC_SetInjectedOffset
|
||||||
|
08003a94 g F .text 00000034 DAC_DMACmd
|
||||||
|
08005a44 g F .text 00000012 RTC_WaitForLastTask
|
||||||
|
080025f0 g F .text 00000006 __set_BASEPRI
|
||||||
|
08006e98 g F .text 0000001c TIM_SelectMasterSlaveMode
|
||||||
|
080051dc g F .text 0000001a I2C_ReadRegister
|
||||||
|
08002d44 g F .text 00000026 ADC_TempSensorVrefintCmd
|
||||||
|
08006030 g F .text 0000000e SPI_GetCRC
|
||||||
|
20000028 g .data 00000000 _edata
|
||||||
|
080074ac g F .text 00000020 USART_ReceiverWakeUpCmd
|
||||||
|
080071a4 g F .text 00000008 TIM_GetCapture4
|
||||||
|
08003bb8 g F .text 00000028 DAC_GetDataOutputValue
|
||||||
|
080073a8 g F .text 0000001a USART_StructInit
|
||||||
|
08007734 g F .text 00000010 WWDG_Enable
|
||||||
|
08003194 g F .text 00000016 CAN_DBGFreeze
|
||||||
|
080076b4 g F .text 0000001c WWDG_DeInit
|
||||||
|
08003a60 g F .text 00000034 DAC_Cmd
|
||||||
|
08002e60 g F .text 0000000e BKP_GetFlagStatus
|
||||||
|
080064b4 g F .text 000000f0 TIM_TimeBaseInit
|
||||||
|
08002000 g O .text 00000154 _vectab
|
||||||
|
08002cf8 g F .text 0000001e ADC_GetInjectedConversionValue
|
||||||
|
080054e0 g F .text 00000014 PWR_GetFlagStatus
|
||||||
|
08003864 g F .text 00000024 CEC_Init
|
||||||
|
08003a18 g F .text 00000036 DAC_Init
|
||||||
|
08005a84 g F .text 00000014 RTC_GetFlagStatus
|
||||||
|
08003594 g F .text 00000008 CAN_GetLastErrorCode
|
||||||
|
08007574 g F .text 00000020 USART_SmartCardNACKCmd
|
||||||
|
08005448 g F .text 00000016 PWR_PVDLevelConfig
|
||||||
|
0800599c g F .text 0000001a RTC_ExitConfigMode
|
||||||
|
080052ac g F .text 00000008 I2C_GetPEC
|
||||||
|
0800265c g F .text 00000006 __STREXH
|
||||||
|
0800279c g F .text 000000e0 SystemCoreClockUpdate
|
||||||
|
080048e4 g F .text 00000070 FSMC_NORSRAMStructInit
|
||||||
|
080074e8 g F .text 00000020 USART_LINCmd
|
||||||
|
08005ad4 g F .text 00000014 RTC_ClearITPendingBit
|
||||||
|
08002db8 g F .text 0000000c BKP_TamperPinLevelConfig
|
||||||
|
0800693c g F .text 00000008 TIM_DMAConfig
|
||||||
|
08002aec g F .text 00000016 ADC_DiscModeCmd
|
||||||
|
08005f5c g F .text 00000026 SPI_I2S_ITConfig
|
||||||
|
08003988 g F .text 00000010 CRC_ResetDR
|
||||||
|
08002644 g F .text 00000008 __LDREXH
|
||||||
|
08002340 g F .text 0000001e IrqInterruptDisable
|
||||||
|
08006938 g F .text 00000004 TIM_GenerateEvent
|
||||||
|
08005168 g F .text 00000020 I2C_DualAddressCmd
|
||||||
|
08005960 g F .text 00000028 RTC_ITConfig
|
||||||
|
08003e60 g F .text 00000014 DMA_ClearFlag
|
||||||
|
08002224 g F .text 000000ac BootComCheckActivationRequest
|
||||||
|
08005b10 g F .text 00000034 SDIO_Init
|
||||||
|
08006860 g F .text 00000024 TIM_BDTRConfig
|
||||||
|
080053c4 g F .text 0000000c IWDG_SetPrescaler
|
||||||
|
08004310 g F .text 000000e8 FLASH_EnableWriteProtection
|
||||||
|
080054f4 g F .text 00000012 PWR_ClearFlag
|
||||||
|
08004e18 g F .text 00000010 GPIO_PinLockConfig
|
||||||
|
080056d4 g F .text 0000000c RCC_LSICmd
|
||||||
|
0800512c g F .text 00000020 I2C_AcknowledgeConfig
|
||||||
|
08006eec g F .text 0000001e TIM_SetIC2Prescaler
|
||||||
|
08006970 g F .text 0000001a TIM_ETRConfig
|
||||||
|
080025e8 g F .text 00000006 __get_BASEPRI
|
||||||
|
20000080 g .bss 00000000 _stack
|
||||||
|
080073f0 g F .text 0000000e USART_ClockStructInit
|
||||||
|
08005310 g F .text 0000001a I2C_CheckEvent
|
||||||
|
08005850 g F .text 00000024 RCC_APB2PeriphResetCmd
|
||||||
|
08006e7c g F .text 0000001c TIM_SelectSlaveMode
|
||||||
|
0800510c g F .text 00000020 I2C_GenerateSTOP
|
||||||
|
08005ee8 g F .text 0000001c SPI_StructInit
|
||||||
|
08005dcc g F .text 00000048 SPI_Init
|
||||||
|
0800287c g F .text 00000014 NVIC_PriorityGroupConfig
|
||||||
|
080025a4 g F .text 0000000c TimerGet
|
||||||
|
08005b80 g F .text 00000010 SDIO_GetPowerState
|
||||||
|
08003c28 g F .text 00000182 DMA_DeInit
|
||||||
|
08002dd0 g F .text 0000000c BKP_ITConfig
|
||||||
|
080038c0 g F .text 0000000c CEC_SetPrescaler
|
||||||
|
08006c74 g F .text 00000014 TIM_ClearOC4Ref
|
||||||
|
08006e44 g F .text 0000001c TIM_SelectOnePulseMode
|
||||||
|
08002654 g F .text 00000006 __STREXB
|
||||||
|
08006a40 g F .text 0000004e TIM_EncoderInterfaceConfig
|
||||||
|
08002c54 g F .text 00000008 ADC_GetSoftwareStartInjectedConvCmdStatus
|
||||||
|
080053ac g F .text 0000000a I2C_ClearITPendingBit
|
||||||
|
08006ebc g F .text 00000004 TIM_SetCompare1
|
||||||
|
08006cb8 g F .text 00000018 TIM_OC2PolarityConfig
|
||||||
|
08006de4 g F .text 00000020 TIM_UpdateDisableConfig
|
||||||
|
08004dd8 g F .text 0000000c GPIO_ReadInputDataBit
|
||||||
|
08004164 g F .text 00000044 FLASH_GetBank1Status
|
||||||
|
0800745c g F .text 00000018 USART_DMACmd
|
||||||
|
0800256c g F .text 00000036 TimerInit
|
||||||
|
08006c18 g F .text 00000018 TIM_OC4FastConfig
|
||||||
|
08005c90 g F .text 0000000e SDIO_WriteData
|
||||||
|
0800320c g F .text 000000e0 CAN_Transmit
|
||||||
|
080038a8 g F .text 0000000c CEC_ITConfig
|
||||||
|
08005e14 g F .text 000000d2 I2S_Init
|
||||||
|
0800543c g F .text 0000000c PWR_PVDCmd
|
||||||
|
08005608 g F .text 00000016 RCC_HCLKConfig
|
||||||
|
08004044 g F .text 0000001e FLASH_UnlockBank1
|
||||||
|
08004b40 g F .text 0000002e FSMC_ClearFlag
|
||||||
|
080069c8 g F .text 00000016 TIM_CounterModeConfig
|
||||||
|
08005ae8 g F .text 00000028 SDIO_DeInit
|
||||||
|
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,375 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: demo program bootloader interface source file
|
||||||
|
| File Name: boot.c
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "header.h" /* generic header */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BootActivate
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Bootloader activation function.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
static void BootActivate(void)
|
||||||
|
{
|
||||||
|
void (*pEntryFromProgFnc)(void);
|
||||||
|
|
||||||
|
/* set pointer to the address of function EntryFromProg in the bootloader. note that
|
||||||
|
* 1 is added to this address to enable a switch from Thumb2 to Thumb mode
|
||||||
|
*/
|
||||||
|
pEntryFromProgFnc = (void*)0x08000150 + 1;
|
||||||
|
/* call EntryFromProg to activate the bootloader. */
|
||||||
|
pEntryFromProgFnc();
|
||||||
|
} /*** end of BootActivate ***/
|
||||||
|
|
||||||
|
|
||||||
|
#if (BOOT_COM_UART_ENABLE > 0)
|
||||||
|
/****************************************************************************************
|
||||||
|
* U N I V E R S A L A S Y N C H R O N O U S R X T X I N T E R F A C E
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Macro definitions
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Function prototypes
|
||||||
|
****************************************************************************************/
|
||||||
|
static unsigned char UartReceiveByte(unsigned char *data);
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BootComInit
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Initializes the UART communication interface
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void BootComInit(void)
|
||||||
|
{
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct;
|
||||||
|
USART_InitTypeDef USART_InitStruct;
|
||||||
|
|
||||||
|
/* enable UART peripheral clock */
|
||||||
|
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
|
||||||
|
/* enable GPIO peripheral clock for transmitter and receiver pins */
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE);
|
||||||
|
/* configure USART Tx as alternate function push-pull */
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||||
|
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_2;
|
||||||
|
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
|
||||||
|
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
/* Configure USART Rx as alternate function input floating */
|
||||||
|
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
||||||
|
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_3;
|
||||||
|
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||||
|
/* configure UART communcation parameters */
|
||||||
|
USART_InitStruct.USART_BaudRate = BOOT_COM_UART_BAUDRATE;
|
||||||
|
USART_InitStruct.USART_WordLength = USART_WordLength_8b;
|
||||||
|
USART_InitStruct.USART_StopBits = USART_StopBits_1;
|
||||||
|
USART_InitStruct.USART_Parity = USART_Parity_No;
|
||||||
|
USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||||
|
USART_InitStruct.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||||
|
USART_Init(USART2, &USART_InitStruct);
|
||||||
|
/* enable UART */
|
||||||
|
USART_Cmd(USART2, ENABLE);
|
||||||
|
} /*** end of BootComInit ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BootComCheckActivationRequest
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Receives the CONNECT request from the host, which indicates that the
|
||||||
|
** bootloader should be activated and, if so, activates it.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void BootComCheckActivationRequest(void)
|
||||||
|
{
|
||||||
|
static unsigned char xcpCtoReqPacket[BOOT_COM_UART_RX_MAX_DATA+1];
|
||||||
|
static unsigned char xcpCtoRxLength;
|
||||||
|
static unsigned char xcpCtoRxInProgress = 0;
|
||||||
|
|
||||||
|
/* start of cto packet received? */
|
||||||
|
if (xcpCtoRxInProgress == 0)
|
||||||
|
{
|
||||||
|
/* store the message length when received */
|
||||||
|
if (UartReceiveByte(&xcpCtoReqPacket[0]) == 1)
|
||||||
|
{
|
||||||
|
/* indicate that a cto packet is being received */
|
||||||
|
xcpCtoRxInProgress = 1;
|
||||||
|
|
||||||
|
/* reset packet data count */
|
||||||
|
xcpCtoRxLength = 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* store the next packet byte */
|
||||||
|
if (UartReceiveByte(&xcpCtoReqPacket[xcpCtoRxLength+1]) == 1)
|
||||||
|
{
|
||||||
|
/* increment the packet data count */
|
||||||
|
xcpCtoRxLength++;
|
||||||
|
|
||||||
|
/* check to see if the entire packet was received */
|
||||||
|
if (xcpCtoRxLength == xcpCtoReqPacket[0])
|
||||||
|
{
|
||||||
|
/* done with cto packet reception */
|
||||||
|
xcpCtoRxInProgress = 0;
|
||||||
|
|
||||||
|
/* check if this was an XCP CONNECT command */
|
||||||
|
if ((xcpCtoReqPacket[1] == 0xff) && (xcpCtoReqPacket[2] == 0x00))
|
||||||
|
{
|
||||||
|
/* connection request received so start the bootloader */
|
||||||
|
BootActivate();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
} /*** end of BootComCheckActivationRequest ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: UartReceiveByte
|
||||||
|
** PARAMETER: data pointer to byte where the data is to be stored.
|
||||||
|
** RETURN VALUE: 1 if a byte was received, 0 otherwise.
|
||||||
|
** DESCRIPTION: Receives a communication interface byte if one is present.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
static unsigned char UartReceiveByte(unsigned char *data)
|
||||||
|
{
|
||||||
|
/* check flag to see if a byte was received */
|
||||||
|
if (USART_GetFlagStatus(USART2, USART_FLAG_RXNE) == SET)
|
||||||
|
{
|
||||||
|
/* retrieve and store the newly received byte */
|
||||||
|
*data = (unsigned char)USART_ReceiveData(USART2);
|
||||||
|
/* all done */
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
/* still here to no new byte received */
|
||||||
|
return 0;
|
||||||
|
} /*** end of UartReceiveByte ***/
|
||||||
|
#endif /* BOOT_COM_UART_ENABLE > 0 */
|
||||||
|
|
||||||
|
|
||||||
|
#if (BOOT_COM_CAN_ENABLE > 0)
|
||||||
|
/****************************************************************************************
|
||||||
|
* C O N T R O L L E R A R E A N E T W O R K I N T E R F A C E
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Macro definitions
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Type definitions
|
||||||
|
****************************************************************************************/
|
||||||
|
typedef struct t_can_bus_timing
|
||||||
|
{
|
||||||
|
unsigned char tseg1; /* CAN time segment 1 */
|
||||||
|
unsigned char tseg2; /* CAN time segment 2 */
|
||||||
|
} tCanBusTiming; /* bus timing structure type */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Local constant declarations
|
||||||
|
****************************************************************************************/
|
||||||
|
/* According to the CAN protocol 1 bit-time can be made up of between 8..25 time quanta
|
||||||
|
* (TQ). The total TQ in a bit is SYNC + TSEG1 + TSEG2 with SYNC always being 1.
|
||||||
|
* The sample point is (SYNC + TSEG1) / (SYNC + TSEG1 + SEG2) * 100%. This array contains
|
||||||
|
* possible and valid time quanta configurations with a sample point between 68..78%.
|
||||||
|
*/
|
||||||
|
static const tCanBusTiming canTiming[] =
|
||||||
|
{ /* TQ | TSEG1 | TSEG2 | SP */
|
||||||
|
/* ------------------------- */
|
||||||
|
{ 5, 2 }, /* 8 | 5 | 2 | 75% */
|
||||||
|
{ 6, 2 }, /* 9 | 6 | 2 | 78% */
|
||||||
|
{ 6, 3 }, /* 10 | 6 | 3 | 70% */
|
||||||
|
{ 7, 3 }, /* 11 | 7 | 3 | 73% */
|
||||||
|
{ 8, 3 }, /* 12 | 8 | 3 | 75% */
|
||||||
|
{ 9, 3 }, /* 13 | 9 | 3 | 77% */
|
||||||
|
{ 9, 4 }, /* 14 | 9 | 4 | 71% */
|
||||||
|
{ 10, 4 }, /* 15 | 10 | 4 | 73% */
|
||||||
|
{ 11, 4 }, /* 16 | 11 | 4 | 75% */
|
||||||
|
{ 12, 4 }, /* 17 | 12 | 4 | 76% */
|
||||||
|
{ 12, 5 }, /* 18 | 12 | 5 | 72% */
|
||||||
|
{ 13, 5 }, /* 19 | 13 | 5 | 74% */
|
||||||
|
{ 14, 5 }, /* 20 | 14 | 5 | 75% */
|
||||||
|
{ 15, 5 }, /* 21 | 15 | 5 | 76% */
|
||||||
|
{ 15, 6 }, /* 22 | 15 | 6 | 73% */
|
||||||
|
{ 16, 6 }, /* 23 | 16 | 6 | 74% */
|
||||||
|
{ 16, 7 }, /* 24 | 16 | 7 | 71% */
|
||||||
|
{ 16, 8 } /* 25 | 16 | 8 | 68% */
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: CanGetSpeedConfig
|
||||||
|
** PARAMETER: baud The desired baudrate in kbps. Valid values are 10..1000.
|
||||||
|
** prescaler Pointer to where the value for the prescaler will be stored.
|
||||||
|
** tseg1 Pointer to where the value for TSEG2 will be stored.
|
||||||
|
** tseg2 Pointer to where the value for TSEG2 will be stored.
|
||||||
|
** RETURN VALUE: 1 if the CAN bustiming register values were found, 0 otherwise.
|
||||||
|
** DESCRIPTION: Search algorithm to match the desired baudrate to a possible bus
|
||||||
|
** timing configuration.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
static unsigned char CanGetSpeedConfig(unsigned short baud, unsigned short *prescaler,
|
||||||
|
unsigned char *tseg1, unsigned char *tseg2)
|
||||||
|
{
|
||||||
|
unsigned char cnt;
|
||||||
|
|
||||||
|
/* loop through all possible time quanta configurations to find a match */
|
||||||
|
for (cnt=0; cnt < sizeof(canTiming)/sizeof(canTiming[0]); cnt++)
|
||||||
|
{
|
||||||
|
if (((BOOT_CPU_SYSTEM_SPEED_KHZ/2) % (baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1))) == 0)
|
||||||
|
{
|
||||||
|
/* compute the prescaler that goes with this TQ configuration */
|
||||||
|
*prescaler = (BOOT_CPU_SYSTEM_SPEED_KHZ/2)/(baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1));
|
||||||
|
|
||||||
|
/* make sure the prescaler is valid */
|
||||||
|
if ( (*prescaler > 0) && (*prescaler <= 1024) )
|
||||||
|
{
|
||||||
|
/* store the bustiming configuration */
|
||||||
|
*tseg1 = canTiming[cnt].tseg1;
|
||||||
|
*tseg2 = canTiming[cnt].tseg2;
|
||||||
|
/* found a good bus timing configuration */
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
/* could not find a good bus timing configuration */
|
||||||
|
return 0;
|
||||||
|
} /*** end of CanGetSpeedConfig ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BootComInit
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Initializes the CAN communication interface
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void BootComInit(void)
|
||||||
|
{
|
||||||
|
GPIO_InitTypeDef GPIO_InitStructure;
|
||||||
|
CAN_InitTypeDef CAN_InitStructure;
|
||||||
|
CAN_FilterInitTypeDef CAN_FilterInitStructure;
|
||||||
|
unsigned short prescaler;
|
||||||
|
unsigned char tseg1, tseg2;
|
||||||
|
|
||||||
|
/* GPIO clock enable */
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
|
||||||
|
/* Configure CAN pin: RX */
|
||||||
|
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
|
||||||
|
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
|
||||||
|
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||||
|
/* Configure CAN pin: TX */
|
||||||
|
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
|
||||||
|
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||||
|
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||||
|
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||||
|
/* Remap CAN1 pins to PortB */
|
||||||
|
GPIO_PinRemapConfig(GPIO_Remap1_CAN1 , ENABLE);
|
||||||
|
/* CAN1 Periph clock enable */
|
||||||
|
RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN1, ENABLE);
|
||||||
|
/* CAN register init */
|
||||||
|
CAN_DeInit(CAN1);
|
||||||
|
CAN_StructInit(&CAN_InitStructure);
|
||||||
|
/* obtain the bittiming configuration for this baudrate */
|
||||||
|
CanGetSpeedConfig(BOOT_COM_CAN_BAUDRATE/1000, &prescaler, &tseg1, &tseg2);
|
||||||
|
/* CAN controller init */
|
||||||
|
CAN_InitStructure.CAN_TTCM = DISABLE;
|
||||||
|
CAN_InitStructure.CAN_ABOM = DISABLE;
|
||||||
|
CAN_InitStructure.CAN_AWUM = DISABLE;
|
||||||
|
CAN_InitStructure.CAN_NART = DISABLE;
|
||||||
|
CAN_InitStructure.CAN_RFLM = DISABLE;
|
||||||
|
CAN_InitStructure.CAN_TXFP = DISABLE;
|
||||||
|
CAN_InitStructure.CAN_Mode = CAN_Mode_Normal;
|
||||||
|
/* CAN Baudrate init */
|
||||||
|
CAN_InitStructure.CAN_SJW = CAN_SJW_1tq;
|
||||||
|
CAN_InitStructure.CAN_BS1 = tseg1 - 1;
|
||||||
|
CAN_InitStructure.CAN_BS2 = tseg2 - 1;
|
||||||
|
CAN_InitStructure.CAN_Prescaler = prescaler;
|
||||||
|
CAN_Init(CAN1, &CAN_InitStructure);
|
||||||
|
/* CAN filter init - receive all messages */
|
||||||
|
CAN_FilterInitStructure.CAN_FilterNumber = 0;
|
||||||
|
CAN_FilterInitStructure.CAN_FilterMode = CAN_FilterMode_IdMask;
|
||||||
|
CAN_FilterInitStructure.CAN_FilterScale = CAN_FilterScale_32bit;
|
||||||
|
CAN_FilterInitStructure.CAN_FilterIdHigh = 0x0000;
|
||||||
|
CAN_FilterInitStructure.CAN_FilterIdLow = 0x0000;
|
||||||
|
CAN_FilterInitStructure.CAN_FilterMaskIdHigh = 0x0000;
|
||||||
|
CAN_FilterInitStructure.CAN_FilterMaskIdLow = 0x0000;
|
||||||
|
CAN_FilterInitStructure.CAN_FilterFIFOAssignment = 0;
|
||||||
|
CAN_FilterInitStructure.CAN_FilterActivation = ENABLE;
|
||||||
|
CAN_FilterInit(&CAN_FilterInitStructure);
|
||||||
|
} /*** end of BootComInit ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: BootComCheckActivationRequest
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Receives the CONNECT request from the host, which indicates that the
|
||||||
|
** bootloader should be activated and, if so, activates it.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void BootComCheckActivationRequest(void)
|
||||||
|
{
|
||||||
|
CanRxMsg RxMessage;
|
||||||
|
|
||||||
|
/* check if a new message was received */
|
||||||
|
if (CAN_MessagePending(CAN1, CAN_FIFO0) > 0)
|
||||||
|
{
|
||||||
|
/* receive the message */
|
||||||
|
CAN_Receive(CAN1, CAN_FIFO0, &RxMessage);
|
||||||
|
if (RxMessage.StdId == BOOT_COM_CAN_RX_MSG_ID)
|
||||||
|
{
|
||||||
|
/* check if this was an XCP CONNECT command */
|
||||||
|
if ((RxMessage.Data[0] == 0xff) && (RxMessage.Data[1] == 0x00))
|
||||||
|
{
|
||||||
|
/* connection request received so start the bootloader */
|
||||||
|
BootActivate();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
} /*** end of BootComCheckActivationRequest ***/
|
||||||
|
#endif /* BOOT_COM_CAN_ENABLE > 0 */
|
||||||
|
|
||||||
|
|
||||||
|
/*********************************** end of boot.c *************************************/
|
|
@ -0,0 +1,42 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: demo program bootloader interface header file
|
||||||
|
| File Name: boot.h
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
#ifndef BOOT_H
|
||||||
|
#define BOOT_H
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Function prototypes
|
||||||
|
****************************************************************************************/
|
||||||
|
void BootComInit(void);
|
||||||
|
void BootComCheckActivationRequest(void);
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* BOOT_H */
|
||||||
|
/*********************************** end of boot.h *************************************/
|
|
@ -0,0 +1,2 @@
|
||||||
|
@echo off
|
||||||
|
make --directory=../ all
|
|
@ -0,0 +1,2 @@
|
||||||
|
@echo off
|
||||||
|
make --directory=../ clean
|
|
@ -0,0 +1,94 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: Demo program C startup source file
|
||||||
|
| File Name: cstart.c
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "header.h" /* generic header */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* External function protoypes
|
||||||
|
****************************************************************************************/
|
||||||
|
extern int main(void);
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* External data declarations
|
||||||
|
****************************************************************************************/
|
||||||
|
/* these externals are declared by the linker */
|
||||||
|
extern unsigned long _etext;
|
||||||
|
extern unsigned long _data;
|
||||||
|
extern unsigned long _edata;
|
||||||
|
extern unsigned long _bss;
|
||||||
|
extern unsigned long _ebss;
|
||||||
|
extern unsigned long _estack;
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: reset_handler
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Reset interrupt service routine. Configures the stack, initializes
|
||||||
|
** RAM and jumps to function main.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void reset_handler(void)
|
||||||
|
{
|
||||||
|
unsigned long *pSrc, *pDest;
|
||||||
|
|
||||||
|
/* initialize stack pointer */
|
||||||
|
__asm(" ldr r1, =_estack\n"
|
||||||
|
" mov sp, r1");
|
||||||
|
/* copy the data segment initializers from flash to SRAM */
|
||||||
|
pSrc = &_etext;
|
||||||
|
for(pDest = &_data; pDest < &_edata; )
|
||||||
|
{
|
||||||
|
*pDest++ = *pSrc++;
|
||||||
|
}
|
||||||
|
/* zero fill the bss segment. this is done with inline assembly since this will
|
||||||
|
* clear the value of pDest if it is not kept in a register.
|
||||||
|
*/
|
||||||
|
__asm(" ldr r0, =_bss\n"
|
||||||
|
" ldr r1, =_ebss\n"
|
||||||
|
" mov r2, #0\n"
|
||||||
|
" .thumb_func\n"
|
||||||
|
"zero_loop:\n"
|
||||||
|
" cmp r0, r1\n"
|
||||||
|
" it lt\n"
|
||||||
|
" strlt r2, [r0], #4\n"
|
||||||
|
" blt zero_loop");
|
||||||
|
/* start the software application by calling its entry point */
|
||||||
|
main();
|
||||||
|
} /*** end of reset_handler ***/
|
||||||
|
|
||||||
|
|
||||||
|
/************************************ end of cstart.c **********************************/
|
|
@ -0,0 +1,47 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: generic header file
|
||||||
|
| File Name: header.h
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
#ifndef HEADER_H
|
||||||
|
#define HEADER_H
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "../Boot/config.h" /* bootloader configuration */
|
||||||
|
#include "stm32f10x.h" /* STM32 register definitions */
|
||||||
|
#include "stm32f10x_conf.h" /* STM32 peripheral drivers */
|
||||||
|
#include "boot.h" /* bootloader interface driver */
|
||||||
|
#include "irq.h" /* IRQ driver */
|
||||||
|
#include "led.h" /* LED driver */
|
||||||
|
#include "timer.h" /* Timer driver */
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* HEADER_H */
|
||||||
|
/*********************************** end of header.h ***********************************/
|
|
@ -0,0 +1,170 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8"?>
|
||||||
|
<CodeLite_Project Name="DemoProg" InternalType="">
|
||||||
|
<Plugins>
|
||||||
|
<Plugin Name="qmake">
|
||||||
|
<![CDATA[00010001N0005Debug000000000000]]>
|
||||||
|
</Plugin>
|
||||||
|
</Plugins>
|
||||||
|
<VirtualDirectory Name="Prog">
|
||||||
|
<VirtualDirectory Name="lib">
|
||||||
|
<VirtualDirectory Name="stdperiphlib">
|
||||||
|
<VirtualDirectory Name="STM32F10x_StdPeriph_Driver">
|
||||||
|
<VirtualDirectory Name="inc">
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/misc.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_adc.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_bkp.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_can.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_cec.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_crc.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dac.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dbgmcu.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dma.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_exti.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_flash.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_fsmc.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_gpio.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_i2c.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_iwdg.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_pwr.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rcc.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rtc.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_sdio.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_spi.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_tim.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_usart.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/inc/stm32f10x_wwdg.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<VirtualDirectory Name="src">
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/misc.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_bkp.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_can.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_cec.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dac.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<VirtualDirectory Name="CMSIS">
|
||||||
|
<VirtualDirectory Name="CM3">
|
||||||
|
<VirtualDirectory Name="DeviceSupport">
|
||||||
|
<VirtualDirectory Name="ST">
|
||||||
|
<VirtualDirectory Name="STM32F10x">
|
||||||
|
<File Name="../lib/stdperiphlib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/stm32f10x.h"/>
|
||||||
|
<File Name="../lib/stdperiphlib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<VirtualDirectory Name="CoreSupport">
|
||||||
|
<File Name="../lib/stdperiphlib/CMSIS/CM3/CoreSupport/core_cm3.c"/>
|
||||||
|
<File Name="../lib/stdperiphlib/CMSIS/CM3/CoreSupport/core_cm3.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<File Name="../lib/stdperiphlib/stm32f10x_conf.h"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<File Name="../boot.c"/>
|
||||||
|
<File Name="../boot.h"/>
|
||||||
|
<File Name="../cstart.c"/>
|
||||||
|
<File Name="../header.h"/>
|
||||||
|
<File Name="../irq.c"/>
|
||||||
|
<File Name="../irq.h"/>
|
||||||
|
<File Name="../led.c"/>
|
||||||
|
<File Name="../led.h"/>
|
||||||
|
<File Name="../main.c"/>
|
||||||
|
<File Name="../timer.c"/>
|
||||||
|
<File Name="../timer.h"/>
|
||||||
|
<File Name="../vectors.c"/>
|
||||||
|
<File Name="../memory.x"/>
|
||||||
|
</VirtualDirectory>
|
||||||
|
<Description/>
|
||||||
|
<Dependencies/>
|
||||||
|
<Settings Type="Dynamic Library">
|
||||||
|
<GlobalSettings>
|
||||||
|
<Compiler Options="" C_Options="">
|
||||||
|
<IncludePath Value="."/>
|
||||||
|
</Compiler>
|
||||||
|
<Linker Options="">
|
||||||
|
<LibraryPath Value="."/>
|
||||||
|
</Linker>
|
||||||
|
<ResourceCompiler Options=""/>
|
||||||
|
</GlobalSettings>
|
||||||
|
<Configuration Name="Debug" CompilerType="gnu gcc" DebuggerType="GNU gdb debugger" Type="Dynamic Library" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
|
||||||
|
<Compiler Options="-g" C_Options="-g" Required="yes" PreCompiledHeader="">
|
||||||
|
<IncludePath Value="."/>
|
||||||
|
</Compiler>
|
||||||
|
<Linker Options="" Required="yes"/>
|
||||||
|
<ResourceCompiler Options="" Required="no"/>
|
||||||
|
<General OutputFile="" IntermediateDirectory="../obj" Command="demoprog_olimex_lpc_l2294_20mhz.elf" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(WorkspacePath)/../bin" PauseExecWhenProcTerminates="yes"/>
|
||||||
|
<Environment EnvVarSetName="<Use Defaults>" DbgSetName="<Use Defaults>"/>
|
||||||
|
<Debugger IsRemote="yes" RemoteHostName="localhost" RemoteHostPort="3333" DebuggerPath="C:\Program Files (x86)\CodeSourcery\Sourcery G++ Lite\bin\arm-none-eabi-gdb.exe">
|
||||||
|
<PostConnectCommands/>
|
||||||
|
<StartupCommands>break main
|
||||||
|
continue
|
||||||
|
</StartupCommands>
|
||||||
|
</Debugger>
|
||||||
|
<PreBuild/>
|
||||||
|
<PostBuild/>
|
||||||
|
<CustomBuild Enabled="yes">
|
||||||
|
<RebuildCommand/>
|
||||||
|
<CleanCommand>make clean</CleanCommand>
|
||||||
|
<BuildCommand>make</BuildCommand>
|
||||||
|
<PreprocessFileCommand/>
|
||||||
|
<SingleFileCommand/>
|
||||||
|
<MakefileGenerationCommand/>
|
||||||
|
<ThirdPartyToolName>None</ThirdPartyToolName>
|
||||||
|
<WorkingDirectory>$(WorkspacePath)/..</WorkingDirectory>
|
||||||
|
</CustomBuild>
|
||||||
|
<AdditionalRules>
|
||||||
|
<CustomPostBuild/>
|
||||||
|
<CustomPreBuild/>
|
||||||
|
</AdditionalRules>
|
||||||
|
</Configuration>
|
||||||
|
<Configuration Name="Release" CompilerType="gnu gcc" DebuggerType="GNU gdb debugger" Type="Dynamic Library" BuildCmpWithGlobalSettings="append" BuildLnkWithGlobalSettings="append" BuildResWithGlobalSettings="append">
|
||||||
|
<Compiler Options="" C_Options="" Required="yes" PreCompiledHeader="">
|
||||||
|
<IncludePath Value="."/>
|
||||||
|
</Compiler>
|
||||||
|
<Linker Options="-O2" Required="yes"/>
|
||||||
|
<ResourceCompiler Options="" Required="no"/>
|
||||||
|
<General OutputFile="" IntermediateDirectory="./Release" Command="" CommandArguments="" UseSeparateDebugArgs="no" DebugArguments="" WorkingDirectory="$(IntermediateDirectory)" PauseExecWhenProcTerminates="yes"/>
|
||||||
|
<Environment EnvVarSetName="<Use Defaults>" DbgSetName="<Use Defaults>"/>
|
||||||
|
<Debugger IsRemote="no" RemoteHostName="" RemoteHostPort="" DebuggerPath="">
|
||||||
|
<PostConnectCommands/>
|
||||||
|
<StartupCommands/>
|
||||||
|
</Debugger>
|
||||||
|
<PreBuild/>
|
||||||
|
<PostBuild/>
|
||||||
|
<CustomBuild Enabled="yes">
|
||||||
|
<RebuildCommand/>
|
||||||
|
<CleanCommand>make clean</CleanCommand>
|
||||||
|
<BuildCommand>make</BuildCommand>
|
||||||
|
<PreprocessFileCommand/>
|
||||||
|
<SingleFileCommand/>
|
||||||
|
<MakefileGenerationCommand/>
|
||||||
|
<ThirdPartyToolName>None</ThirdPartyToolName>
|
||||||
|
<WorkingDirectory>$(WorkspacePath)</WorkingDirectory>
|
||||||
|
</CustomBuild>
|
||||||
|
<AdditionalRules>
|
||||||
|
<CustomPostBuild/>
|
||||||
|
<CustomPreBuild/>
|
||||||
|
</AdditionalRules>
|
||||||
|
</Configuration>
|
||||||
|
</Settings>
|
||||||
|
</CodeLite_Project>
|
|
@ -0,0 +1,12 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8"?>
|
||||||
|
<CodeLite_Workspace Name="DemoProg" Database="./DemoProg.tags">
|
||||||
|
<Project Name="DemoProg" Path="DemoProg.project" Active="Yes"/>
|
||||||
|
<BuildMatrix>
|
||||||
|
<WorkspaceConfiguration Name="Debug" Selected="yes">
|
||||||
|
<Project Name="DemoProg" ConfigName="Debug"/>
|
||||||
|
</WorkspaceConfiguration>
|
||||||
|
<WorkspaceConfiguration Name="Release" Selected="yes">
|
||||||
|
<Project Name="DemoProg" ConfigName="Release"/>
|
||||||
|
</WorkspaceConfiguration>
|
||||||
|
</BuildMatrix>
|
||||||
|
</CodeLite_Workspace>
|
|
@ -0,0 +1,4 @@
|
||||||
|
Integrated Development Environment
|
||||||
|
----------------------------------
|
||||||
|
Codelite was used as the editor during the development of this software program. This directory contains the Codelite
|
||||||
|
workspace and project files. Codelite is a cross platform open source C/C++ IDE, available at http://www.codelite.org/.
|
|
@ -0,0 +1,97 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: IRQ driver source file
|
||||||
|
| File Name: irq.c
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "header.h" /* generic header */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Local data definitions
|
||||||
|
****************************************************************************************/
|
||||||
|
static unsigned char interruptNesting = 0; /* used for global interrupt en/disable */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: IrqInterruptEnable
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Enables the generation IRQ interrupts. Typically called once during
|
||||||
|
** software startup after completion of the initialization.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void IrqInterruptEnable(void)
|
||||||
|
{
|
||||||
|
__enable_irq();
|
||||||
|
} /*** end of IrqInterruptEnable ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: HwInterruptDisable
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Disables the generation IRQ interrupts and stores information on
|
||||||
|
** whether or not the interrupts were already disabled before explicitly
|
||||||
|
** disabling them with this function. Normally used as a pair together
|
||||||
|
** with IrqInterruptRestore during a critical section.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void IrqInterruptDisable(void)
|
||||||
|
{
|
||||||
|
if (interruptNesting == 0)
|
||||||
|
{
|
||||||
|
__disable_irq();
|
||||||
|
}
|
||||||
|
interruptNesting++;
|
||||||
|
} /*** end of IrqInterruptDisable ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: IrqInterruptRestore
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Restore the generation IRQ interrupts to the setting it had prior to
|
||||||
|
** calling IrqInterruptDisable. Normally used as a pair together with
|
||||||
|
** IrqInterruptDisable during a critical section.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void IrqInterruptRestore(void)
|
||||||
|
{
|
||||||
|
interruptNesting--;
|
||||||
|
if (interruptNesting == 0)
|
||||||
|
{
|
||||||
|
__enable_irq();
|
||||||
|
}
|
||||||
|
} /*** end of IrqInterruptRestore ***/
|
||||||
|
|
||||||
|
|
||||||
|
/*********************************** end of irq.c **************************************/
|
|
@ -0,0 +1,43 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: IRQ driver header file
|
||||||
|
| File Name: irq.h
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
#ifndef IRQ_H
|
||||||
|
#define IRQ_H
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Function prototypes
|
||||||
|
****************************************************************************************/
|
||||||
|
void IrqInterruptEnable(void);
|
||||||
|
void IrqInterruptDisable(void);
|
||||||
|
void IrqInterruptRestore(void);
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* IRQ_H */
|
||||||
|
/*********************************** end of irq.h **************************************/
|
|
@ -0,0 +1,103 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: LED driver source file
|
||||||
|
| File Name: led.c
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Include files
|
||||||
|
****************************************************************************************/
|
||||||
|
#include "header.h" /* generic header */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Macro definitions
|
||||||
|
****************************************************************************************/
|
||||||
|
#define LED_TOGGLE_MS (500) /* toggle interval time in millisecodns */
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: LedInit
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Initializes the LED.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void LedInit(void)
|
||||||
|
{
|
||||||
|
GPIO_InitTypeDef gpio_init;
|
||||||
|
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
|
||||||
|
gpio_init.GPIO_Pin = GPIO_Pin_12;
|
||||||
|
gpio_init.GPIO_Speed = GPIO_Speed_50MHz;
|
||||||
|
gpio_init.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||||
|
GPIO_Init(GPIOC, &gpio_init);
|
||||||
|
} /*** end of LedInit ***/
|
||||||
|
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
** NAME: LedToggle
|
||||||
|
** PARAMETER: none
|
||||||
|
** RETURN VALUE: none
|
||||||
|
** DESCRIPTION: Toggles the LED at a fixed time interval.
|
||||||
|
**
|
||||||
|
****************************************************************************************/
|
||||||
|
void LedToggle(void)
|
||||||
|
{
|
||||||
|
static unsigned char led_toggle_state = 0;
|
||||||
|
static unsigned long timer_counter_last = 0;
|
||||||
|
unsigned long timer_counter_now;
|
||||||
|
|
||||||
|
/* check if toggle interval time passed */
|
||||||
|
timer_counter_now = TimerGet();
|
||||||
|
if ( (timer_counter_now - timer_counter_last) < LED_TOGGLE_MS)
|
||||||
|
{
|
||||||
|
/* not yet time to toggle */
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* determine toggle action */
|
||||||
|
if (led_toggle_state == 0)
|
||||||
|
{
|
||||||
|
led_toggle_state = 1;
|
||||||
|
/* turn the LED on */
|
||||||
|
GPIO_ResetBits(GPIOC, GPIO_Pin_12);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
led_toggle_state = 0;
|
||||||
|
/* turn the LED off */
|
||||||
|
GPIO_SetBits(GPIOC, GPIO_Pin_12);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* store toggle time to determine next toggle interval */
|
||||||
|
timer_counter_last = timer_counter_now;
|
||||||
|
} /*** end of LedToggle ***/
|
||||||
|
|
||||||
|
|
||||||
|
/*********************************** end of led.c **************************************/
|
|
@ -0,0 +1,42 @@
|
||||||
|
/****************************************************************************************
|
||||||
|
| Description: LED driver header file
|
||||||
|
| File Name: led.h
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| C O P Y R I G H T
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
||||||
|
|
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| L I C E N S E
|
||||||
|
|----------------------------------------------------------------------------------------
|
||||||
|
| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
||||||
|
| modify it under the terms of the GNU General Public License as published by the Free
|
||||||
|
| Software Foundation, either version 3 of the License, or (at your option) any later
|
||||||
|
| version.
|
||||||
|
|
|
||||||
|
| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
||||||
|
| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
||||||
|
| PURPOSE. See the GNU General Public License for more details.
|
||||||
|
|
|
||||||
|
| You should have received a copy of the GNU General Public License along with OpenBLT.
|
||||||
|
| If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
|
|
||||||
|
| A special exception to the GPL is included to allow you to distribute a combined work
|
||||||
|
| that includes OpenBLT without being obliged to provide the source code for any
|
||||||
|
| proprietary components. The exception text is included at the bottom of the license
|
||||||
|
| file <license.html>.
|
||||||
|
|
|
||||||
|
****************************************************************************************/
|
||||||
|
#ifndef LED_H
|
||||||
|
#define LED_H
|
||||||
|
|
||||||
|
/****************************************************************************************
|
||||||
|
* Function prototypes
|
||||||
|
****************************************************************************************/
|
||||||
|
void LedInit(void);
|
||||||
|
void LedToggle(void);
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* LED_H */
|
||||||
|
/*********************************** end of led.h **************************************/
|
|
@ -0,0 +1,784 @@
|
||||||
|
/**************************************************************************//**
|
||||||
|
* @file core_cm3.c
|
||||||
|
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
|
||||||
|
* @version V1.30
|
||||||
|
* @date 30. October 2009
|
||||||
|
*
|
||||||
|
* @note
|
||||||
|
* Copyright (C) 2009 ARM Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||||
|
* processor based microcontrollers. This file can be freely distributed
|
||||||
|
* within development tools that are supporting such ARM based processors.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||||
|
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
|
||||||
|
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
*
|
||||||
|
******************************************************************************/
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
/* define compiler specific symbols */
|
||||||
|
#if defined ( __CC_ARM )
|
||||||
|
#define __ASM __asm /*!< asm keyword for ARM Compiler */
|
||||||
|
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
|
||||||
|
|
||||||
|
#elif defined ( __ICCARM__ )
|
||||||
|
#define __ASM __asm /*!< asm keyword for IAR Compiler */
|
||||||
|
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
|
||||||
|
|
||||||
|
#elif defined ( __GNUC__ )
|
||||||
|
#define __ASM __asm /*!< asm keyword for GNU Compiler */
|
||||||
|
#define __INLINE inline /*!< inline keyword for GNU Compiler */
|
||||||
|
|
||||||
|
#elif defined ( __TASKING__ )
|
||||||
|
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
|
||||||
|
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/* ################### Compiler specific Intrinsics ########################### */
|
||||||
|
|
||||||
|
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
|
||||||
|
/* ARM armcc specific functions */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @return ProcessStackPointer
|
||||||
|
*
|
||||||
|
* Return the actual process stack pointer
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
mrs r0, psp
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfProcStack Process Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value ProcessStackPointer to the MSP
|
||||||
|
* (process stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
__ASM void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
msr psp, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @return Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Return the current value of the MSP (main stack pointer)
|
||||||
|
* Cortex processor register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
mrs r0, msp
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfMainStack Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value mainStackPointer to the MSP
|
||||||
|
* (main stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
__ASM void __set_MSP(uint32_t mainStackPointer)
|
||||||
|
{
|
||||||
|
msr msp, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in unsigned short value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in unsigned short value
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __REV16(uint16_t value)
|
||||||
|
{
|
||||||
|
rev16 r0, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*/
|
||||||
|
__ASM int32_t __REVSH(int16_t value)
|
||||||
|
{
|
||||||
|
revsh r0, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#if (__ARMCC_VERSION < 400000)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Remove the exclusive lock created by ldrex
|
||||||
|
*
|
||||||
|
* Removes the exclusive lock which is created by ldrex.
|
||||||
|
*/
|
||||||
|
__ASM void __CLREX(void)
|
||||||
|
{
|
||||||
|
clrex
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Base Priority value
|
||||||
|
*
|
||||||
|
* @return BasePriority
|
||||||
|
*
|
||||||
|
* Return the content of the base priority register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_BASEPRI(void)
|
||||||
|
{
|
||||||
|
mrs r0, basepri
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Base Priority value
|
||||||
|
*
|
||||||
|
* @param basePri BasePriority
|
||||||
|
*
|
||||||
|
* Set the base priority register
|
||||||
|
*/
|
||||||
|
__ASM void __set_BASEPRI(uint32_t basePri)
|
||||||
|
{
|
||||||
|
msr basepri, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Priority Mask value
|
||||||
|
*
|
||||||
|
* @return PriMask
|
||||||
|
*
|
||||||
|
* Return state of the priority mask bit from the priority mask register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_PRIMASK(void)
|
||||||
|
{
|
||||||
|
mrs r0, primask
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Priority Mask value
|
||||||
|
*
|
||||||
|
* @param priMask PriMask
|
||||||
|
*
|
||||||
|
* Set the priority mask bit in the priority mask register
|
||||||
|
*/
|
||||||
|
__ASM void __set_PRIMASK(uint32_t priMask)
|
||||||
|
{
|
||||||
|
msr primask, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Fault Mask value
|
||||||
|
*
|
||||||
|
* @return FaultMask
|
||||||
|
*
|
||||||
|
* Return the content of the fault mask register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_FAULTMASK(void)
|
||||||
|
{
|
||||||
|
mrs r0, faultmask
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Fault Mask value
|
||||||
|
*
|
||||||
|
* @param faultMask faultMask value
|
||||||
|
*
|
||||||
|
* Set the fault mask register
|
||||||
|
*/
|
||||||
|
__ASM void __set_FAULTMASK(uint32_t faultMask)
|
||||||
|
{
|
||||||
|
msr faultmask, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Control Register value
|
||||||
|
*
|
||||||
|
* @return Control value
|
||||||
|
*
|
||||||
|
* Return the content of the control register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_CONTROL(void)
|
||||||
|
{
|
||||||
|
mrs r0, control
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Control Register value
|
||||||
|
*
|
||||||
|
* @param control Control value
|
||||||
|
*
|
||||||
|
* Set the control register
|
||||||
|
*/
|
||||||
|
__ASM void __set_CONTROL(uint32_t control)
|
||||||
|
{
|
||||||
|
msr control, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* __ARMCC_VERSION */
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
|
||||||
|
/* IAR iccarm specific functions */
|
||||||
|
#pragma diag_suppress=Pe940
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @return ProcessStackPointer
|
||||||
|
*
|
||||||
|
* Return the actual process stack pointer
|
||||||
|
*/
|
||||||
|
uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
__ASM("mrs r0, psp");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfProcStack Process Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value ProcessStackPointer to the MSP
|
||||||
|
* (process stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
__ASM("msr psp, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @return Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Return the current value of the MSP (main stack pointer)
|
||||||
|
* Cortex processor register
|
||||||
|
*/
|
||||||
|
uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
__ASM("mrs r0, msp");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfMainStack Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value mainStackPointer to the MSP
|
||||||
|
* (main stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_MSP(uint32_t topOfMainStack)
|
||||||
|
{
|
||||||
|
__ASM("msr msp, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in unsigned short value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in unsigned short value
|
||||||
|
*/
|
||||||
|
uint32_t __REV16(uint16_t value)
|
||||||
|
{
|
||||||
|
__ASM("rev16 r0, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse bit order of value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse bit order of value
|
||||||
|
*/
|
||||||
|
uint32_t __RBIT(uint32_t value)
|
||||||
|
{
|
||||||
|
__ASM("rbit r0, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 8 bit values)
|
||||||
|
*/
|
||||||
|
uint8_t __LDREXB(uint8_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("ldrexb r0, [r0]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint16_t __LDREXH(uint16_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("ldrexh r0, [r0]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __LDREXW(uint32_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("ldrex r0, [r0]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 8 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXB(uint8_t value, uint8_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("strexb r0, r0, [r1]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXH(uint16_t value, uint16_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("strexh r0, r0, [r1]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXW(uint32_t value, uint32_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("strex r0, r0, [r1]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
#pragma diag_default=Pe940
|
||||||
|
|
||||||
|
|
||||||
|
#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
|
||||||
|
/* GNU gcc specific functions */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @return ProcessStackPointer
|
||||||
|
*
|
||||||
|
* Return the actual process stack pointer
|
||||||
|
*/
|
||||||
|
uint32_t __get_PSP(void) __attribute__( ( naked ) );
|
||||||
|
uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, psp\n\t"
|
||||||
|
"MOV r0, %0 \n\t"
|
||||||
|
"BX lr \n\t" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfProcStack Process Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value ProcessStackPointer to the MSP
|
||||||
|
* (process stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
|
||||||
|
void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR psp, %0\n\t"
|
||||||
|
"BX lr \n\t" : : "r" (topOfProcStack) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @return Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Return the current value of the MSP (main stack pointer)
|
||||||
|
* Cortex processor register
|
||||||
|
*/
|
||||||
|
uint32_t __get_MSP(void) __attribute__( ( naked ) );
|
||||||
|
uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, msp\n\t"
|
||||||
|
"MOV r0, %0 \n\t"
|
||||||
|
"BX lr \n\t" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfMainStack Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value mainStackPointer to the MSP
|
||||||
|
* (main stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
|
||||||
|
void __set_MSP(uint32_t topOfMainStack)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR msp, %0\n\t"
|
||||||
|
"BX lr \n\t" : : "r" (topOfMainStack) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Base Priority value
|
||||||
|
*
|
||||||
|
* @return BasePriority
|
||||||
|
*
|
||||||
|
* Return the content of the base priority register
|
||||||
|
*/
|
||||||
|
uint32_t __get_BASEPRI(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Base Priority value
|
||||||
|
*
|
||||||
|
* @param basePri BasePriority
|
||||||
|
*
|
||||||
|
* Set the base priority register
|
||||||
|
*/
|
||||||
|
void __set_BASEPRI(uint32_t value)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR basepri, %0" : : "r" (value) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Priority Mask value
|
||||||
|
*
|
||||||
|
* @return PriMask
|
||||||
|
*
|
||||||
|
* Return state of the priority mask bit from the priority mask register
|
||||||
|
*/
|
||||||
|
uint32_t __get_PRIMASK(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, primask" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Priority Mask value
|
||||||
|
*
|
||||||
|
* @param priMask PriMask
|
||||||
|
*
|
||||||
|
* Set the priority mask bit in the priority mask register
|
||||||
|
*/
|
||||||
|
void __set_PRIMASK(uint32_t priMask)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Fault Mask value
|
||||||
|
*
|
||||||
|
* @return FaultMask
|
||||||
|
*
|
||||||
|
* Return the content of the fault mask register
|
||||||
|
*/
|
||||||
|
uint32_t __get_FAULTMASK(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Fault Mask value
|
||||||
|
*
|
||||||
|
* @param faultMask faultMask value
|
||||||
|
*
|
||||||
|
* Set the fault mask register
|
||||||
|
*/
|
||||||
|
void __set_FAULTMASK(uint32_t faultMask)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Control Register value
|
||||||
|
*
|
||||||
|
* @return Control value
|
||||||
|
*
|
||||||
|
* Return the content of the control register
|
||||||
|
*/
|
||||||
|
uint32_t __get_CONTROL(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, control" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Control Register value
|
||||||
|
*
|
||||||
|
* @param control Control value
|
||||||
|
*
|
||||||
|
* Set the control register
|
||||||
|
*/
|
||||||
|
void __set_CONTROL(uint32_t control)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR control, %0" : : "r" (control) );
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in integer value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in integer value
|
||||||
|
*/
|
||||||
|
uint32_t __REV(uint32_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in unsigned short value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in unsigned short value
|
||||||
|
*/
|
||||||
|
uint32_t __REV16(uint16_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*/
|
||||||
|
int32_t __REVSH(int16_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse bit order of value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse bit order of value
|
||||||
|
*/
|
||||||
|
uint32_t __RBIT(uint32_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 8 bit value
|
||||||
|
*/
|
||||||
|
uint8_t __LDREXB(uint8_t *addr)
|
||||||
|
{
|
||||||
|
uint8_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint16_t __LDREXH(uint16_t *addr)
|
||||||
|
{
|
||||||
|
uint16_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __LDREXW(uint32_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 8 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXB(uint8_t value, uint8_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXH(uint16_t value, uint16_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXW(uint32_t value, uint32_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
|
||||||
|
/* TASKING carm specific functions */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||||
|
* Please use "carm -?i" to get an up to date list of all instrinsics,
|
||||||
|
* Including the CMSIS ones.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif
|
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|
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|
||||||
|
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||||
|
<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||||
|
<link rel="File-List" href="Library_files/filelist.xml">
|
||||||
|
<link rel="Edit-Time-Data" href="Library_files/editdata.mso"><!--[if !mso]> <style> v\:* {behavior:url(#default#VML);} o\:* {behavior:url(#default#VML);} w\:* {behavior:url(#default#VML);} .shape {behavior:url(#default#VML);} </style> <![endif]--><title>Release Notes for STM32F10x CMSIS</title><!--[if gte mso 9]><xml> <o:DocumentProperties> <o:Author>STMicroelectronics</o:Author> <o:LastAuthor>STMicroelectronics</o:LastAuthor> <o:Revision>37</o:Revision> <o:TotalTime>136</o:TotalTime> <o:Created>2009-02-27T19:26:00Z</o:Created> <o:LastSaved>2009-03-01T17:56:00Z</o:LastSaved> <o:Pages>1</o:Pages> <o:Words>522</o:Words> <o:Characters>2977</o:Characters> <o:Company>STMicroelectronics</o:Company> <o:Lines>24</o:Lines> <o:Paragraphs>6</o:Paragraphs> <o:CharactersWithSpaces>3493</o:CharactersWithSpaces> <o:Version>11.6568</o:Version> </o:DocumentProperties> </xml><![endif]--><!--[if gte mso 9]><xml> <w:WordDocument> <w:Zoom>110</w:Zoom> <w:ValidateAgainstSchemas/> <w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid> <w:IgnoreMixedContent>false</w:IgnoreMixedContent> <w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText> <w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel> </w:WordDocument> </xml><![endif]--><!--[if gte mso 9]><xml> <w:LatentStyles DefLockedState="false" LatentStyleCount="156"> </w:LatentStyles> </xml><![endif]-->
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
<style>
|
||||||
|
<!--
|
||||||
|
/* Style Definitions */
|
||||||
|
p.MsoNormal, li.MsoNormal, div.MsoNormal
|
||||||
|
{mso-style-parent:"";
|
||||||
|
margin:0in;
|
||||||
|
margin-bottom:.0001pt;
|
||||||
|
mso-pagination:widow-orphan;
|
||||||
|
font-size:12.0pt;
|
||||||
|
font-family:"Times New Roman";
|
||||||
|
mso-fareast-font-family:"Times New Roman";}
|
||||||
|
h2
|
||||||
|
{mso-style-next:Normal;
|
||||||
|
margin-top:12.0pt;
|
||||||
|
margin-right:0in;
|
||||||
|
margin-bottom:3.0pt;
|
||||||
|
margin-left:0in;
|
||||||
|
mso-pagination:widow-orphan;
|
||||||
|
page-break-after:avoid;
|
||||||
|
mso-outline-level:2;
|
||||||
|
font-size:14.0pt;
|
||||||
|
font-family:Arial;
|
||||||
|
font-weight:bold;
|
||||||
|
font-style:italic;}
|
||||||
|
a:link, span.MsoHyperlink
|
||||||
|
{color:blue;
|
||||||
|
text-decoration:underline;
|
||||||
|
text-underline:single;}
|
||||||
|
a:visited, span.MsoHyperlinkFollowed
|
||||||
|
{color:blue;
|
||||||
|
text-decoration:underline;
|
||||||
|
text-underline:single;}
|
||||||
|
p
|
||||||
|
{mso-margin-top-alt:auto;
|
||||||
|
margin-right:0in;
|
||||||
|
mso-margin-bottom-alt:auto;
|
||||||
|
margin-left:0in;
|
||||||
|
mso-pagination:widow-orphan;
|
||||||
|
font-size:12.0pt;
|
||||||
|
font-family:"Times New Roman";
|
||||||
|
mso-fareast-font-family:"Times New Roman";}
|
||||||
|
@page Section1
|
||||||
|
{size:8.5in 11.0in;
|
||||||
|
margin:1.0in 1.25in 1.0in 1.25in;
|
||||||
|
mso-header-margin:.5in;
|
||||||
|
mso-footer-margin:.5in;
|
||||||
|
mso-paper-source:0;}
|
||||||
|
div.Section1
|
||||||
|
{page:Section1;}
|
||||||
|
-->
|
||||||
|
</style><!--[if gte mso 10]> <style> /* Style Definitions */ table.MsoNormalTable {mso-style-name:"Table Normal"; mso-tstyle-rowband-size:0; mso-tstyle-colband-size:0; mso-style-noshow:yes; mso-style-parent:""; mso-padding-alt:0in 5.4pt 0in 5.4pt; mso-para-margin:0in; mso-para-margin-bottom:.0001pt; mso-pagination:widow-orphan; font-size:10.0pt; font-family:"Times New Roman"; mso-ansi-language:#0400; mso-fareast-language:#0400; mso-bidi-language:#0400;} </style> <![endif]--><!--[if gte mso 9]><xml> <o:shapedefaults v:ext="edit" spidmax="5122"/> </xml><![endif]--><!--[if gte mso 9]><xml> <o:shapelayout v:ext="edit"> <o:idmap v:ext="edit" data="1"/> </o:shapelayout></xml><![endif]--></head>
|
||||||
|
<body lang="EN-US" link="blue" vlink="blue">
|
||||||
|
<div class="Section1">
|
||||||
|
<p class="MsoNormal"><span style="font-family: Arial;"><o:p><br>
|
||||||
|
</o:p></span></p>
|
||||||
|
<div align="center">
|
||||||
|
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||||
|
<tbody>
|
||||||
|
<tr style="">
|
||||||
|
<td style="padding: 0cm;" valign="top">
|
||||||
|
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||||
|
<tbody>
|
||||||
|
<tr>
|
||||||
|
<td style="vertical-align: top;"><span style="font-size: 8pt; font-family: Arial; color: blue;"><a href="../../../../../../Release_Notes.html">Back to Release page</a></span></td>
|
||||||
|
</tr>
|
||||||
|
<tr style="">
|
||||||
|
<td style="padding: 1.5pt;">
|
||||||
|
<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
|
||||||
|
Notes for STM32F10x CMSIS</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
|
||||||
|
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright 2011 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||||
|
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;"><img alt="" id="_x0000_i1025" src="../../../../../../_htmresc/logo.bmp" style="border: 0px solid ; width: 86px; height: 65px;"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||||
|
</td>
|
||||||
|
</tr>
|
||||||
|
</tbody>
|
||||||
|
</table>
|
||||||
|
<p class="MsoNormal"><span style="font-family: Arial; display: none;"><o:p> </o:p></span></p>
|
||||||
|
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" width="900">
|
||||||
|
<tbody>
|
||||||
|
<tr>
|
||||||
|
<td style="padding: 0cm;" valign="top">
|
||||||
|
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
|
||||||
|
<ol style="margin-top: 0cm;" start="1" type="1">
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32F10x CMSIS
|
||||||
|
update History</a><o:p></o:p></span></li>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
|
||||||
|
</ol>
|
||||||
|
<span style="font-family: "Times New Roman";"></span>
|
||||||
|
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F10x CMSIS
|
||||||
|
update History</span></h2><br>
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V3.5.0 / 11-March-2011<o:p></o:p></span></h3>
|
||||||
|
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||||
|
Changes<o:p></o:p></span></u></b></p>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0cm;" type="square">
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">stm32f10x.h
|
||||||
|
</span>and <span style="font-style: italic;">startup_stm32f10x_hd_vl.s</span> files: remove the FSMC interrupt
|
||||||
|
definition for STM32F10x High-density Value line devices.<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">system_stm32f10x.c</span> file provided within the CMSIS folder. <br>
|
||||||
|
</span></li>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.4.0
|
||||||
|
- 10/15/2010</span></h3>
|
||||||
|
|
||||||
|
<ol>
|
||||||
|
<li><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b></li>
|
||||||
|
</ol>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||||
|
for <b>STM32F10x High-density Value line devices</b>.</span></li>
|
||||||
|
</ul>
|
||||||
|
<ol start="2">
|
||||||
|
<li><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x CMSIS Device Peripheral Access Layer </span></i></b></li>
|
||||||
|
</ol>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File:</span> <span style="font-weight: bold; font-style: italic;">stm32f10x.h</span></span><br>
|
||||||
|
</li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Update to support High-density Value line devices</span><span style="font-size: 10pt; font-family: Verdana;"></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new define <span style="font-style: italic;">STM32F10X_HD_VL</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">RCC, AFIO, FSMC bits definition updated</span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style="">
|
||||||
|
|
||||||
|
<span style="font-size: 10pt; font-family: "Verdana","sans-serif";">All
|
||||||
|
STM32 devices definitions are commented by default. User has to select the
|
||||||
|
appropriate device before starting else an error will be signaled on compile
|
||||||
|
time.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: "Verdana","sans-serif";">Add new IRQs definitons inside the IRQn_Type enumeration for STM23 High-density Value line devices.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: "Verdana","sans-serif";">"<span style="font-weight: bold;">bool</span>" type removed.</span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: "Verdana","sans-serif";"></span></li>
|
||||||
|
</ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files:</span> <span style="font-weight: bold; font-style: italic;">system_stm32f10x.h and system_stm32f10x.c</span></span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"></span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;">"system_stm32f10x.c" </span><span style="font-weight: bold;"></span>moved to to "<span style="font-weight: bold; font-style: italic;">STM32F10x_StdPeriph_Template</span>" directory. This file is also moved to each example directory under "<span style="font-weight: bold; font-style: italic;">STM32F10x_StdPeriph_Examples</span>".</span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"></span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SystemInit_ExtMemCtl() </span>function: update to support High-density Value line devices.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add "<span style="font-style: italic;">VECT_TAB_SRAM</span>" inside "</span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;">system_stm32f10x.c</span></span><span style="font-size: 10pt; font-family: Verdana;">"
|
||||||
|
to select if the user want to place the Vector Table in internal SRAM.
|
||||||
|
An additional define is also to specify the Vector Table offset "<span style="font-style: italic;">VECT_TAB_OFFSET</span>".<br>
|
||||||
|
</span></li>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS startup files:</span></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;">startup_stm32f10x_xx.s</span></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add three
|
||||||
|
startup files for STM32 High-density Value line devices:
|
||||||
|
<span style="font-weight: bold; font-style: italic;">startup_stm32f10x_hd_vl.s</span></span></li></ul>
|
||||||
|
</ul>
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.3.0
|
||||||
|
- 04/16/2010</span></h3>
|
||||||
|
|
||||||
|
<ol><li><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b></li></ol>
|
||||||
|
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||||
|
for <b>STM32F10x XL-density devices</b>.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add startup files for TrueSTUDIO toolchain<br></span></li></ul><ol start="2"><li><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x CMSIS Device Peripheral Access Layer </span></i></b></li></ol>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File:</span> <span style="font-weight: bold; font-style: italic;">stm32f10x.h</span></span><br>
|
||||||
|
</li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Update to support XL-density devices</span><span style="font-size: 10pt; font-family: Verdana;"></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new define <span style="font-style: italic;">STM32F10X_XL</span></span></li></ul><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new IRQs for </span><span style="font-size: 10pt; font-family: Verdana;">TIM9..14</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Update FLASH_TypeDef structure</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new IP instances TIM9..14</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">RCC, AFIO, DBGMCU bits definition updated</span></li></ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Correct IRQs definition for MD-, LD-, MD_VL- and LD_VL-density devices (remove comma "," at the end of enum list)<br></span></li></ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files:</span> <span style="font-weight: bold; font-style: italic;">system_stm32f10x.h and system_stm32f10x.c</span></span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SystemInit_ExtMemCtl() </span>function: update to support XL-density devices</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SystemInit()</span> function: swap the order of SetSysClock() and SystemInit_ExtMemCtl() functions. </span><span style="font-size: 10pt; font-family: Verdana;"><br>
|
||||||
|
</span></li></ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS startup files:</span><span style="font-weight: bold; font-style: italic;"></span><span style="font-style: italic;"><span style="font-weight: bold;"></span></span></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">add three
|
||||||
|
startup files for STM32 XL-density devices:
|
||||||
|
<span style="font-weight: bold; font-style: italic;">startup_stm32f10x_xl.s</span></span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;">startup_stm32f10x_md_vl.s</span> for RIDE7: add USART3 IRQ Handler (was missing in previous version)</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add startup files for TrueSTUDIO toolchain</span></li></ul></ul><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;"></span></span>
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.2.0
|
||||||
|
- 03/01/2010</span></h3>
|
||||||
|
<ol style="margin-top: 0in;" start="1" type="1">
|
||||||
|
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"></span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li>
|
||||||
|
</ol>
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">STM32F10x CMSIS files updated to <span style="font-weight: bold;">CMSIS V1.30</span> release</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Directory structure updated to be aligned with CMSIS V1.30<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||||
|
for <b>STM32 Low-density Value line (STM32F100x4/6) and
|
||||||
|
Medium-density Value line (STM32F100x8/B) devices</b>. </span><span style="font-size: 10pt;"><o:p></o:p></span></li>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
<ol style="margin-top: 0in;" start="2" type="1">
|
||||||
|
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">CMSIS Core Peripheral Access Layer</span></i></b></li></ol>
|
||||||
|
<ul>
|
||||||
|
<li><b><i><span style="font-size: 10pt; font-family: Verdana;"></span></i></b><span style="font-size: 10pt; font-family: Verdana;"> Refer to <a href="../../../CMSIS_changes.htm" target="_blank">CMSIS changes</a></span></li>
|
||||||
|
</ul>
|
||||||
|
<ol style="margin-top: 0in; list-style-type: decimal;" start="3">
|
||||||
|
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x CMSIS Device Peripheral Access Layer </span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li>
|
||||||
|
|
||||||
|
</ol>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer Header File:</span> <span style="font-weight: bold; font-style: italic;">stm32f10x.h</span></span><br>
|
||||||
|
</li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Update
|
||||||
|
the stm32f10x.h file to support new Value line devices features: CEC
|
||||||
|
peripheral, new General purpose timers TIM15, TIM16 and TIM17.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Peripherals Bits definitions updated to be in line with Value line devices available features.<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">HSE_Value,
|
||||||
|
HSI_Value and HSEStartup_TimeOut changed to upper case: HSE_VALUE,
|
||||||
|
HSI_VALUE and HSE_STARTUP_TIMEOUT. Old names are kept for legacy
|
||||||
|
purposes.<br>
|
||||||
|
</span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Cortex-M3 Device Peripheral Access Layer System Files:</span> <span style="font-weight: bold; font-style: italic;">system_stm32f10x.h and system_stm32f10x.c</span></span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"></span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SystemFrequency variable name changed to SystemCoreClock</span><br>
|
||||||
|
<span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"></span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Default
|
||||||
|
</span></span><span style="font-size: 10pt; font-family: Verdana;">SystemCoreClock</span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;"> is changed to 24MHz when Value line devices are selected and to 72MHz on other devices.</span></span><span style="font-size: 10pt;"><o:p></o:p></span><span style="font-size: 10pt; font-family: Verdana;"> <br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">All while(1) loop were removed from all clock setting functions. User has to handle the HSE startup failure.<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Additional function <span style="font-weight: bold; font-style: italic;">void SystemCoreClockUpdate (void)</span> is provided.<br>
|
||||||
|
</span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="text-decoration: underline;">STM32F10x CMSIS Startup files:</span> <span style="font-weight: bold; font-style: italic;">startup_stm32f10x_xx.s</span></span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new
|
||||||
|
startup files for STM32 Low-density Value line devices:
|
||||||
|
<span style="font-weight: bold; font-style: italic;">startup_stm32f10x_ld_vl.s</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new startup
|
||||||
|
files for STM32 Medium-density Value line devices:
|
||||||
|
<span style="font-weight: bold; font-style: italic;">startup_stm32f10x_md_vl.s</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SystemInit() function is called from startup file (startup_stm32f10x_xx.s) before to branch to application main.<br>
|
||||||
|
To reconfigure the default setting of SystemInit() function, refer to system_stm32f10x.c file <br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">GNU startup file for Low density devices (startup_stm32f10x_ld.s) is updated to fix compilation errors.<br>
|
||||||
|
</span></li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
</ul>
|
||||||
|
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2>
|
||||||
|
<p class="MsoNormal" style="margin: 4.5pt 0cm;"><span style="font-size: 10pt; font-family: Verdana; color: black;">The
|
||||||
|
enclosed firmware and all the related documentation are not covered by
|
||||||
|
a License Agreement, if you need such License you can contact your
|
||||||
|
local STMicroelectronics office.<u1:p></u1:p><o:p></o:p></span></p>
|
||||||
|
<p class="MsoNormal"><b style=""><span style="font-size: 10pt; font-family: Verdana; color: black;">THE
|
||||||
|
PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO
|
||||||
|
SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR
|
||||||
|
ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY
|
||||||
|
CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY
|
||||||
|
CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH
|
||||||
|
THEIR PRODUCTS. <o:p></o:p></span></b></p>
|
||||||
|
<p class="MsoNormal"><span style="color: black;"><o:p> </o:p></span></p>
|
||||||
|
<div class="MsoNormal" style="text-align: center;" align="center"><span style="color: black;">
|
||||||
|
<hr align="center" size="2" width="100%"></span></div>
|
||||||
|
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt; text-align: center;" align="center"><span style="font-size: 10pt; font-family: Verdana; color: black;">For
|
||||||
|
complete documentation on </span><span style="font-size: 10pt; font-family: Verdana;">STM32(<span style="color: black;">CORTEX M3) 32-Bit Microcontrollers
|
||||||
|
visit </span><u><span style="color: blue;"><a href="http://www.st.com/stm32" target="_blank">www.st.com/STM32</a></span></u></span><span style="color: black;"><o:p></o:p></span></p>
|
||||||
|
</td>
|
||||||
|
</tr>
|
||||||
|
</tbody>
|
||||||
|
</table>
|
||||||
|
<p class="MsoNormal"><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||||
|
</td>
|
||||||
|
</tr>
|
||||||
|
</tbody>
|
||||||
|
</table>
|
||||||
|
</div>
|
||||||
|
<p class="MsoNormal"><o:p> </o:p></p>
|
||||||
|
</div>
|
||||||
|
</body></html>
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,98 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32f10x.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32f10x_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Define to prevent recursive inclusion
|
||||||
|
*/
|
||||||
|
#ifndef __SYSTEM_STM32F10X_H
|
||||||
|
#define __SYSTEM_STM32F10X_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Exported_types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_System_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
extern void SystemInit(void);
|
||||||
|
extern void SystemCoreClockUpdate(void);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__SYSTEM_STM32F10X_H */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,243 @@
|
||||||
|
<html>
|
||||||
|
|
||||||
|
<head>
|
||||||
|
<title>CMSIS Debug Support</title>
|
||||||
|
<meta http-equiv="Content-Type" content="text/html; charset=windows-1252">
|
||||||
|
<meta name="GENERATOR" content="Microsoft FrontPage 6.0">
|
||||||
|
<meta name="ProgId" content="FrontPage.Editor.Document">
|
||||||
|
<style>
|
||||||
|
<!--
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Keil Software CHM Style Sheet
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
body { color: #000000; background-color: #FFFFFF; font-size: 75%; font-family:
|
||||||
|
Verdana, Arial, 'Sans Serif' }
|
||||||
|
a:link { color: #0000FF; text-decoration: underline }
|
||||||
|
a:visited { color: #0000FF; text-decoration: underline }
|
||||||
|
a:active { color: #FF0000; text-decoration: underline }
|
||||||
|
a:hover { color: #FF0000; text-decoration: underline }
|
||||||
|
h1 { font-family: Verdana; font-size: 18pt; color: #000080; font-weight: bold;
|
||||||
|
text-align: Center; margin-right: 3 }
|
||||||
|
h2 { font-family: Verdana; font-size: 14pt; color: #000080; font-weight: bold;
|
||||||
|
background-color: #CCCCCC; margin-top: 24; margin-bottom: 3;
|
||||||
|
padding: 6 }
|
||||||
|
h3 { font-family: Verdana; font-size: 10pt; font-weight: bold; background-color:
|
||||||
|
#CCCCCC; margin-top: 24; margin-bottom: 3; padding: 6 }
|
||||||
|
pre { font-family: Courier New; font-size: 10pt; background-color: #CCFFCC;
|
||||||
|
margin-left: 24; margin-right: 24 }
|
||||||
|
ul { list-style-type: square; margin-top: 6pt; margin-bottom: 0 }
|
||||||
|
ol { margin-top: 6pt; margin-bottom: 0 }
|
||||||
|
li { clear: both; margin-bottom: 6pt }
|
||||||
|
table { font-size: 100%; border-width: 0; padding: 0 }
|
||||||
|
th { color: #FFFFFF; background-color: #000080; text-align: left; vertical-align:
|
||||||
|
bottom; padding-right: 6pt }
|
||||||
|
tr { text-align: left; vertical-align: top }
|
||||||
|
td { text-align: left; vertical-align: top; padding-right: 6pt }
|
||||||
|
.ToolT { font-size: 8pt; color: #808080 }
|
||||||
|
.TinyT { font-size: 8pt; text-align: Center }
|
||||||
|
code { color: #000000; background-color: #E0E0E0; font-family: 'Courier New', Courier;
|
||||||
|
line-height: 120%; font-style: normal }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Notes
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
p.note { font-weight: bold; clear: both; margin-bottom: 3pt; padding-top: 6pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Expanding/Contracting Divisions
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
#expand { text-decoration: none; margin-bottom: 3pt }
|
||||||
|
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|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
p.wh { font-weight: bold; clear: both; margin-top: 6pt; margin-bottom: 3pt }
|
||||||
|
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|
||||||
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|
||||||
|
6pt }
|
||||||
|
td.whDesc { padding-bottom: 6pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Keil Table Tags
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
table.kt { border: 1pt solid #000000 }
|
||||||
|
th.kt { white-space: nowrap; border-bottom: 1pt solid #000000; padding-left: 6pt;
|
||||||
|
padding-right: 6pt; padding-top: 4pt; padding-bottom: 4pt }
|
||||||
|
tr.kt { }
|
||||||
|
td.kt { color: #000000; background-color: #E0E0E0; border-top: 1pt solid #A0A0A0;
|
||||||
|
padding-left: 6pt; padding-right: 6pt; padding-top: 2pt;
|
||||||
|
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|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
-->
|
||||||
|
|
||||||
|
</style>
|
||||||
|
</head>
|
||||||
|
|
||||||
|
<body>
|
||||||
|
|
||||||
|
<h1>CMSIS Debug Support</h1>
|
||||||
|
|
||||||
|
<hr>
|
||||||
|
|
||||||
|
<h2>Cortex-M3 ITM Debug Access</h2>
|
||||||
|
<p>
|
||||||
|
The Cortex-M3 incorporates the Instrumented Trace Macrocell (ITM) that provides together with
|
||||||
|
the Serial Viewer Output trace capabilities for the microcontroller system. The ITM has
|
||||||
|
32 communication channels which are able to transmit 32 / 16 / 8 bit values; two ITM
|
||||||
|
communication channels are used by CMSIS to output the following information:
|
||||||
|
</p>
|
||||||
|
<ul>
|
||||||
|
<li>ITM Channel 0: used for printf-style output via the debug interface.</li>
|
||||||
|
<li>ITM Channel 31: is reserved for RTOS kernel awareness debugging.</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h2>Debug IN / OUT functions</h2>
|
||||||
|
<p>CMSIS provides following debug functions:</p>
|
||||||
|
<ul>
|
||||||
|
<li>ITM_SendChar (uses ITM channel 0)</li>
|
||||||
|
<li>ITM_ReceiveChar (uses global variable)</li>
|
||||||
|
<li>ITM_CheckChar (uses global variable)</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h3>ITM_SendChar</h3>
|
||||||
|
<p>
|
||||||
|
<strong>ITM_SendChar</strong> is used to transmit a character over ITM channel 0 from
|
||||||
|
the microcontroller system to the debug system. <br>
|
||||||
|
Only a 8 bit value is transmitted.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
static __INLINE uint32_t ITM_SendChar (uint32_t ch)
|
||||||
|
{
|
||||||
|
/* check if debugger connected and ITM channel enabled for tracing */
|
||||||
|
if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA) &&
|
||||||
|
(ITM->TCR & ITM_TCR_ITMENA) &&
|
||||||
|
(ITM->TER & (1UL << 0)) )
|
||||||
|
{
|
||||||
|
while (ITM->PORT[0].u32 == 0);
|
||||||
|
ITM->PORT[0].u8 = (uint8_t)ch;
|
||||||
|
}
|
||||||
|
return (ch);
|
||||||
|
}</pre>
|
||||||
|
|
||||||
|
<h3>ITM_ReceiveChar</h3>
|
||||||
|
<p>
|
||||||
|
ITM communication channel is only capable for OUT direction. For IN direction
|
||||||
|
a globel variable is used. A simple mechansim detects if a character is received.
|
||||||
|
The project to test need to be build with debug information.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<p>
|
||||||
|
The globale variable <strong>ITM_RxBuffer</strong> is used to transmit a 8 bit value from debug system
|
||||||
|
to microcontroller system. <strong>ITM_RxBuffer</strong> is 32 bit wide to enshure a proper handshake.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
extern volatile int ITM_RxBuffer; /* variable to receive characters */
|
||||||
|
</pre>
|
||||||
|
<p>
|
||||||
|
A dedicated bit pattern is used to determin if <strong>ITM_RxBuffer</strong> is empty
|
||||||
|
or contains a valid value.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /* value identifying ITM_RxBuffer is ready for next character */
|
||||||
|
</pre>
|
||||||
|
<p>
|
||||||
|
<strong>ITM_ReceiveChar</strong> is used to receive a 8 bit value from the debug system. The function is nonblocking.
|
||||||
|
It returns the received character or '-1' if no character was available.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
static __INLINE int ITM_ReceiveChar (void) {
|
||||||
|
int ch = -1; /* no character available */
|
||||||
|
|
||||||
|
if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
|
||||||
|
ch = ITM_RxBuffer;
|
||||||
|
ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
|
||||||
|
}
|
||||||
|
|
||||||
|
return (ch);
|
||||||
|
}
|
||||||
|
</pre>
|
||||||
|
|
||||||
|
<h3>ITM_CheckChar</h3>
|
||||||
|
<p>
|
||||||
|
<strong>ITM_CheckChar</strong> is used to check if a character is received.
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
static __INLINE int ITM_CheckChar (void) {
|
||||||
|
|
||||||
|
if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
|
||||||
|
return (0); /* no character available */
|
||||||
|
} else {
|
||||||
|
return (1); /* character available */
|
||||||
|
}
|
||||||
|
}</pre>
|
||||||
|
|
||||||
|
|
||||||
|
<h2>ITM Debug Support in uVision</h2>
|
||||||
|
<p>
|
||||||
|
uVision uses in a debug session the <strong>Debug (printf) Viewer</strong> window to
|
||||||
|
display the debug data.
|
||||||
|
</p>
|
||||||
|
<p>Direction microcontroller system -> uVision:</p>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
Characters received via ITM communication channel 0 are written in a printf style
|
||||||
|
to <strong>Debug (printf) Viewer</strong> window.
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<p>Direction uVision -> microcontroller system:</p>
|
||||||
|
<ul>
|
||||||
|
<li>Check if <strong>ITM_RxBuffer</strong> variable is available (only performed once).</li>
|
||||||
|
<li>Read character from <strong>Debug (printf) Viewer</strong> window.</li>
|
||||||
|
<li>If <strong>ITM_RxBuffer</strong> empty write character to <strong>ITM_RxBuffer</strong>.</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<p class="Note">Note</p>
|
||||||
|
<ul>
|
||||||
|
<li><p>Current solution does not use a buffer machanism for trasmitting the characters.</p>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h2>RTX Kernel awareness in uVision</h2>
|
||||||
|
<p>
|
||||||
|
uVision / RTX are using a simple and efficient solution for RTX Kernel awareness.
|
||||||
|
No format overhead is necessary.<br>
|
||||||
|
uVsion debugger decodes the RTX events via the 32 / 16 / 8 bit ITM write access
|
||||||
|
to ITM communication channel 31.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<p>Following RTX events are traced:</p>
|
||||||
|
<ul>
|
||||||
|
<li>Task Create / Delete event
|
||||||
|
<ol>
|
||||||
|
<li>32 bit access. Task start address is transmitted</li>
|
||||||
|
<li>16 bit access. Task ID and Create/Delete flag are transmitted<br>
|
||||||
|
High byte holds Create/Delete flag, Low byte holds TASK ID.
|
||||||
|
</li>
|
||||||
|
</ol>
|
||||||
|
</li>
|
||||||
|
<li>Task switch event
|
||||||
|
<ol>
|
||||||
|
<li>8 bit access. Task ID of current task is transmitted</li>
|
||||||
|
</ol>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<p class="Note">Note</p>
|
||||||
|
<ul>
|
||||||
|
<li><p>Other RTOS information could be retrieved via memory read access in a polling mode manner.</p>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
|
||||||
|
<p class="MsoNormal"><span lang="EN-GB"> </span></p>
|
||||||
|
|
||||||
|
<hr>
|
||||||
|
|
||||||
|
<p class="TinyT">Copyright © KEIL - An ARM Company.<br>
|
||||||
|
All rights reserved.<br>
|
||||||
|
Visit our web site at <a href="http://www.keil.com">www.keil.com</a>.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
</body>
|
||||||
|
|
||||||
|
</html>
|
|
@ -0,0 +1,320 @@
|
||||||
|
<html>
|
||||||
|
|
||||||
|
<head>
|
||||||
|
<title>CMSIS Changes</title>
|
||||||
|
<meta http-equiv="Content-Type" content="text/html; charset=windows-1252">
|
||||||
|
<meta name="GENERATOR" content="Microsoft FrontPage 6.0">
|
||||||
|
<meta name="ProgId" content="FrontPage.Editor.Document">
|
||||||
|
<style>
|
||||||
|
<!--
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Keil Software CHM Style Sheet
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
body { color: #000000; background-color: #FFFFFF; font-size: 75%; font-family:
|
||||||
|
Verdana, Arial, 'Sans Serif' }
|
||||||
|
a:link { color: #0000FF; text-decoration: underline }
|
||||||
|
a:visited { color: #0000FF; text-decoration: underline }
|
||||||
|
a:active { color: #FF0000; text-decoration: underline }
|
||||||
|
a:hover { color: #FF0000; text-decoration: underline }
|
||||||
|
h1 { font-family: Verdana; font-size: 18pt; color: #000080; font-weight: bold;
|
||||||
|
text-align: Center; margin-right: 3 }
|
||||||
|
h2 { font-family: Verdana; font-size: 14pt; color: #000080; font-weight: bold;
|
||||||
|
background-color: #CCCCCC; margin-top: 24; margin-bottom: 3;
|
||||||
|
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|
||||||
|
h3 { font-family: Verdana; font-size: 10pt; font-weight: bold; background-color:
|
||||||
|
#CCCCCC; margin-top: 24; margin-bottom: 3; padding: 6 }
|
||||||
|
pre { font-family: Courier New; font-size: 10pt; background-color: #CCFFCC;
|
||||||
|
margin-left: 24; margin-right: 24 }
|
||||||
|
ul { list-style-type: square; margin-top: 6pt; margin-bottom: 0 }
|
||||||
|
ol { margin-top: 6pt; margin-bottom: 0 }
|
||||||
|
li { clear: both; margin-bottom: 6pt }
|
||||||
|
table { font-size: 100%; border-width: 0; padding: 0 }
|
||||||
|
th { color: #FFFFFF; background-color: #000080; text-align: left; vertical-align:
|
||||||
|
bottom; padding-right: 6pt }
|
||||||
|
tr { text-align: left; vertical-align: top }
|
||||||
|
td { text-align: left; vertical-align: top; padding-right: 6pt }
|
||||||
|
.ToolT { font-size: 8pt; color: #808080 }
|
||||||
|
.TinyT { font-size: 8pt; text-align: Center }
|
||||||
|
code { color: #000000; background-color: #E0E0E0; font-family: 'Courier New', Courier;
|
||||||
|
line-height: 120%; font-style: normal }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Notes
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
p.note { font-weight: bold; clear: both; margin-bottom: 3pt; padding-top: 6pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Expanding/Contracting Divisions
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
#expand { text-decoration: none; margin-bottom: 3pt }
|
||||||
|
img.expand { border-style: none; border-width: medium }
|
||||||
|
div.expand { display: none; margin-left: 9pt; margin-top: 0 }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Where List Tags
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
p.wh { font-weight: bold; clear: both; margin-top: 6pt; margin-bottom: 3pt }
|
||||||
|
table.wh { width: 100% }
|
||||||
|
td.whItem { white-space: nowrap; font-style: italic; padding-right: 6pt; padding-bottom:
|
||||||
|
6pt }
|
||||||
|
td.whDesc { padding-bottom: 6pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
Keil Table Tags
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
table.kt { border: 1pt solid #000000 }
|
||||||
|
th.kt { white-space: nowrap; border-bottom: 1pt solid #000000; padding-left: 6pt;
|
||||||
|
padding-right: 6pt; padding-top: 4pt; padding-bottom: 4pt }
|
||||||
|
tr.kt { }
|
||||||
|
td.kt { color: #000000; background-color: #E0E0E0; border-top: 1pt solid #A0A0A0;
|
||||||
|
padding-left: 6pt; padding-right: 6pt; padding-top: 2pt;
|
||||||
|
padding-bottom: 2pt }
|
||||||
|
/*-----------------------------------------------------------
|
||||||
|
-----------------------------------------------------------*/
|
||||||
|
-->
|
||||||
|
|
||||||
|
</style>
|
||||||
|
</head>
|
||||||
|
|
||||||
|
<body>
|
||||||
|
|
||||||
|
<h1>Changes to CMSIS version V1.20</h1>
|
||||||
|
|
||||||
|
<hr>
|
||||||
|
|
||||||
|
<h2>1. Removed CMSIS Middelware packages</h2>
|
||||||
|
<p>
|
||||||
|
CMSIS Middleware is on hold from ARM side until a agreement between all CMSIS partners is found.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<h2>2. SystemFrequency renamed to SystemCoreClock</h2>
|
||||||
|
<p>
|
||||||
|
The variable name <strong>SystemCoreClock</strong> is more precise than <strong>SystemFrequency</strong>
|
||||||
|
because the variable holds the clock value at which the core is running.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<h2>3. Changed startup concept</h2>
|
||||||
|
<p>
|
||||||
|
The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit
|
||||||
|
from main) has the weakness that it does not work for controllers which need a already
|
||||||
|
configuerd clock system to configure the external memory controller.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<h3>Changed startup concept</h3>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
SystemInit() is called from startup file before <strong>premain</strong>.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<strong>SystemInit()</strong> configures the clock system and also configures
|
||||||
|
an existing external memory controller.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<strong>SystemInit()</strong> must not use global variables.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<strong>SystemCoreClock</strong> is initialized with a correct predefined value.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
Additional function <strong>void SystemCoreClockUpdate (void)</strong> is provided.<br>
|
||||||
|
<strong>SystemCoreClockUpdate()</strong> updates the variable <strong>SystemCoreClock</strong>
|
||||||
|
and must be called whenever the core clock is changed.<br>
|
||||||
|
<strong>SystemCoreClockUpdate()</strong> evaluates the clock register settings and calculates
|
||||||
|
the current core clock.
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
|
||||||
|
<h2>4. Advanced Debug Functions</h2>
|
||||||
|
<p>
|
||||||
|
ITM communication channel is only capable for OUT direction. To allow also communication for
|
||||||
|
IN direction a simple concept is provided.
|
||||||
|
</p>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
Global variable <strong>volatile int ITM_RxBuffer</strong> used for IN data.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
Function <strong>int ITM_CheckChar (void)</strong> checks if a new character is available.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
Function <strong>int ITM_ReceiveChar (void)</strong> retrieves the new character.
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<p>
|
||||||
|
For detailed explanation see file <strong>CMSIS debug support.htm</strong>.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
|
||||||
|
<h2>5. Core Register Bit Definitions</h2>
|
||||||
|
<p>
|
||||||
|
Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the
|
||||||
|
defines correspond with the Cortex-M Technical Reference Manual.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
e.g. SysTick structure with bit definitions
|
||||||
|
</p>
|
||||||
|
<pre>
|
||||||
|
/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick
|
||||||
|
memory mapped structure for SysTick
|
||||||
|
@{
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
__IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */
|
||||||
|
__IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */
|
||||||
|
__IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */
|
||||||
|
__I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */
|
||||||
|
} SysTick_Type;
|
||||||
|
|
||||||
|
/* SysTick Control / Status Register Definitions */
|
||||||
|
#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
|
||||||
|
#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
|
||||||
|
|
||||||
|
#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
|
||||||
|
#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
|
||||||
|
|
||||||
|
#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
|
||||||
|
#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
|
||||||
|
|
||||||
|
#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
|
||||||
|
#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
|
||||||
|
|
||||||
|
/* SysTick Reload Register Definitions */
|
||||||
|
#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
|
||||||
|
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
|
||||||
|
|
||||||
|
/* SysTick Current Register Definitions */
|
||||||
|
#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
|
||||||
|
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
|
||||||
|
|
||||||
|
/* SysTick Calibration Register Definitions */
|
||||||
|
#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
|
||||||
|
#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
|
||||||
|
|
||||||
|
#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
|
||||||
|
#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
|
||||||
|
|
||||||
|
#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
|
||||||
|
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
|
||||||
|
/*@}*/ /* end of group CMSIS_CM3_SysTick */</pre>
|
||||||
|
|
||||||
|
<h2>7. DoxyGen Tags</h2>
|
||||||
|
<p>
|
||||||
|
DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation
|
||||||
|
using DoxyGen.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<h2>8. Folder Structure</h2>
|
||||||
|
<p>
|
||||||
|
The folder structure is changed to differentiate the single support packages.
|
||||||
|
</p>
|
||||||
|
|
||||||
|
<ul>
|
||||||
|
<li>CM0</li>
|
||||||
|
<li>CM3
|
||||||
|
<ul>
|
||||||
|
<li>CoreSupport</li>
|
||||||
|
<li>DeviceSupport</li>
|
||||||
|
<ul>
|
||||||
|
<li>Vendor
|
||||||
|
<ul>
|
||||||
|
<li>Device
|
||||||
|
<ul>
|
||||||
|
<li>Startup
|
||||||
|
<ul>
|
||||||
|
<li>Toolchain</li>
|
||||||
|
<li>Toolchain</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
<li>Device</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
<li>Vendor</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
<li>Example
|
||||||
|
<ul>
|
||||||
|
<li>Toolchain
|
||||||
|
<ul>
|
||||||
|
<li>Device</li>
|
||||||
|
<li>Device</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
<li>Toolchain</li>
|
||||||
|
<li>...</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
</li>
|
||||||
|
|
||||||
|
<li>Documentation</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h2>9. Open Points</h2>
|
||||||
|
<p>
|
||||||
|
Following points need to be clarified and solved:
|
||||||
|
</p>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
<p>
|
||||||
|
Equivalent C and Assembler startup files.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
Is there a need for having C startup files although assembler startup files are
|
||||||
|
very efficient and do not need to be changed?
|
||||||
|
<p/>
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<p>
|
||||||
|
Placing of HEAP in external RAM.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
It must be possible to place HEAP in external RAM if the device supports an
|
||||||
|
external memory controller.
|
||||||
|
</p>
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<p>
|
||||||
|
Placing of STACK /HEAP.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
STACK should always be placed at the end of internal RAM.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
If HEAP is placed in internal RAM than it should be placed after RW ZI section.
|
||||||
|
</p>
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
<p>
|
||||||
|
Removing core_cm3.c and core_cm0.c.
|
||||||
|
</p>
|
||||||
|
<p>
|
||||||
|
On a long term the functions in core_cm3.c and core_cm0.c must be replaced with
|
||||||
|
appropriate compiler intrinsics.
|
||||||
|
</p>
|
||||||
|
</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
|
||||||
|
<h2>10. Limitations</h2>
|
||||||
|
<p>
|
||||||
|
The following limitations are not covered with the current CMSIS version:
|
||||||
|
</p>
|
||||||
|
<ul>
|
||||||
|
<li>
|
||||||
|
No <strong>C startup files</strong> for ARM toolchain are provided.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
No <strong>C startup files</strong> for GNU toolchain are provided.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
No <strong>C startup files</strong> for IAR toolchain are provided.
|
||||||
|
</li>
|
||||||
|
<li>
|
||||||
|
No <strong>Tasking</strong> projects are provided yet.
|
||||||
|
</li>
|
||||||
|
</ul>
|
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|
@ -0,0 +1,342 @@
|
||||||
|
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||||
|
<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||||
|
<link rel="File-List" href="Library_files/filelist.xml">
|
||||||
|
<link rel="Edit-Time-Data" href="Library_files/editdata.mso"><!--[if !mso]> <style> v\:* {behavior:url(#default#VML);} o\:* {behavior:url(#default#VML);} w\:* {behavior:url(#default#VML);} .shape {behavior:url(#default#VML);} </style> <![endif]--><title>Release Notes for STM32F10x Standard Peripherals Library Drivers</title><!--[if gte mso 9]><xml> <o:DocumentProperties> <o:Author>STMicroelectronics</o:Author> <o:LastAuthor>STMicroelectronics</o:LastAuthor> <o:Revision>37</o:Revision> <o:TotalTime>136</o:TotalTime> <o:Created>2009-02-27T19:26:00Z</o:Created> <o:LastSaved>2009-03-01T17:56:00Z</o:LastSaved> <o:Pages>1</o:Pages> <o:Words>522</o:Words> <o:Characters>2977</o:Characters> <o:Company>STMicroelectronics</o:Company> <o:Lines>24</o:Lines> <o:Paragraphs>6</o:Paragraphs> <o:CharactersWithSpaces>3493</o:CharactersWithSpaces> <o:Version>11.6568</o:Version> </o:DocumentProperties> </xml><![endif]--><!--[if gte mso 9]><xml> <w:WordDocument> <w:Zoom>110</w:Zoom> <w:ValidateAgainstSchemas/> <w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid> <w:IgnoreMixedContent>false</w:IgnoreMixedContent> <w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText> <w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel> </w:WordDocument> </xml><![endif]--><!--[if gte mso 9]><xml> <w:LatentStyles DefLockedState="false" LatentStyleCount="156"> </w:LatentStyles> </xml><![endif]-->
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
<style>
|
||||||
|
<!--
|
||||||
|
/* Style Definitions */
|
||||||
|
p.MsoNormal, li.MsoNormal, div.MsoNormal
|
||||||
|
{mso-style-parent:"";
|
||||||
|
margin:0in;
|
||||||
|
margin-bottom:.0001pt;
|
||||||
|
mso-pagination:widow-orphan;
|
||||||
|
font-size:12.0pt;
|
||||||
|
font-family:"Times New Roman";
|
||||||
|
mso-fareast-font-family:"Times New Roman";}
|
||||||
|
h2
|
||||||
|
{mso-style-next:Normal;
|
||||||
|
margin-top:12.0pt;
|
||||||
|
margin-right:0in;
|
||||||
|
margin-bottom:3.0pt;
|
||||||
|
margin-left:0in;
|
||||||
|
mso-pagination:widow-orphan;
|
||||||
|
page-break-after:avoid;
|
||||||
|
mso-outline-level:2;
|
||||||
|
font-size:14.0pt;
|
||||||
|
font-family:Arial;
|
||||||
|
font-weight:bold;
|
||||||
|
font-style:italic;}
|
||||||
|
a:link, span.MsoHyperlink
|
||||||
|
{color:blue;
|
||||||
|
text-decoration:underline;
|
||||||
|
text-underline:single;}
|
||||||
|
a:visited, span.MsoHyperlinkFollowed
|
||||||
|
{color:blue;
|
||||||
|
text-decoration:underline;
|
||||||
|
text-underline:single;}
|
||||||
|
p
|
||||||
|
{mso-margin-top-alt:auto;
|
||||||
|
margin-right:0in;
|
||||||
|
mso-margin-bottom-alt:auto;
|
||||||
|
margin-left:0in;
|
||||||
|
mso-pagination:widow-orphan;
|
||||||
|
font-size:12.0pt;
|
||||||
|
font-family:"Times New Roman";
|
||||||
|
mso-fareast-font-family:"Times New Roman";}
|
||||||
|
@page Section1
|
||||||
|
{size:8.5in 11.0in;
|
||||||
|
margin:1.0in 1.25in 1.0in 1.25in;
|
||||||
|
mso-header-margin:.5in;
|
||||||
|
mso-footer-margin:.5in;
|
||||||
|
mso-paper-source:0;}
|
||||||
|
div.Section1
|
||||||
|
{page:Section1;}
|
||||||
|
-->
|
||||||
|
</style><!--[if gte mso 10]> <style> /* Style Definitions */ table.MsoNormalTable {mso-style-name:"Table Normal"; mso-tstyle-rowband-size:0; mso-tstyle-colband-size:0; mso-style-noshow:yes; mso-style-parent:""; mso-padding-alt:0in 5.4pt 0in 5.4pt; mso-para-margin:0in; mso-para-margin-bottom:.0001pt; mso-pagination:widow-orphan; font-size:10.0pt; font-family:"Times New Roman"; mso-ansi-language:#0400; mso-fareast-language:#0400; mso-bidi-language:#0400;} </style> <![endif]--><!--[if gte mso 9]><xml> <o:shapedefaults v:ext="edit" spidmax="5122"/> </xml><![endif]--><!--[if gte mso 9]><xml> <o:shapelayout v:ext="edit"> <o:idmap v:ext="edit" data="1"/> </o:shapelayout></xml><![endif]--></head>
|
||||||
|
<body lang="EN-US" link="blue" vlink="blue">
|
||||||
|
<div class="Section1">
|
||||||
|
<p class="MsoNormal"><span style="font-family: Arial;"><o:p><br>
|
||||||
|
</o:p></span></p>
|
||||||
|
<div align="center">
|
||||||
|
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||||
|
<tbody>
|
||||||
|
<tr style="">
|
||||||
|
<td style="padding: 0cm;" valign="top">
|
||||||
|
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||||
|
<tbody>
|
||||||
|
<tr>
|
||||||
|
<td style="vertical-align: top;"><span style="font-size: 8pt; font-family: Arial; color: blue;"><a href="../../Release_Notes.html">Back to Release page</a></span></td>
|
||||||
|
</tr>
|
||||||
|
<tr style="">
|
||||||
|
<td style="padding: 1.5pt;">
|
||||||
|
<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
|
||||||
|
Notes for STM32F10x Standard Peripherals Library Drivers
|
||||||
|
(StdPeriph_Driver)</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
|
||||||
|
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright 2011 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||||
|
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;"><img alt="" id="_x0000_i1025" src="../../_htmresc/logo.bmp" style="border: 0px solid ; width: 86px; height: 65px;"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||||
|
</td>
|
||||||
|
</tr>
|
||||||
|
</tbody>
|
||||||
|
</table>
|
||||||
|
<p class="MsoNormal"><span style="font-family: Arial; display: none;"><o:p> </o:p></span></p>
|
||||||
|
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" width="900">
|
||||||
|
<tbody>
|
||||||
|
<tr>
|
||||||
|
<td style="padding: 0cm;" valign="top">
|
||||||
|
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
|
||||||
|
<ol style="margin-top: 0cm;" start="1" type="1">
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32F10x Standard Peripherals Library
|
||||||
|
Drivers update History</a><o:p></o:p></span></li>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
|
||||||
|
</ol>
|
||||||
|
<span style="font-family: "Times New Roman";">
|
||||||
|
</span>
|
||||||
|
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F10x Standard
|
||||||
|
Peripherals Library Drivers update History</span></h2><br>
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V3.5.0 / 11-March-2011<o:p></o:p></span></h3>
|
||||||
|
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||||
|
Changes<o:p></o:p></span></u></b></p>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0cm;" type="square">
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_can.h/.c files:</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add 5 new functions</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">3
|
||||||
|
new functions controlling the counter errors: CAN_GetLastErrorCode(),
|
||||||
|
CAN_GetReceiveErrorCounter() and CAN_GetLSBTransmitErrorCounter().</span></li>
|
||||||
|
</ul>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">1 new function to select the CAN operating mode: CAN_OperatingModeRequest().</span></li>
|
||||||
|
</ul>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">1 new function to support CAN TT mode: CAN_TTComModeCmd().</span><span style="font-size: 10pt; font-family: Verdana;"><br>
|
||||||
|
</span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">CAN_TransmitStatus() function updated to support all CAN transmit intermediate states<br>
|
||||||
|
</span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_i2c.h/.c files:</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add 1 new function:</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">I2C_NACKPositionConfig():
|
||||||
|
This function configures the same bit (POS) as I2C_PECPositionConfig()
|
||||||
|
but is intended to be used in I2C mode while I2C_PECPositionConfig() is
|
||||||
|
intended to used in SMBUS mode.</span></li>
|
||||||
|
</ul>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_tim.h/.c files:</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Change the <span style="font-style: italic;">TIM_DMABurstLength_xBytes</span> definitions to <span style="font-style: italic;">TIM_DMABurstLength_xTansfers</span><br>
|
||||||
|
</span></li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.4.0
|
||||||
|
- 10/15/2010</span></h3>
|
||||||
|
|
||||||
|
<ol style="margin-top: 0in;" start="1" type="1">
|
||||||
|
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li>
|
||||||
|
</ol>
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support for <span style="font-weight: bold;">STM32F10x High-density value line </span>devices.</span></li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<ol style="margin-top: 0in;" start="2" type="1">
|
||||||
|
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x_StdPeriph_Driver</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li>
|
||||||
|
</ol>
|
||||||
|
|
||||||
|
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
|
||||||
|
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_bkp.h/.c</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete BKP registers definition from stm32f10x_bkp.c and use defines within stm32f10x.h file. </span></span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_can.h/.c</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete CAN registers definition from stm32f10x_can.c and use defines within stm32f10x.h file.<br>
|
||||||
|
</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Update the wording of some defines and Asserts macro. <br>
|
||||||
|
</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">CAN_GetFlagStatus()
|
||||||
|
and CAN_ClearFlag() functions: updated to support new flags (were not
|
||||||
|
supported in previous version). These flags are: CAN_FLAG_RQCP0,
|
||||||
|
CAN_FLAG_RQCP1, CAN_FLAG_RQCP2, CAN_FLAG_FMP1, CAN_FLAG_FF1,
|
||||||
|
CAN_FLAG_FOV1, CAN_FLAG_FMP0, CAN_FLAG_FF0, CAN_FLAG_FOV0,
|
||||||
|
CAN_FLAG_WKU, CAN_FLAG_SLAK and CAN_FLAG_LEC. <br>
|
||||||
|
</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">CAN_GetITStatus()
|
||||||
|
function: add a check of the interrupt enable bit before getting the
|
||||||
|
status of corresponding interrupt pending bit. <br>
|
||||||
|
</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">CAN_ClearITPendingBit() function: correct the procedure to clear the interrupt pending bit. <br>
|
||||||
|
</span></span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_crc.h/.c</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete CRC registers definition from stm32f10x_crc.c and use defines within stm32f10x.h file.</span></span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dac.h/.c</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete DAC registers definition from stm32f10x_dac.c and use defines within stm32f10x.h file. </span></span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dbgmcu.h/.c</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete DBGMCU registers definition from stm32f10x_dbgmcu.c and use defines within stm32f10x.h file. </span></span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dma.h/.c</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete DMA registers definition from stm32f10x_dma.c and use defines within stm32f10x.h file.</span></span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new function "void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber);"<br>
|
||||||
|
</span></span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_flash.h/.c</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">FLASH functions (Erase and Program) updated to always clear the "PG", "MER" and "PER" bits even in case of TimeOut Error.</span><span style="font-style: italic;"></span></span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_fsmc.h/.c</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new member "FSMC_AsynchronousWait" in "FSMC_NORSRAMInitTypeDef" structure.</span><span style="font-style: italic;"></span></span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_gpio.h/.c</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">GPIO_PinRemapConfig()</span> function: add new values for <span style="font-style: italic;">GPIO_Remap</span> parameter, to support new <span style="font-style: italic;">remap for TIM6, TIM7 and DAC DMA requests, TIM12 and DAC Triggers / DMA2_Channel5 Interrupt mapping.</span></span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_pwr.h/.c</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete PWR registers definition from stm32f10x_pwr.c and use defines within stm32f10x.h and core_cm3.h files.</span></span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_rtc.h/.c</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Delete RTC registers definition from stm32f10x_rtc.c and use defines within stm32f10x.h file.</span></span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_spi.h/.c</span></li>
|
||||||
|
<ul>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new definition for I2S Audio Clock frequencies "I2S_AudioFreq_192k".</span></span></li>
|
||||||
|
</ul>
|
||||||
|
<li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_tim.h/.c</span></li>
|
||||||
|
<ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">Add new definition for TIM Input Capture Polarity "TIM_ICPolarity_BothEdge".</span></span></li></ul>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.3.0
|
||||||
|
- 04/16/2010</span></h3>
|
||||||
|
|
||||||
|
<ol style="margin-top: 0in;" start="1" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li></ol>
|
||||||
|
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support for <span style="font-weight: bold;">STM32F10x XL-density </span>devices.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">I2C driver: events description and management enhancement.</span></li></ul>
|
||||||
|
<ol style="margin-top: 0in;" start="2" type="1"><li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x_StdPeriph_Driver</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li></ol>
|
||||||
|
<ul style="margin-top: 0in;" type="disc"><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_dbgmcu.h/.c</span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">DBGMCU_Config()</span> function: add new values <span style="font-style: italic;">DBGMCU_TIMx_STOP</span> (x: 9..14) for <span style="font-style: italic;">DBGMCU_Periph</span> parameter.</span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_flash.h/.c:
|
||||||
|
updated to support Bank2 of XL-density devices (up to 1MByte of Flash
|
||||||
|
memory). For more details, refer to the description provided within
|
||||||
|
stm32f10x_flash.c file.</span></li><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_gpio.h/.c</span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">GPIO_PinRemapConfig()</span> function: add new values for <span style="font-style: italic;">GPIO_Remap</span> parameter, to support new <span style="font-style: italic;">remap for FSMC_NADV pin and TIM9..11,13,14.</span></span></li></ul><li class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_i2c.h/.c: I2C events description and management enhancement. <br></span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">I2C_CheckEvent()</span>
|
||||||
|
function: updated to check whether the last event contains the
|
||||||
|
I2C_EVENT (instead of check whether the last event is equal to
|
||||||
|
I2C_EVENT)<br></span></li></ul><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add
|
||||||
|
detailed description of I2C events and how to manage them using the
|
||||||
|
functions provided by this driver. For more information, refer to
|
||||||
|
stm32f10x_i2c.h and stm32f10x_i2c.c files.</span></li></ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_rcc.h/.c: updated to support TIM9..TIM14 APB clock and reset configuration</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_tim.h/.c: updated to support new Timers TIM9..TIM14.</span></li><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">stm32f10x_sdio.h: </span></li><ul><li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">SDIO_SetSDIOReadWaitMode() function: correct values of SDIO_ReadWaitMode parameter<br>change <br>
|
||||||
|
#define
|
||||||
|
SDIO_ReadWaitMode_CLK
|
||||||
|
((uint32_t)0x00000000)<br> #define
|
||||||
|
SDIO_ReadWaitMode_DATA2
|
||||||
|
((uint32_t)0x00000001)<br>by<br> #define
|
||||||
|
SDIO_ReadWaitMode_CLK
|
||||||
|
((uint32_t)0x00000001)<br> #define
|
||||||
|
SDIO_ReadWaitMode_DATA2
|
||||||
|
((uint32_t)0x00000000)</span></li></ul></ul>
|
||||||
|
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 558.05pt;"><span style="font-size: 10pt; font-family: Arial; color: white;">3.2.0
|
||||||
|
- 03/01/2010</span></h3>
|
||||||
|
<ol style="margin-top: 0in;" start="1" type="1">
|
||||||
|
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">General</span></i></b><i><span style="font-size: 10pt; font-family: Verdana;"> </span></i><i><span style="font-size: 10pt;"><o:p></o:p></span></i></li>
|
||||||
|
</ol>
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add support
|
||||||
|
for <b>STM32 Low-density Value line (STM32F100x4/6) and
|
||||||
|
Medium-density Value line (STM32F100x8/B) devices</b>.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Almost
|
||||||
|
peripherals drivers were updated to support Value
|
||||||
|
line devices features</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Drivers limitations fix and enhancements. </span><span style="font-size: 10pt;"><o:p></o:p></span></li>
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
<ol style="margin-top: 0in;" start="2" type="1">
|
||||||
|
<li class="MsoNormal" style=""><b><i><span style="font-size: 10pt; font-family: Verdana;">STM32F10x_StdPeriph_Driver</span></i></b><b><i><span style="font-size: 10pt;"><o:p></o:p></span></i></b></li>
|
||||||
|
</ol>
|
||||||
|
<ul style="margin-top: 0in;" type="disc">
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Add new
|
||||||
|
firmware driver for CEC peripheral: stm32f10x_cec.h and stm32f10x_cec.c</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">Timers drivers stm32f10x_tim.h/.c: add support for new General Purpose Timers: TIM15, TIM16 and TIM17.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">RCC driver: add support for new Value peripherals: HDMI-CEC, TIM15, TIM16 and TIM17.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">GPIO driver: add new remap parameters for TIM1, TIM15, TIM16, TIM17 and HDMI-CEC: </span><span style="font-size: 10pt; font-family: Verdana;">GPIO_Remap_TIM1_DMA, </span><span style="font-size: 10pt; font-family: Verdana;">GPIO_Remap_TIM15, GPIO_Remap_TIM16, GPIO_Remap_TIM17, GPIO_Remap_CEC.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">USART
|
||||||
|
driver: add support for Oversampling by 8 mode and onebit method. 2
|
||||||
|
functions has been added: USART_OverSampling8Cmd() and
|
||||||
|
USART_OneBitMethodCmd().<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">DAC
|
||||||
|
driver: add new functions handling the DAC under run feature:
|
||||||
|
DAC_ITConfig(), DAC_GetFlagStatus(), DAC_ClearFlag(), DAC_GetITStatus()
|
||||||
|
and DAC_ClearITPendingBit().</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">DBGMCU driver: add new parameters for TIM15, TIM16 and TIM17: DBGMCU_TIM15_STOP, DBGMCU_TIM16_STOP, DBGMCU_TIM17_STOP.<br>
|
||||||
|
</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">FLASH
|
||||||
|
driver: the FLASH_EraseOptionBytes() function updated. This is now just
|
||||||
|
erasing the option bytes without modifying the RDP status either
|
||||||
|
enabled or disabled.</span></li>
|
||||||
|
<li class="MsoNormal" style=""><span style="font-size: 10pt; font-family: Verdana;">PWR
|
||||||
|
driver: the PWR_EnterSTOPMode() function updated. When woken up from
|
||||||
|
STOP mode, this function resets again the SLEEPDEEP bit in the
|
||||||
|
Cortex-M3 System Control register to allow Sleep mode entering.</span></li>
|
||||||
|
|
||||||
|
|
||||||
|
</ul>
|
||||||
|
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2>
|
||||||
|
<p class="MsoNormal" style="margin: 4.5pt 0cm;"><span style="font-size: 10pt; font-family: Verdana; color: black;">The
|
||||||
|
enclosed firmware and all the related documentation are not covered by
|
||||||
|
a License Agreement, if you need such License you can contact your
|
||||||
|
local STMicroelectronics office.<u1:p></u1:p><o:p></o:p></span></p>
|
||||||
|
<p class="MsoNormal"><b style=""><span style="font-size: 10pt; font-family: Verdana; color: black;">THE
|
||||||
|
PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO
|
||||||
|
SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR
|
||||||
|
ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY
|
||||||
|
CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY
|
||||||
|
CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH
|
||||||
|
THEIR PRODUCTS. <o:p></o:p></span></b></p>
|
||||||
|
<p class="MsoNormal"><span style="color: black;"><o:p> </o:p></span></p>
|
||||||
|
<div class="MsoNormal" style="text-align: center;" align="center"><span style="color: black;">
|
||||||
|
<hr align="center" size="2" width="100%"></span></div>
|
||||||
|
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt; text-align: center;" align="center"><span style="font-size: 10pt; font-family: Verdana; color: black;">For
|
||||||
|
complete documentation on </span><span style="font-size: 10pt; font-family: Verdana;">STM32(<span style="color: black;">CORTEX M3) 32-Bit Microcontrollers
|
||||||
|
visit </span><u><span style="color: blue;"><a href="http://www.st.com/stm32" target="_blank">www.st.com/STM32</a></span></u></span><span style="color: black;"><o:p></o:p></span></p>
|
||||||
|
</td>
|
||||||
|
</tr>
|
||||||
|
</tbody>
|
||||||
|
</table>
|
||||||
|
<p class="MsoNormal"><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||||
|
</td>
|
||||||
|
</tr>
|
||||||
|
</tbody>
|
||||||
|
</table>
|
||||||
|
</div>
|
||||||
|
<p class="MsoNormal"><o:p> </o:p></p>
|
||||||
|
</div>
|
||||||
|
</body></html>
|
|
@ -0,0 +1,220 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file misc.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the miscellaneous
|
||||||
|
* firmware library functions (add-on to CMSIS functions).
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __MISC_H
|
||||||
|
#define __MISC_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup MISC
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup MISC_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief NVIC Init Structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
|
||||||
|
This parameter can be a value of @ref IRQn_Type
|
||||||
|
(For the complete STM32 Devices IRQ Channels list, please
|
||||||
|
refer to stm32f10x.h file) */
|
||||||
|
|
||||||
|
uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel
|
||||||
|
specified in NVIC_IRQChannel. This parameter can be a value
|
||||||
|
between 0 and 15 as described in the table @ref NVIC_Priority_Table */
|
||||||
|
|
||||||
|
uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified
|
||||||
|
in NVIC_IRQChannel. This parameter can be a value
|
||||||
|
between 0 and 15 as described in the table @ref NVIC_Priority_Table */
|
||||||
|
|
||||||
|
FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
|
||||||
|
will be enabled or disabled.
|
||||||
|
This parameter can be set either to ENABLE or DISABLE */
|
||||||
|
} NVIC_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup NVIC_Priority_Table
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
@code
|
||||||
|
The table below gives the allowed values of the pre-emption priority and subpriority according
|
||||||
|
to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function
|
||||||
|
============================================================================================================================
|
||||||
|
NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
|
||||||
|
============================================================================================================================
|
||||||
|
NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority
|
||||||
|
| | | 4 bits for subpriority
|
||||||
|
----------------------------------------------------------------------------------------------------------------------------
|
||||||
|
NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority
|
||||||
|
| | | 3 bits for subpriority
|
||||||
|
----------------------------------------------------------------------------------------------------------------------------
|
||||||
|
NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
|
||||||
|
| | | 2 bits for subpriority
|
||||||
|
----------------------------------------------------------------------------------------------------------------------------
|
||||||
|
NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
|
||||||
|
| | | 1 bits for subpriority
|
||||||
|
----------------------------------------------------------------------------------------------------------------------------
|
||||||
|
NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority
|
||||||
|
| | | 0 bits for subpriority
|
||||||
|
============================================================================================================================
|
||||||
|
@endcode
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup MISC_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Vector_Table_Base
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define NVIC_VectTab_RAM ((uint32_t)0x20000000)
|
||||||
|
#define NVIC_VectTab_FLASH ((uint32_t)0x08000000)
|
||||||
|
#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
|
||||||
|
((VECTTAB) == NVIC_VectTab_FLASH))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup System_Low_Power
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define NVIC_LP_SEVONPEND ((uint8_t)0x10)
|
||||||
|
#define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
|
||||||
|
#define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
|
||||||
|
#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
|
||||||
|
((LP) == NVIC_LP_SLEEPDEEP) || \
|
||||||
|
((LP) == NVIC_LP_SLEEPONEXIT))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Preemption_Priority_Group
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
|
||||||
|
4 bits for subpriority */
|
||||||
|
#define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
|
||||||
|
3 bits for subpriority */
|
||||||
|
#define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
|
||||||
|
2 bits for subpriority */
|
||||||
|
#define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
|
||||||
|
1 bits for subpriority */
|
||||||
|
#define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
|
||||||
|
0 bits for subpriority */
|
||||||
|
|
||||||
|
#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
|
||||||
|
((GROUP) == NVIC_PriorityGroup_1) || \
|
||||||
|
((GROUP) == NVIC_PriorityGroup_2) || \
|
||||||
|
((GROUP) == NVIC_PriorityGroup_3) || \
|
||||||
|
((GROUP) == NVIC_PriorityGroup_4))
|
||||||
|
|
||||||
|
#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
|
||||||
|
|
||||||
|
#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
|
||||||
|
|
||||||
|
#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SysTick_clock_source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
|
||||||
|
#define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
|
||||||
|
#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
|
||||||
|
((SOURCE) == SysTick_CLKSource_HCLK_Div8))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup MISC_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup MISC_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
|
||||||
|
void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
|
||||||
|
void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
|
||||||
|
void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
|
||||||
|
void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __MISC_H */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,483 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_adc.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the ADC firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_ADC_H
|
||||||
|
#define __STM32F10x_ADC_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup ADC
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief ADC Init structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t ADC_Mode; /*!< Configures the ADC to operate in independent or
|
||||||
|
dual mode.
|
||||||
|
This parameter can be a value of @ref ADC_mode */
|
||||||
|
|
||||||
|
FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in
|
||||||
|
Scan (multichannels) or Single (one channel) mode.
|
||||||
|
This parameter can be set to ENABLE or DISABLE */
|
||||||
|
|
||||||
|
FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in
|
||||||
|
Continuous or Single mode.
|
||||||
|
This parameter can be set to ENABLE or DISABLE. */
|
||||||
|
|
||||||
|
uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog
|
||||||
|
to digital conversion of regular channels. This parameter
|
||||||
|
can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */
|
||||||
|
|
||||||
|
uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
|
||||||
|
This parameter can be a value of @ref ADC_data_align */
|
||||||
|
|
||||||
|
uint8_t ADC_NbrOfChannel; /*!< Specifies the number of ADC channels that will be converted
|
||||||
|
using the sequencer for regular channel group.
|
||||||
|
This parameter must range from 1 to 16. */
|
||||||
|
}ADC_InitTypeDef;
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
|
||||||
|
((PERIPH) == ADC2) || \
|
||||||
|
((PERIPH) == ADC3))
|
||||||
|
|
||||||
|
#define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
|
||||||
|
((PERIPH) == ADC3))
|
||||||
|
|
||||||
|
/** @defgroup ADC_mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define ADC_Mode_Independent ((uint32_t)0x00000000)
|
||||||
|
#define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000)
|
||||||
|
#define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000)
|
||||||
|
#define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000)
|
||||||
|
#define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000)
|
||||||
|
#define ADC_Mode_InjecSimult ((uint32_t)0x00050000)
|
||||||
|
#define ADC_Mode_RegSimult ((uint32_t)0x00060000)
|
||||||
|
#define ADC_Mode_FastInterl ((uint32_t)0x00070000)
|
||||||
|
#define ADC_Mode_SlowInterl ((uint32_t)0x00080000)
|
||||||
|
#define ADC_Mode_AlterTrig ((uint32_t)0x00090000)
|
||||||
|
|
||||||
|
#define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
|
||||||
|
((MODE) == ADC_Mode_RegInjecSimult) || \
|
||||||
|
((MODE) == ADC_Mode_RegSimult_AlterTrig) || \
|
||||||
|
((MODE) == ADC_Mode_InjecSimult_FastInterl) || \
|
||||||
|
((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \
|
||||||
|
((MODE) == ADC_Mode_InjecSimult) || \
|
||||||
|
((MODE) == ADC_Mode_RegSimult) || \
|
||||||
|
((MODE) == ADC_Mode_FastInterl) || \
|
||||||
|
((MODE) == ADC_Mode_SlowInterl) || \
|
||||||
|
((MODE) == ADC_Mode_AlterTrig))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */
|
||||||
|
#define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */
|
||||||
|
#define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */
|
||||||
|
#define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */
|
||||||
|
#define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */
|
||||||
|
#define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */
|
||||||
|
|
||||||
|
#define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */
|
||||||
|
#define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */
|
||||||
|
|
||||||
|
#define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000) /*!< For ADC3 only */
|
||||||
|
#define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000) /*!< For ADC3 only */
|
||||||
|
#define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000) /*!< For ADC3 only */
|
||||||
|
#define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000) /*!< For ADC3 only */
|
||||||
|
#define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000) /*!< For ADC3 only */
|
||||||
|
#define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000) /*!< For ADC3 only */
|
||||||
|
|
||||||
|
#define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
|
||||||
|
((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
|
||||||
|
((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
|
||||||
|
((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
|
||||||
|
((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
|
||||||
|
((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
|
||||||
|
((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \
|
||||||
|
((REGTRIG) == ADC_ExternalTrigConv_None) || \
|
||||||
|
((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
|
||||||
|
((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
|
||||||
|
((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \
|
||||||
|
((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \
|
||||||
|
((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \
|
||||||
|
((REGTRIG) == ADC_ExternalTrigConv_T5_CC3))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_data_align
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define ADC_DataAlign_Right ((uint32_t)0x00000000)
|
||||||
|
#define ADC_DataAlign_Left ((uint32_t)0x00000800)
|
||||||
|
#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
|
||||||
|
((ALIGN) == ADC_DataAlign_Left))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_channels
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define ADC_Channel_0 ((uint8_t)0x00)
|
||||||
|
#define ADC_Channel_1 ((uint8_t)0x01)
|
||||||
|
#define ADC_Channel_2 ((uint8_t)0x02)
|
||||||
|
#define ADC_Channel_3 ((uint8_t)0x03)
|
||||||
|
#define ADC_Channel_4 ((uint8_t)0x04)
|
||||||
|
#define ADC_Channel_5 ((uint8_t)0x05)
|
||||||
|
#define ADC_Channel_6 ((uint8_t)0x06)
|
||||||
|
#define ADC_Channel_7 ((uint8_t)0x07)
|
||||||
|
#define ADC_Channel_8 ((uint8_t)0x08)
|
||||||
|
#define ADC_Channel_9 ((uint8_t)0x09)
|
||||||
|
#define ADC_Channel_10 ((uint8_t)0x0A)
|
||||||
|
#define ADC_Channel_11 ((uint8_t)0x0B)
|
||||||
|
#define ADC_Channel_12 ((uint8_t)0x0C)
|
||||||
|
#define ADC_Channel_13 ((uint8_t)0x0D)
|
||||||
|
#define ADC_Channel_14 ((uint8_t)0x0E)
|
||||||
|
#define ADC_Channel_15 ((uint8_t)0x0F)
|
||||||
|
#define ADC_Channel_16 ((uint8_t)0x10)
|
||||||
|
#define ADC_Channel_17 ((uint8_t)0x11)
|
||||||
|
|
||||||
|
#define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)
|
||||||
|
#define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17)
|
||||||
|
|
||||||
|
#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \
|
||||||
|
((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \
|
||||||
|
((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \
|
||||||
|
((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \
|
||||||
|
((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \
|
||||||
|
((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \
|
||||||
|
((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \
|
||||||
|
((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \
|
||||||
|
((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_sampling_time
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define ADC_SampleTime_1Cycles5 ((uint8_t)0x00)
|
||||||
|
#define ADC_SampleTime_7Cycles5 ((uint8_t)0x01)
|
||||||
|
#define ADC_SampleTime_13Cycles5 ((uint8_t)0x02)
|
||||||
|
#define ADC_SampleTime_28Cycles5 ((uint8_t)0x03)
|
||||||
|
#define ADC_SampleTime_41Cycles5 ((uint8_t)0x04)
|
||||||
|
#define ADC_SampleTime_55Cycles5 ((uint8_t)0x05)
|
||||||
|
#define ADC_SampleTime_71Cycles5 ((uint8_t)0x06)
|
||||||
|
#define ADC_SampleTime_239Cycles5 ((uint8_t)0x07)
|
||||||
|
#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \
|
||||||
|
((TIME) == ADC_SampleTime_7Cycles5) || \
|
||||||
|
((TIME) == ADC_SampleTime_13Cycles5) || \
|
||||||
|
((TIME) == ADC_SampleTime_28Cycles5) || \
|
||||||
|
((TIME) == ADC_SampleTime_41Cycles5) || \
|
||||||
|
((TIME) == ADC_SampleTime_55Cycles5) || \
|
||||||
|
((TIME) == ADC_SampleTime_71Cycles5) || \
|
||||||
|
((TIME) == ADC_SampleTime_239Cycles5))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) /*!< For ADC1 and ADC2 */
|
||||||
|
#define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) /*!< For ADC1 and ADC2 */
|
||||||
|
#define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) /*!< For ADC1 and ADC2 */
|
||||||
|
#define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) /*!< For ADC1 and ADC2 */
|
||||||
|
#define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) /*!< For ADC1 and ADC2 */
|
||||||
|
|
||||||
|
#define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) /*!< For ADC1, ADC2 and ADC3 */
|
||||||
|
#define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) /*!< For ADC1, ADC2 and ADC3 */
|
||||||
|
#define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) /*!< For ADC1, ADC2 and ADC3 */
|
||||||
|
|
||||||
|
#define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000) /*!< For ADC3 only */
|
||||||
|
#define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000) /*!< For ADC3 only */
|
||||||
|
#define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000) /*!< For ADC3 only */
|
||||||
|
#define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000) /*!< For ADC3 only */
|
||||||
|
#define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000) /*!< For ADC3 only */
|
||||||
|
|
||||||
|
#define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \
|
||||||
|
((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \
|
||||||
|
((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \
|
||||||
|
((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \
|
||||||
|
((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \
|
||||||
|
((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \
|
||||||
|
((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \
|
||||||
|
((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \
|
||||||
|
((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \
|
||||||
|
((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \
|
||||||
|
((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \
|
||||||
|
((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \
|
||||||
|
((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_injected_channel_selection
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define ADC_InjectedChannel_1 ((uint8_t)0x14)
|
||||||
|
#define ADC_InjectedChannel_2 ((uint8_t)0x18)
|
||||||
|
#define ADC_InjectedChannel_3 ((uint8_t)0x1C)
|
||||||
|
#define ADC_InjectedChannel_4 ((uint8_t)0x20)
|
||||||
|
#define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
|
||||||
|
((CHANNEL) == ADC_InjectedChannel_2) || \
|
||||||
|
((CHANNEL) == ADC_InjectedChannel_3) || \
|
||||||
|
((CHANNEL) == ADC_InjectedChannel_4))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_analog_watchdog_selection
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)
|
||||||
|
#define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)
|
||||||
|
#define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)
|
||||||
|
#define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000)
|
||||||
|
#define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000)
|
||||||
|
#define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)
|
||||||
|
#define ADC_AnalogWatchdog_None ((uint32_t)0x00000000)
|
||||||
|
|
||||||
|
#define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
|
||||||
|
((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
|
||||||
|
((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
|
||||||
|
((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
|
||||||
|
((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
|
||||||
|
((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
|
||||||
|
((WATCHDOG) == ADC_AnalogWatchdog_None))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_interrupts_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define ADC_IT_EOC ((uint16_t)0x0220)
|
||||||
|
#define ADC_IT_AWD ((uint16_t)0x0140)
|
||||||
|
#define ADC_IT_JEOC ((uint16_t)0x0480)
|
||||||
|
|
||||||
|
#define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00))
|
||||||
|
|
||||||
|
#define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \
|
||||||
|
((IT) == ADC_IT_JEOC))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_flags_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define ADC_FLAG_AWD ((uint8_t)0x01)
|
||||||
|
#define ADC_FLAG_EOC ((uint8_t)0x02)
|
||||||
|
#define ADC_FLAG_JEOC ((uint8_t)0x04)
|
||||||
|
#define ADC_FLAG_JSTRT ((uint8_t)0x08)
|
||||||
|
#define ADC_FLAG_STRT ((uint8_t)0x10)
|
||||||
|
#define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00))
|
||||||
|
#define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \
|
||||||
|
((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \
|
||||||
|
((FLAG) == ADC_FLAG_STRT))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_thresholds
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_injected_offset
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_injected_length
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_injected_rank
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup ADC_regular_length
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_regular_rank
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_regular_discontinuous_mode_number
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup ADC_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void ADC_DeInit(ADC_TypeDef* ADCx);
|
||||||
|
void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
|
||||||
|
void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
|
||||||
|
void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
||||||
|
void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
||||||
|
void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);
|
||||||
|
void ADC_ResetCalibration(ADC_TypeDef* ADCx);
|
||||||
|
FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx);
|
||||||
|
void ADC_StartCalibration(ADC_TypeDef* ADCx);
|
||||||
|
FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx);
|
||||||
|
void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
||||||
|
FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
|
||||||
|
void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number);
|
||||||
|
void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
||||||
|
void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
|
||||||
|
void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
||||||
|
uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
|
||||||
|
uint32_t ADC_GetDualModeConversionValue(void);
|
||||||
|
void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
||||||
|
void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
||||||
|
void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);
|
||||||
|
void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
||||||
|
void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
|
||||||
|
FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx);
|
||||||
|
void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
|
||||||
|
void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length);
|
||||||
|
void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset);
|
||||||
|
uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);
|
||||||
|
void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog);
|
||||||
|
void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold);
|
||||||
|
void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
|
||||||
|
void ADC_TempSensorVrefintCmd(FunctionalState NewState);
|
||||||
|
FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
|
||||||
|
void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
|
||||||
|
ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT);
|
||||||
|
void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__STM32F10x_ADC_H */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,195 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_bkp.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the BKP firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_BKP_H
|
||||||
|
#define __STM32F10x_BKP_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup BKP
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup BKP_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup BKP_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Tamper_Pin_active_level
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define BKP_TamperPinLevel_High ((uint16_t)0x0000)
|
||||||
|
#define BKP_TamperPinLevel_Low ((uint16_t)0x0001)
|
||||||
|
#define IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || \
|
||||||
|
((LEVEL) == BKP_TamperPinLevel_Low))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RTC_output_source_to_output_on_the_Tamper_pin
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define BKP_RTCOutputSource_None ((uint16_t)0x0000)
|
||||||
|
#define BKP_RTCOutputSource_CalibClock ((uint16_t)0x0080)
|
||||||
|
#define BKP_RTCOutputSource_Alarm ((uint16_t)0x0100)
|
||||||
|
#define BKP_RTCOutputSource_Second ((uint16_t)0x0300)
|
||||||
|
#define IS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || \
|
||||||
|
((SOURCE) == BKP_RTCOutputSource_CalibClock) || \
|
||||||
|
((SOURCE) == BKP_RTCOutputSource_Alarm) || \
|
||||||
|
((SOURCE) == BKP_RTCOutputSource_Second))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Data_Backup_Register
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define BKP_DR1 ((uint16_t)0x0004)
|
||||||
|
#define BKP_DR2 ((uint16_t)0x0008)
|
||||||
|
#define BKP_DR3 ((uint16_t)0x000C)
|
||||||
|
#define BKP_DR4 ((uint16_t)0x0010)
|
||||||
|
#define BKP_DR5 ((uint16_t)0x0014)
|
||||||
|
#define BKP_DR6 ((uint16_t)0x0018)
|
||||||
|
#define BKP_DR7 ((uint16_t)0x001C)
|
||||||
|
#define BKP_DR8 ((uint16_t)0x0020)
|
||||||
|
#define BKP_DR9 ((uint16_t)0x0024)
|
||||||
|
#define BKP_DR10 ((uint16_t)0x0028)
|
||||||
|
#define BKP_DR11 ((uint16_t)0x0040)
|
||||||
|
#define BKP_DR12 ((uint16_t)0x0044)
|
||||||
|
#define BKP_DR13 ((uint16_t)0x0048)
|
||||||
|
#define BKP_DR14 ((uint16_t)0x004C)
|
||||||
|
#define BKP_DR15 ((uint16_t)0x0050)
|
||||||
|
#define BKP_DR16 ((uint16_t)0x0054)
|
||||||
|
#define BKP_DR17 ((uint16_t)0x0058)
|
||||||
|
#define BKP_DR18 ((uint16_t)0x005C)
|
||||||
|
#define BKP_DR19 ((uint16_t)0x0060)
|
||||||
|
#define BKP_DR20 ((uint16_t)0x0064)
|
||||||
|
#define BKP_DR21 ((uint16_t)0x0068)
|
||||||
|
#define BKP_DR22 ((uint16_t)0x006C)
|
||||||
|
#define BKP_DR23 ((uint16_t)0x0070)
|
||||||
|
#define BKP_DR24 ((uint16_t)0x0074)
|
||||||
|
#define BKP_DR25 ((uint16_t)0x0078)
|
||||||
|
#define BKP_DR26 ((uint16_t)0x007C)
|
||||||
|
#define BKP_DR27 ((uint16_t)0x0080)
|
||||||
|
#define BKP_DR28 ((uint16_t)0x0084)
|
||||||
|
#define BKP_DR29 ((uint16_t)0x0088)
|
||||||
|
#define BKP_DR30 ((uint16_t)0x008C)
|
||||||
|
#define BKP_DR31 ((uint16_t)0x0090)
|
||||||
|
#define BKP_DR32 ((uint16_t)0x0094)
|
||||||
|
#define BKP_DR33 ((uint16_t)0x0098)
|
||||||
|
#define BKP_DR34 ((uint16_t)0x009C)
|
||||||
|
#define BKP_DR35 ((uint16_t)0x00A0)
|
||||||
|
#define BKP_DR36 ((uint16_t)0x00A4)
|
||||||
|
#define BKP_DR37 ((uint16_t)0x00A8)
|
||||||
|
#define BKP_DR38 ((uint16_t)0x00AC)
|
||||||
|
#define BKP_DR39 ((uint16_t)0x00B0)
|
||||||
|
#define BKP_DR40 ((uint16_t)0x00B4)
|
||||||
|
#define BKP_DR41 ((uint16_t)0x00B8)
|
||||||
|
#define BKP_DR42 ((uint16_t)0x00BC)
|
||||||
|
|
||||||
|
#define IS_BKP_DR(DR) (((DR) == BKP_DR1) || ((DR) == BKP_DR2) || ((DR) == BKP_DR3) || \
|
||||||
|
((DR) == BKP_DR4) || ((DR) == BKP_DR5) || ((DR) == BKP_DR6) || \
|
||||||
|
((DR) == BKP_DR7) || ((DR) == BKP_DR8) || ((DR) == BKP_DR9) || \
|
||||||
|
((DR) == BKP_DR10) || ((DR) == BKP_DR11) || ((DR) == BKP_DR12) || \
|
||||||
|
((DR) == BKP_DR13) || ((DR) == BKP_DR14) || ((DR) == BKP_DR15) || \
|
||||||
|
((DR) == BKP_DR16) || ((DR) == BKP_DR17) || ((DR) == BKP_DR18) || \
|
||||||
|
((DR) == BKP_DR19) || ((DR) == BKP_DR20) || ((DR) == BKP_DR21) || \
|
||||||
|
((DR) == BKP_DR22) || ((DR) == BKP_DR23) || ((DR) == BKP_DR24) || \
|
||||||
|
((DR) == BKP_DR25) || ((DR) == BKP_DR26) || ((DR) == BKP_DR27) || \
|
||||||
|
((DR) == BKP_DR28) || ((DR) == BKP_DR29) || ((DR) == BKP_DR30) || \
|
||||||
|
((DR) == BKP_DR31) || ((DR) == BKP_DR32) || ((DR) == BKP_DR33) || \
|
||||||
|
((DR) == BKP_DR34) || ((DR) == BKP_DR35) || ((DR) == BKP_DR36) || \
|
||||||
|
((DR) == BKP_DR37) || ((DR) == BKP_DR38) || ((DR) == BKP_DR39) || \
|
||||||
|
((DR) == BKP_DR40) || ((DR) == BKP_DR41) || ((DR) == BKP_DR42))
|
||||||
|
|
||||||
|
#define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup BKP_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup BKP_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void BKP_DeInit(void);
|
||||||
|
void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel);
|
||||||
|
void BKP_TamperPinCmd(FunctionalState NewState);
|
||||||
|
void BKP_ITConfig(FunctionalState NewState);
|
||||||
|
void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource);
|
||||||
|
void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue);
|
||||||
|
void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data);
|
||||||
|
uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR);
|
||||||
|
FlagStatus BKP_GetFlagStatus(void);
|
||||||
|
void BKP_ClearFlag(void);
|
||||||
|
ITStatus BKP_GetITStatus(void);
|
||||||
|
void BKP_ClearITPendingBit(void);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_BKP_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,697 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_can.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the CAN firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_CAN_H
|
||||||
|
#define __STM32F10x_CAN_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CAN
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_CAN_ALL_PERIPH(PERIPH) (((PERIPH) == CAN1) || \
|
||||||
|
((PERIPH) == CAN2))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief CAN init structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint16_t CAN_Prescaler; /*!< Specifies the length of a time quantum.
|
||||||
|
It ranges from 1 to 1024. */
|
||||||
|
|
||||||
|
uint8_t CAN_Mode; /*!< Specifies the CAN operating mode.
|
||||||
|
This parameter can be a value of
|
||||||
|
@ref CAN_operating_mode */
|
||||||
|
|
||||||
|
uint8_t CAN_SJW; /*!< Specifies the maximum number of time quanta
|
||||||
|
the CAN hardware is allowed to lengthen or
|
||||||
|
shorten a bit to perform resynchronization.
|
||||||
|
This parameter can be a value of
|
||||||
|
@ref CAN_synchronisation_jump_width */
|
||||||
|
|
||||||
|
uint8_t CAN_BS1; /*!< Specifies the number of time quanta in Bit
|
||||||
|
Segment 1. This parameter can be a value of
|
||||||
|
@ref CAN_time_quantum_in_bit_segment_1 */
|
||||||
|
|
||||||
|
uint8_t CAN_BS2; /*!< Specifies the number of time quanta in Bit
|
||||||
|
Segment 2.
|
||||||
|
This parameter can be a value of
|
||||||
|
@ref CAN_time_quantum_in_bit_segment_2 */
|
||||||
|
|
||||||
|
FunctionalState CAN_TTCM; /*!< Enable or disable the time triggered
|
||||||
|
communication mode. This parameter can be set
|
||||||
|
either to ENABLE or DISABLE. */
|
||||||
|
|
||||||
|
FunctionalState CAN_ABOM; /*!< Enable or disable the automatic bus-off
|
||||||
|
management. This parameter can be set either
|
||||||
|
to ENABLE or DISABLE. */
|
||||||
|
|
||||||
|
FunctionalState CAN_AWUM; /*!< Enable or disable the automatic wake-up mode.
|
||||||
|
This parameter can be set either to ENABLE or
|
||||||
|
DISABLE. */
|
||||||
|
|
||||||
|
FunctionalState CAN_NART; /*!< Enable or disable the no-automatic
|
||||||
|
retransmission mode. This parameter can be
|
||||||
|
set either to ENABLE or DISABLE. */
|
||||||
|
|
||||||
|
FunctionalState CAN_RFLM; /*!< Enable or disable the Receive FIFO Locked mode.
|
||||||
|
This parameter can be set either to ENABLE
|
||||||
|
or DISABLE. */
|
||||||
|
|
||||||
|
FunctionalState CAN_TXFP; /*!< Enable or disable the transmit FIFO priority.
|
||||||
|
This parameter can be set either to ENABLE
|
||||||
|
or DISABLE. */
|
||||||
|
} CAN_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief CAN filter init structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint16_t CAN_FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
|
||||||
|
configuration, first one for a 16-bit configuration).
|
||||||
|
This parameter can be a value between 0x0000 and 0xFFFF */
|
||||||
|
|
||||||
|
uint16_t CAN_FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
|
||||||
|
configuration, second one for a 16-bit configuration).
|
||||||
|
This parameter can be a value between 0x0000 and 0xFFFF */
|
||||||
|
|
||||||
|
uint16_t CAN_FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
|
||||||
|
according to the mode (MSBs for a 32-bit configuration,
|
||||||
|
first one for a 16-bit configuration).
|
||||||
|
This parameter can be a value between 0x0000 and 0xFFFF */
|
||||||
|
|
||||||
|
uint16_t CAN_FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
|
||||||
|
according to the mode (LSBs for a 32-bit configuration,
|
||||||
|
second one for a 16-bit configuration).
|
||||||
|
This parameter can be a value between 0x0000 and 0xFFFF */
|
||||||
|
|
||||||
|
uint16_t CAN_FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
|
||||||
|
This parameter can be a value of @ref CAN_filter_FIFO */
|
||||||
|
|
||||||
|
uint8_t CAN_FilterNumber; /*!< Specifies the filter which will be initialized. It ranges from 0 to 13. */
|
||||||
|
|
||||||
|
uint8_t CAN_FilterMode; /*!< Specifies the filter mode to be initialized.
|
||||||
|
This parameter can be a value of @ref CAN_filter_mode */
|
||||||
|
|
||||||
|
uint8_t CAN_FilterScale; /*!< Specifies the filter scale.
|
||||||
|
This parameter can be a value of @ref CAN_filter_scale */
|
||||||
|
|
||||||
|
FunctionalState CAN_FilterActivation; /*!< Enable or disable the filter.
|
||||||
|
This parameter can be set either to ENABLE or DISABLE. */
|
||||||
|
} CAN_FilterInitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief CAN Tx message structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t StdId; /*!< Specifies the standard identifier.
|
||||||
|
This parameter can be a value between 0 to 0x7FF. */
|
||||||
|
|
||||||
|
uint32_t ExtId; /*!< Specifies the extended identifier.
|
||||||
|
This parameter can be a value between 0 to 0x1FFFFFFF. */
|
||||||
|
|
||||||
|
uint8_t IDE; /*!< Specifies the type of identifier for the message that
|
||||||
|
will be transmitted. This parameter can be a value
|
||||||
|
of @ref CAN_identifier_type */
|
||||||
|
|
||||||
|
uint8_t RTR; /*!< Specifies the type of frame for the message that will
|
||||||
|
be transmitted. This parameter can be a value of
|
||||||
|
@ref CAN_remote_transmission_request */
|
||||||
|
|
||||||
|
uint8_t DLC; /*!< Specifies the length of the frame that will be
|
||||||
|
transmitted. This parameter can be a value between
|
||||||
|
0 to 8 */
|
||||||
|
|
||||||
|
uint8_t Data[8]; /*!< Contains the data to be transmitted. It ranges from 0
|
||||||
|
to 0xFF. */
|
||||||
|
} CanTxMsg;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief CAN Rx message structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t StdId; /*!< Specifies the standard identifier.
|
||||||
|
This parameter can be a value between 0 to 0x7FF. */
|
||||||
|
|
||||||
|
uint32_t ExtId; /*!< Specifies the extended identifier.
|
||||||
|
This parameter can be a value between 0 to 0x1FFFFFFF. */
|
||||||
|
|
||||||
|
uint8_t IDE; /*!< Specifies the type of identifier for the message that
|
||||||
|
will be received. This parameter can be a value of
|
||||||
|
@ref CAN_identifier_type */
|
||||||
|
|
||||||
|
uint8_t RTR; /*!< Specifies the type of frame for the received message.
|
||||||
|
This parameter can be a value of
|
||||||
|
@ref CAN_remote_transmission_request */
|
||||||
|
|
||||||
|
uint8_t DLC; /*!< Specifies the length of the frame that will be received.
|
||||||
|
This parameter can be a value between 0 to 8 */
|
||||||
|
|
||||||
|
uint8_t Data[8]; /*!< Contains the data to be received. It ranges from 0 to
|
||||||
|
0xFF. */
|
||||||
|
|
||||||
|
uint8_t FMI; /*!< Specifies the index of the filter the message stored in
|
||||||
|
the mailbox passes through. This parameter can be a
|
||||||
|
value between 0 to 0xFF */
|
||||||
|
} CanRxMsg;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_sleep_constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_InitStatus_Failed ((uint8_t)0x00) /*!< CAN initialization failed */
|
||||||
|
#define CAN_InitStatus_Success ((uint8_t)0x01) /*!< CAN initialization OK */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_Mode_Normal ((uint8_t)0x00) /*!< normal mode */
|
||||||
|
#define CAN_Mode_LoopBack ((uint8_t)0x01) /*!< loopback mode */
|
||||||
|
#define CAN_Mode_Silent ((uint8_t)0x02) /*!< silent mode */
|
||||||
|
#define CAN_Mode_Silent_LoopBack ((uint8_t)0x03) /*!< loopback combined with silent mode */
|
||||||
|
|
||||||
|
#define IS_CAN_MODE(MODE) (((MODE) == CAN_Mode_Normal) || \
|
||||||
|
((MODE) == CAN_Mode_LoopBack)|| \
|
||||||
|
((MODE) == CAN_Mode_Silent) || \
|
||||||
|
((MODE) == CAN_Mode_Silent_LoopBack))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @defgroup CAN_Operating_Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define CAN_OperatingMode_Initialization ((uint8_t)0x00) /*!< Initialization mode */
|
||||||
|
#define CAN_OperatingMode_Normal ((uint8_t)0x01) /*!< Normal mode */
|
||||||
|
#define CAN_OperatingMode_Sleep ((uint8_t)0x02) /*!< sleep mode */
|
||||||
|
|
||||||
|
|
||||||
|
#define IS_CAN_OPERATING_MODE(MODE) (((MODE) == CAN_OperatingMode_Initialization) ||\
|
||||||
|
((MODE) == CAN_OperatingMode_Normal)|| \
|
||||||
|
((MODE) == CAN_OperatingMode_Sleep))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @defgroup CAN_Mode_Status
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_ModeStatus_Failed ((uint8_t)0x00) /*!< CAN entering the specific mode failed */
|
||||||
|
#define CAN_ModeStatus_Success ((uint8_t)!CAN_ModeStatus_Failed) /*!< CAN entering the specific mode Succeed */
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_synchronisation_jump_width
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_SJW_1tq ((uint8_t)0x00) /*!< 1 time quantum */
|
||||||
|
#define CAN_SJW_2tq ((uint8_t)0x01) /*!< 2 time quantum */
|
||||||
|
#define CAN_SJW_3tq ((uint8_t)0x02) /*!< 3 time quantum */
|
||||||
|
#define CAN_SJW_4tq ((uint8_t)0x03) /*!< 4 time quantum */
|
||||||
|
|
||||||
|
#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1tq) || ((SJW) == CAN_SJW_2tq)|| \
|
||||||
|
((SJW) == CAN_SJW_3tq) || ((SJW) == CAN_SJW_4tq))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_time_quantum_in_bit_segment_1
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_BS1_1tq ((uint8_t)0x00) /*!< 1 time quantum */
|
||||||
|
#define CAN_BS1_2tq ((uint8_t)0x01) /*!< 2 time quantum */
|
||||||
|
#define CAN_BS1_3tq ((uint8_t)0x02) /*!< 3 time quantum */
|
||||||
|
#define CAN_BS1_4tq ((uint8_t)0x03) /*!< 4 time quantum */
|
||||||
|
#define CAN_BS1_5tq ((uint8_t)0x04) /*!< 5 time quantum */
|
||||||
|
#define CAN_BS1_6tq ((uint8_t)0x05) /*!< 6 time quantum */
|
||||||
|
#define CAN_BS1_7tq ((uint8_t)0x06) /*!< 7 time quantum */
|
||||||
|
#define CAN_BS1_8tq ((uint8_t)0x07) /*!< 8 time quantum */
|
||||||
|
#define CAN_BS1_9tq ((uint8_t)0x08) /*!< 9 time quantum */
|
||||||
|
#define CAN_BS1_10tq ((uint8_t)0x09) /*!< 10 time quantum */
|
||||||
|
#define CAN_BS1_11tq ((uint8_t)0x0A) /*!< 11 time quantum */
|
||||||
|
#define CAN_BS1_12tq ((uint8_t)0x0B) /*!< 12 time quantum */
|
||||||
|
#define CAN_BS1_13tq ((uint8_t)0x0C) /*!< 13 time quantum */
|
||||||
|
#define CAN_BS1_14tq ((uint8_t)0x0D) /*!< 14 time quantum */
|
||||||
|
#define CAN_BS1_15tq ((uint8_t)0x0E) /*!< 15 time quantum */
|
||||||
|
#define CAN_BS1_16tq ((uint8_t)0x0F) /*!< 16 time quantum */
|
||||||
|
|
||||||
|
#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16tq)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_time_quantum_in_bit_segment_2
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_BS2_1tq ((uint8_t)0x00) /*!< 1 time quantum */
|
||||||
|
#define CAN_BS2_2tq ((uint8_t)0x01) /*!< 2 time quantum */
|
||||||
|
#define CAN_BS2_3tq ((uint8_t)0x02) /*!< 3 time quantum */
|
||||||
|
#define CAN_BS2_4tq ((uint8_t)0x03) /*!< 4 time quantum */
|
||||||
|
#define CAN_BS2_5tq ((uint8_t)0x04) /*!< 5 time quantum */
|
||||||
|
#define CAN_BS2_6tq ((uint8_t)0x05) /*!< 6 time quantum */
|
||||||
|
#define CAN_BS2_7tq ((uint8_t)0x06) /*!< 7 time quantum */
|
||||||
|
#define CAN_BS2_8tq ((uint8_t)0x07) /*!< 8 time quantum */
|
||||||
|
|
||||||
|
#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8tq)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_clock_prescaler
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_filter_number
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#ifndef STM32F10X_CL
|
||||||
|
#define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 13)
|
||||||
|
#else
|
||||||
|
#define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_filter_mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_FilterMode_IdMask ((uint8_t)0x00) /*!< identifier/mask mode */
|
||||||
|
#define CAN_FilterMode_IdList ((uint8_t)0x01) /*!< identifier list mode */
|
||||||
|
|
||||||
|
#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FilterMode_IdMask) || \
|
||||||
|
((MODE) == CAN_FilterMode_IdList))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_filter_scale
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_FilterScale_16bit ((uint8_t)0x00) /*!< Two 16-bit filters */
|
||||||
|
#define CAN_FilterScale_32bit ((uint8_t)0x01) /*!< One 32-bit filter */
|
||||||
|
|
||||||
|
#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FilterScale_16bit) || \
|
||||||
|
((SCALE) == CAN_FilterScale_32bit))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_filter_FIFO
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_Filter_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */
|
||||||
|
#define CAN_Filter_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */
|
||||||
|
#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FilterFIFO0) || \
|
||||||
|
((FIFO) == CAN_FilterFIFO1))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Start_bank_filter_for_slave_CAN
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define IS_CAN_BANKNUMBER(BANKNUMBER) (((BANKNUMBER) >= 1) && ((BANKNUMBER) <= 27))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_Tx
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
|
||||||
|
#define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF))
|
||||||
|
#define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF))
|
||||||
|
#define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_identifier_type
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_Id_Standard ((uint32_t)0x00000000) /*!< Standard Id */
|
||||||
|
#define CAN_Id_Extended ((uint32_t)0x00000004) /*!< Extended Id */
|
||||||
|
#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_Id_Standard) || \
|
||||||
|
((IDTYPE) == CAN_Id_Extended))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_remote_transmission_request
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_RTR_Data ((uint32_t)0x00000000) /*!< Data frame */
|
||||||
|
#define CAN_RTR_Remote ((uint32_t)0x00000002) /*!< Remote frame */
|
||||||
|
#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_Data) || ((RTR) == CAN_RTR_Remote))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_transmit_constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_TxStatus_Failed ((uint8_t)0x00)/*!< CAN transmission failed */
|
||||||
|
#define CAN_TxStatus_Ok ((uint8_t)0x01) /*!< CAN transmission succeeded */
|
||||||
|
#define CAN_TxStatus_Pending ((uint8_t)0x02) /*!< CAN transmission pending */
|
||||||
|
#define CAN_TxStatus_NoMailBox ((uint8_t)0x04) /*!< CAN cell did not provide an empty mailbox */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_receive_FIFO_number_constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */
|
||||||
|
#define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */
|
||||||
|
|
||||||
|
#define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_sleep_constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_Sleep_Failed ((uint8_t)0x00) /*!< CAN did not enter the sleep mode */
|
||||||
|
#define CAN_Sleep_Ok ((uint8_t)0x01) /*!< CAN entered the sleep mode */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_wake_up_constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_WakeUp_Failed ((uint8_t)0x00) /*!< CAN did not leave the sleep mode */
|
||||||
|
#define CAN_WakeUp_Ok ((uint8_t)0x01) /*!< CAN leaved the sleep mode */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @defgroup CAN_Error_Code_constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define CAN_ErrorCode_NoErr ((uint8_t)0x00) /*!< No Error */
|
||||||
|
#define CAN_ErrorCode_StuffErr ((uint8_t)0x10) /*!< Stuff Error */
|
||||||
|
#define CAN_ErrorCode_FormErr ((uint8_t)0x20) /*!< Form Error */
|
||||||
|
#define CAN_ErrorCode_ACKErr ((uint8_t)0x30) /*!< Acknowledgment Error */
|
||||||
|
#define CAN_ErrorCode_BitRecessiveErr ((uint8_t)0x40) /*!< Bit Recessive Error */
|
||||||
|
#define CAN_ErrorCode_BitDominantErr ((uint8_t)0x50) /*!< Bit Dominant Error */
|
||||||
|
#define CAN_ErrorCode_CRCErr ((uint8_t)0x60) /*!< CRC Error */
|
||||||
|
#define CAN_ErrorCode_SoftwareSetErr ((uint8_t)0x70) /*!< Software Set Error */
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_flags
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
|
||||||
|
and CAN_ClearFlag() functions. */
|
||||||
|
/* If the flag is 0x1XXXXXXX, it means that it can only be used with CAN_GetFlagStatus() function. */
|
||||||
|
|
||||||
|
/* Transmit Flags */
|
||||||
|
#define CAN_FLAG_RQCP0 ((uint32_t)0x38000001) /*!< Request MailBox0 Flag */
|
||||||
|
#define CAN_FLAG_RQCP1 ((uint32_t)0x38000100) /*!< Request MailBox1 Flag */
|
||||||
|
#define CAN_FLAG_RQCP2 ((uint32_t)0x38010000) /*!< Request MailBox2 Flag */
|
||||||
|
|
||||||
|
/* Receive Flags */
|
||||||
|
#define CAN_FLAG_FMP0 ((uint32_t)0x12000003) /*!< FIFO 0 Message Pending Flag */
|
||||||
|
#define CAN_FLAG_FF0 ((uint32_t)0x32000008) /*!< FIFO 0 Full Flag */
|
||||||
|
#define CAN_FLAG_FOV0 ((uint32_t)0x32000010) /*!< FIFO 0 Overrun Flag */
|
||||||
|
#define CAN_FLAG_FMP1 ((uint32_t)0x14000003) /*!< FIFO 1 Message Pending Flag */
|
||||||
|
#define CAN_FLAG_FF1 ((uint32_t)0x34000008) /*!< FIFO 1 Full Flag */
|
||||||
|
#define CAN_FLAG_FOV1 ((uint32_t)0x34000010) /*!< FIFO 1 Overrun Flag */
|
||||||
|
|
||||||
|
/* Operating Mode Flags */
|
||||||
|
#define CAN_FLAG_WKU ((uint32_t)0x31000008) /*!< Wake up Flag */
|
||||||
|
#define CAN_FLAG_SLAK ((uint32_t)0x31000012) /*!< Sleep acknowledge Flag */
|
||||||
|
/* Note: When SLAK intterupt is disabled (SLKIE=0), no polling on SLAKI is possible.
|
||||||
|
In this case the SLAK bit can be polled.*/
|
||||||
|
|
||||||
|
/* Error Flags */
|
||||||
|
#define CAN_FLAG_EWG ((uint32_t)0x10F00001) /*!< Error Warning Flag */
|
||||||
|
#define CAN_FLAG_EPV ((uint32_t)0x10F00002) /*!< Error Passive Flag */
|
||||||
|
#define CAN_FLAG_BOF ((uint32_t)0x10F00004) /*!< Bus-Off Flag */
|
||||||
|
#define CAN_FLAG_LEC ((uint32_t)0x30F00070) /*!< Last error code Flag */
|
||||||
|
|
||||||
|
#define IS_CAN_GET_FLAG(FLAG) (((FLAG) == CAN_FLAG_LEC) || ((FLAG) == CAN_FLAG_BOF) || \
|
||||||
|
((FLAG) == CAN_FLAG_EPV) || ((FLAG) == CAN_FLAG_EWG) || \
|
||||||
|
((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_FOV0) || \
|
||||||
|
((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_FMP0) || \
|
||||||
|
((FLAG) == CAN_FLAG_FOV1) || ((FLAG) == CAN_FLAG_FF1) || \
|
||||||
|
((FLAG) == CAN_FLAG_FMP1) || ((FLAG) == CAN_FLAG_RQCP2) || \
|
||||||
|
((FLAG) == CAN_FLAG_RQCP1)|| ((FLAG) == CAN_FLAG_RQCP0) || \
|
||||||
|
((FLAG) == CAN_FLAG_SLAK ))
|
||||||
|
|
||||||
|
#define IS_CAN_CLEAR_FLAG(FLAG)(((FLAG) == CAN_FLAG_LEC) || ((FLAG) == CAN_FLAG_RQCP2) || \
|
||||||
|
((FLAG) == CAN_FLAG_RQCP1) || ((FLAG) == CAN_FLAG_RQCP0) || \
|
||||||
|
((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_FOV0) ||\
|
||||||
|
((FLAG) == CAN_FLAG_FF1) || ((FLAG) == CAN_FLAG_FOV1) || \
|
||||||
|
((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_SLAK))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup CAN_interrupts
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#define CAN_IT_TME ((uint32_t)0x00000001) /*!< Transmit mailbox empty Interrupt*/
|
||||||
|
|
||||||
|
/* Receive Interrupts */
|
||||||
|
#define CAN_IT_FMP0 ((uint32_t)0x00000002) /*!< FIFO 0 message pending Interrupt*/
|
||||||
|
#define CAN_IT_FF0 ((uint32_t)0x00000004) /*!< FIFO 0 full Interrupt*/
|
||||||
|
#define CAN_IT_FOV0 ((uint32_t)0x00000008) /*!< FIFO 0 overrun Interrupt*/
|
||||||
|
#define CAN_IT_FMP1 ((uint32_t)0x00000010) /*!< FIFO 1 message pending Interrupt*/
|
||||||
|
#define CAN_IT_FF1 ((uint32_t)0x00000020) /*!< FIFO 1 full Interrupt*/
|
||||||
|
#define CAN_IT_FOV1 ((uint32_t)0x00000040) /*!< FIFO 1 overrun Interrupt*/
|
||||||
|
|
||||||
|
/* Operating Mode Interrupts */
|
||||||
|
#define CAN_IT_WKU ((uint32_t)0x00010000) /*!< Wake-up Interrupt*/
|
||||||
|
#define CAN_IT_SLK ((uint32_t)0x00020000) /*!< Sleep acknowledge Interrupt*/
|
||||||
|
|
||||||
|
/* Error Interrupts */
|
||||||
|
#define CAN_IT_EWG ((uint32_t)0x00000100) /*!< Error warning Interrupt*/
|
||||||
|
#define CAN_IT_EPV ((uint32_t)0x00000200) /*!< Error passive Interrupt*/
|
||||||
|
#define CAN_IT_BOF ((uint32_t)0x00000400) /*!< Bus-off Interrupt*/
|
||||||
|
#define CAN_IT_LEC ((uint32_t)0x00000800) /*!< Last error code Interrupt*/
|
||||||
|
#define CAN_IT_ERR ((uint32_t)0x00008000) /*!< Error Interrupt*/
|
||||||
|
|
||||||
|
/* Flags named as Interrupts : kept only for FW compatibility */
|
||||||
|
#define CAN_IT_RQCP0 CAN_IT_TME
|
||||||
|
#define CAN_IT_RQCP1 CAN_IT_TME
|
||||||
|
#define CAN_IT_RQCP2 CAN_IT_TME
|
||||||
|
|
||||||
|
|
||||||
|
#define IS_CAN_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0) ||\
|
||||||
|
((IT) == CAN_IT_FF0) || ((IT) == CAN_IT_FOV0) ||\
|
||||||
|
((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1) ||\
|
||||||
|
((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\
|
||||||
|
((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\
|
||||||
|
((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\
|
||||||
|
((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
|
||||||
|
|
||||||
|
#define IS_CAN_CLEAR_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF0) ||\
|
||||||
|
((IT) == CAN_IT_FOV0)|| ((IT) == CAN_IT_FF1) ||\
|
||||||
|
((IT) == CAN_IT_FOV1)|| ((IT) == CAN_IT_EWG) ||\
|
||||||
|
((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\
|
||||||
|
((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\
|
||||||
|
((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_Legacy
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define CANINITFAILED CAN_InitStatus_Failed
|
||||||
|
#define CANINITOK CAN_InitStatus_Success
|
||||||
|
#define CAN_FilterFIFO0 CAN_Filter_FIFO0
|
||||||
|
#define CAN_FilterFIFO1 CAN_Filter_FIFO1
|
||||||
|
#define CAN_ID_STD CAN_Id_Standard
|
||||||
|
#define CAN_ID_EXT CAN_Id_Extended
|
||||||
|
#define CAN_RTR_DATA CAN_RTR_Data
|
||||||
|
#define CAN_RTR_REMOTE CAN_RTR_Remote
|
||||||
|
#define CANTXFAILE CAN_TxStatus_Failed
|
||||||
|
#define CANTXOK CAN_TxStatus_Ok
|
||||||
|
#define CANTXPENDING CAN_TxStatus_Pending
|
||||||
|
#define CAN_NO_MB CAN_TxStatus_NoMailBox
|
||||||
|
#define CANSLEEPFAILED CAN_Sleep_Failed
|
||||||
|
#define CANSLEEPOK CAN_Sleep_Ok
|
||||||
|
#define CANWAKEUPFAILED CAN_WakeUp_Failed
|
||||||
|
#define CANWAKEUPOK CAN_WakeUp_Ok
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CAN_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Function used to set the CAN configuration to the default reset state *****/
|
||||||
|
void CAN_DeInit(CAN_TypeDef* CANx);
|
||||||
|
|
||||||
|
/* Initialization and Configuration functions *********************************/
|
||||||
|
uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct);
|
||||||
|
void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct);
|
||||||
|
void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct);
|
||||||
|
void CAN_SlaveStartBank(uint8_t CAN_BankNumber);
|
||||||
|
void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState);
|
||||||
|
void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState);
|
||||||
|
|
||||||
|
/* Transmit functions *********************************************************/
|
||||||
|
uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage);
|
||||||
|
uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox);
|
||||||
|
void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox);
|
||||||
|
|
||||||
|
/* Receive functions **********************************************************/
|
||||||
|
void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage);
|
||||||
|
void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber);
|
||||||
|
uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber);
|
||||||
|
|
||||||
|
|
||||||
|
/* Operation modes functions **************************************************/
|
||||||
|
uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode);
|
||||||
|
uint8_t CAN_Sleep(CAN_TypeDef* CANx);
|
||||||
|
uint8_t CAN_WakeUp(CAN_TypeDef* CANx);
|
||||||
|
|
||||||
|
/* Error management functions *************************************************/
|
||||||
|
uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx);
|
||||||
|
uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx);
|
||||||
|
uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx);
|
||||||
|
|
||||||
|
/* Interrupts and flags management functions **********************************/
|
||||||
|
void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState);
|
||||||
|
FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG);
|
||||||
|
void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG);
|
||||||
|
ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT);
|
||||||
|
void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_CAN_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,210 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_cec.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the CEC firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_CEC_H
|
||||||
|
#define __STM32F10x_CEC_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CEC
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup CEC_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief CEC Init structure definition
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint16_t CEC_BitTimingMode; /*!< Configures the CEC Bit Timing Error Mode.
|
||||||
|
This parameter can be a value of @ref CEC_BitTiming_Mode */
|
||||||
|
uint16_t CEC_BitPeriodMode; /*!< Configures the CEC Bit Period Error Mode.
|
||||||
|
This parameter can be a value of @ref CEC_BitPeriod_Mode */
|
||||||
|
}CEC_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CEC_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CEC_BitTiming_Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define CEC_BitTimingStdMode ((uint16_t)0x00) /*!< Bit timing error Standard Mode */
|
||||||
|
#define CEC_BitTimingErrFreeMode CEC_CFGR_BTEM /*!< Bit timing error Free Mode */
|
||||||
|
|
||||||
|
#define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BitTimingStdMode) || \
|
||||||
|
((MODE) == CEC_BitTimingErrFreeMode))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CEC_BitPeriod_Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define CEC_BitPeriodStdMode ((uint16_t)0x00) /*!< Bit period error Standard Mode */
|
||||||
|
#define CEC_BitPeriodFlexibleMode CEC_CFGR_BPEM /*!< Bit period error Flexible Mode */
|
||||||
|
|
||||||
|
#define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BitPeriodStdMode) || \
|
||||||
|
((MODE) == CEC_BitPeriodFlexibleMode))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup CEC_interrupts_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define CEC_IT_TERR CEC_CSR_TERR
|
||||||
|
#define CEC_IT_TBTRF CEC_CSR_TBTRF
|
||||||
|
#define CEC_IT_RERR CEC_CSR_RERR
|
||||||
|
#define CEC_IT_RBTF CEC_CSR_RBTF
|
||||||
|
#define IS_CEC_GET_IT(IT) (((IT) == CEC_IT_TERR) || ((IT) == CEC_IT_TBTRF) || \
|
||||||
|
((IT) == CEC_IT_RERR) || ((IT) == CEC_IT_RBTF))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup CEC_Own_Address
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define IS_CEC_ADDRESS(ADDRESS) ((ADDRESS) < 0x10)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CEC_Prescaler
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define IS_CEC_PRESCALER(PRESCALER) ((PRESCALER) <= 0x3FFF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CEC_flags_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief ESR register flags
|
||||||
|
*/
|
||||||
|
#define CEC_FLAG_BTE ((uint32_t)0x10010000)
|
||||||
|
#define CEC_FLAG_BPE ((uint32_t)0x10020000)
|
||||||
|
#define CEC_FLAG_RBTFE ((uint32_t)0x10040000)
|
||||||
|
#define CEC_FLAG_SBE ((uint32_t)0x10080000)
|
||||||
|
#define CEC_FLAG_ACKE ((uint32_t)0x10100000)
|
||||||
|
#define CEC_FLAG_LINE ((uint32_t)0x10200000)
|
||||||
|
#define CEC_FLAG_TBTFE ((uint32_t)0x10400000)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief CSR register flags
|
||||||
|
*/
|
||||||
|
#define CEC_FLAG_TEOM ((uint32_t)0x00000002)
|
||||||
|
#define CEC_FLAG_TERR ((uint32_t)0x00000004)
|
||||||
|
#define CEC_FLAG_TBTRF ((uint32_t)0x00000008)
|
||||||
|
#define CEC_FLAG_RSOM ((uint32_t)0x00000010)
|
||||||
|
#define CEC_FLAG_REOM ((uint32_t)0x00000020)
|
||||||
|
#define CEC_FLAG_RERR ((uint32_t)0x00000040)
|
||||||
|
#define CEC_FLAG_RBTF ((uint32_t)0x00000080)
|
||||||
|
|
||||||
|
#define IS_CEC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFF03) == 0x00) && ((FLAG) != 0x00))
|
||||||
|
|
||||||
|
#define IS_CEC_GET_FLAG(FLAG) (((FLAG) == CEC_FLAG_BTE) || ((FLAG) == CEC_FLAG_BPE) || \
|
||||||
|
((FLAG) == CEC_FLAG_RBTFE) || ((FLAG)== CEC_FLAG_SBE) || \
|
||||||
|
((FLAG) == CEC_FLAG_ACKE) || ((FLAG) == CEC_FLAG_LINE) || \
|
||||||
|
((FLAG) == CEC_FLAG_TBTFE) || ((FLAG) == CEC_FLAG_TEOM) || \
|
||||||
|
((FLAG) == CEC_FLAG_TERR) || ((FLAG) == CEC_FLAG_TBTRF) || \
|
||||||
|
((FLAG) == CEC_FLAG_RSOM) || ((FLAG) == CEC_FLAG_REOM) || \
|
||||||
|
((FLAG) == CEC_FLAG_RERR) || ((FLAG) == CEC_FLAG_RBTF))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CEC_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CEC_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
void CEC_DeInit(void);
|
||||||
|
void CEC_Init(CEC_InitTypeDef* CEC_InitStruct);
|
||||||
|
void CEC_Cmd(FunctionalState NewState);
|
||||||
|
void CEC_ITConfig(FunctionalState NewState);
|
||||||
|
void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress);
|
||||||
|
void CEC_SetPrescaler(uint16_t CEC_Prescaler);
|
||||||
|
void CEC_SendDataByte(uint8_t Data);
|
||||||
|
uint8_t CEC_ReceiveDataByte(void);
|
||||||
|
void CEC_StartOfMessage(void);
|
||||||
|
void CEC_EndOfMessageCmd(FunctionalState NewState);
|
||||||
|
FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG);
|
||||||
|
void CEC_ClearFlag(uint32_t CEC_FLAG);
|
||||||
|
ITStatus CEC_GetITStatus(uint8_t CEC_IT);
|
||||||
|
void CEC_ClearITPendingBit(uint16_t CEC_IT);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_CEC_H */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,94 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_crc.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the CRC firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_CRC_H
|
||||||
|
#define __STM32F10x_CRC_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CRC
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void CRC_ResetDR(void);
|
||||||
|
uint32_t CRC_CalcCRC(uint32_t Data);
|
||||||
|
uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
|
||||||
|
uint32_t CRC_GetCRC(void);
|
||||||
|
void CRC_SetIDRegister(uint8_t IDValue);
|
||||||
|
uint8_t CRC_GetIDRegister(void);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_CRC_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,317 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_dac.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the DAC firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_DAC_H
|
||||||
|
#define __STM32F10x_DAC_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup DAC
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DAC_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief DAC Init structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
|
||||||
|
This parameter can be a value of @ref DAC_trigger_selection */
|
||||||
|
|
||||||
|
uint32_t DAC_WaveGeneration; /*!< Specifies whether DAC channel noise waves or triangle waves
|
||||||
|
are generated, or whether no wave is generated.
|
||||||
|
This parameter can be a value of @ref DAC_wave_generation */
|
||||||
|
|
||||||
|
uint32_t DAC_LFSRUnmask_TriangleAmplitude; /*!< Specifies the LFSR mask for noise wave generation or
|
||||||
|
the maximum amplitude triangle generation for the DAC channel.
|
||||||
|
This parameter can be a value of @ref DAC_lfsrunmask_triangleamplitude */
|
||||||
|
|
||||||
|
uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
|
||||||
|
This parameter can be a value of @ref DAC_output_buffer */
|
||||||
|
}DAC_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DAC_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DAC_trigger_selection
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DAC_Trigger_None ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
|
||||||
|
has been loaded, and not by external trigger */
|
||||||
|
#define DAC_Trigger_T6_TRGO ((uint32_t)0x00000004) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
|
||||||
|
#define DAC_Trigger_T8_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel
|
||||||
|
only in High-density devices*/
|
||||||
|
#define DAC_Trigger_T3_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel
|
||||||
|
only in Connectivity line, Medium-density and Low-density Value Line devices */
|
||||||
|
#define DAC_Trigger_T7_TRGO ((uint32_t)0x00000014) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
|
||||||
|
#define DAC_Trigger_T5_TRGO ((uint32_t)0x0000001C) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
|
||||||
|
#define DAC_Trigger_T15_TRGO ((uint32_t)0x0000001C) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel
|
||||||
|
only in Medium-density and Low-density Value Line devices*/
|
||||||
|
#define DAC_Trigger_T2_TRGO ((uint32_t)0x00000024) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
|
||||||
|
#define DAC_Trigger_T4_TRGO ((uint32_t)0x0000002C) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
|
||||||
|
#define DAC_Trigger_Ext_IT9 ((uint32_t)0x00000034) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
|
||||||
|
#define DAC_Trigger_Software ((uint32_t)0x0000003C) /*!< Conversion started by software trigger for DAC channel */
|
||||||
|
|
||||||
|
#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_Trigger_None) || \
|
||||||
|
((TRIGGER) == DAC_Trigger_T6_TRGO) || \
|
||||||
|
((TRIGGER) == DAC_Trigger_T8_TRGO) || \
|
||||||
|
((TRIGGER) == DAC_Trigger_T7_TRGO) || \
|
||||||
|
((TRIGGER) == DAC_Trigger_T5_TRGO) || \
|
||||||
|
((TRIGGER) == DAC_Trigger_T2_TRGO) || \
|
||||||
|
((TRIGGER) == DAC_Trigger_T4_TRGO) || \
|
||||||
|
((TRIGGER) == DAC_Trigger_Ext_IT9) || \
|
||||||
|
((TRIGGER) == DAC_Trigger_Software))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DAC_wave_generation
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DAC_WaveGeneration_None ((uint32_t)0x00000000)
|
||||||
|
#define DAC_WaveGeneration_Noise ((uint32_t)0x00000040)
|
||||||
|
#define DAC_WaveGeneration_Triangle ((uint32_t)0x00000080)
|
||||||
|
#define IS_DAC_GENERATE_WAVE(WAVE) (((WAVE) == DAC_WaveGeneration_None) || \
|
||||||
|
((WAVE) == DAC_WaveGeneration_Noise) || \
|
||||||
|
((WAVE) == DAC_WaveGeneration_Triangle))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DAC_lfsrunmask_triangleamplitude
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DAC_LFSRUnmask_Bit0 ((uint32_t)0x00000000) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */
|
||||||
|
#define DAC_LFSRUnmask_Bits1_0 ((uint32_t)0x00000100) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */
|
||||||
|
#define DAC_LFSRUnmask_Bits2_0 ((uint32_t)0x00000200) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */
|
||||||
|
#define DAC_LFSRUnmask_Bits3_0 ((uint32_t)0x00000300) /*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */
|
||||||
|
#define DAC_LFSRUnmask_Bits4_0 ((uint32_t)0x00000400) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */
|
||||||
|
#define DAC_LFSRUnmask_Bits5_0 ((uint32_t)0x00000500) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */
|
||||||
|
#define DAC_LFSRUnmask_Bits6_0 ((uint32_t)0x00000600) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */
|
||||||
|
#define DAC_LFSRUnmask_Bits7_0 ((uint32_t)0x00000700) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */
|
||||||
|
#define DAC_LFSRUnmask_Bits8_0 ((uint32_t)0x00000800) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */
|
||||||
|
#define DAC_LFSRUnmask_Bits9_0 ((uint32_t)0x00000900) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */
|
||||||
|
#define DAC_LFSRUnmask_Bits10_0 ((uint32_t)0x00000A00) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */
|
||||||
|
#define DAC_LFSRUnmask_Bits11_0 ((uint32_t)0x00000B00) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */
|
||||||
|
#define DAC_TriangleAmplitude_1 ((uint32_t)0x00000000) /*!< Select max triangle amplitude of 1 */
|
||||||
|
#define DAC_TriangleAmplitude_3 ((uint32_t)0x00000100) /*!< Select max triangle amplitude of 3 */
|
||||||
|
#define DAC_TriangleAmplitude_7 ((uint32_t)0x00000200) /*!< Select max triangle amplitude of 7 */
|
||||||
|
#define DAC_TriangleAmplitude_15 ((uint32_t)0x00000300) /*!< Select max triangle amplitude of 15 */
|
||||||
|
#define DAC_TriangleAmplitude_31 ((uint32_t)0x00000400) /*!< Select max triangle amplitude of 31 */
|
||||||
|
#define DAC_TriangleAmplitude_63 ((uint32_t)0x00000500) /*!< Select max triangle amplitude of 63 */
|
||||||
|
#define DAC_TriangleAmplitude_127 ((uint32_t)0x00000600) /*!< Select max triangle amplitude of 127 */
|
||||||
|
#define DAC_TriangleAmplitude_255 ((uint32_t)0x00000700) /*!< Select max triangle amplitude of 255 */
|
||||||
|
#define DAC_TriangleAmplitude_511 ((uint32_t)0x00000800) /*!< Select max triangle amplitude of 511 */
|
||||||
|
#define DAC_TriangleAmplitude_1023 ((uint32_t)0x00000900) /*!< Select max triangle amplitude of 1023 */
|
||||||
|
#define DAC_TriangleAmplitude_2047 ((uint32_t)0x00000A00) /*!< Select max triangle amplitude of 2047 */
|
||||||
|
#define DAC_TriangleAmplitude_4095 ((uint32_t)0x00000B00) /*!< Select max triangle amplitude of 4095 */
|
||||||
|
|
||||||
|
#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUnmask_Bit0) || \
|
||||||
|
((VALUE) == DAC_LFSRUnmask_Bits1_0) || \
|
||||||
|
((VALUE) == DAC_LFSRUnmask_Bits2_0) || \
|
||||||
|
((VALUE) == DAC_LFSRUnmask_Bits3_0) || \
|
||||||
|
((VALUE) == DAC_LFSRUnmask_Bits4_0) || \
|
||||||
|
((VALUE) == DAC_LFSRUnmask_Bits5_0) || \
|
||||||
|
((VALUE) == DAC_LFSRUnmask_Bits6_0) || \
|
||||||
|
((VALUE) == DAC_LFSRUnmask_Bits7_0) || \
|
||||||
|
((VALUE) == DAC_LFSRUnmask_Bits8_0) || \
|
||||||
|
((VALUE) == DAC_LFSRUnmask_Bits9_0) || \
|
||||||
|
((VALUE) == DAC_LFSRUnmask_Bits10_0) || \
|
||||||
|
((VALUE) == DAC_LFSRUnmask_Bits11_0) || \
|
||||||
|
((VALUE) == DAC_TriangleAmplitude_1) || \
|
||||||
|
((VALUE) == DAC_TriangleAmplitude_3) || \
|
||||||
|
((VALUE) == DAC_TriangleAmplitude_7) || \
|
||||||
|
((VALUE) == DAC_TriangleAmplitude_15) || \
|
||||||
|
((VALUE) == DAC_TriangleAmplitude_31) || \
|
||||||
|
((VALUE) == DAC_TriangleAmplitude_63) || \
|
||||||
|
((VALUE) == DAC_TriangleAmplitude_127) || \
|
||||||
|
((VALUE) == DAC_TriangleAmplitude_255) || \
|
||||||
|
((VALUE) == DAC_TriangleAmplitude_511) || \
|
||||||
|
((VALUE) == DAC_TriangleAmplitude_1023) || \
|
||||||
|
((VALUE) == DAC_TriangleAmplitude_2047) || \
|
||||||
|
((VALUE) == DAC_TriangleAmplitude_4095))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DAC_output_buffer
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DAC_OutputBuffer_Enable ((uint32_t)0x00000000)
|
||||||
|
#define DAC_OutputBuffer_Disable ((uint32_t)0x00000002)
|
||||||
|
#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OutputBuffer_Enable) || \
|
||||||
|
((STATE) == DAC_OutputBuffer_Disable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DAC_Channel_selection
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DAC_Channel_1 ((uint32_t)0x00000000)
|
||||||
|
#define DAC_Channel_2 ((uint32_t)0x00000010)
|
||||||
|
#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_Channel_1) || \
|
||||||
|
((CHANNEL) == DAC_Channel_2))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DAC_data_alignment
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DAC_Align_12b_R ((uint32_t)0x00000000)
|
||||||
|
#define DAC_Align_12b_L ((uint32_t)0x00000004)
|
||||||
|
#define DAC_Align_8b_R ((uint32_t)0x00000008)
|
||||||
|
#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_Align_12b_R) || \
|
||||||
|
((ALIGN) == DAC_Align_12b_L) || \
|
||||||
|
((ALIGN) == DAC_Align_8b_R))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DAC_wave_generation
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DAC_Wave_Noise ((uint32_t)0x00000040)
|
||||||
|
#define DAC_Wave_Triangle ((uint32_t)0x00000080)
|
||||||
|
#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_Wave_Noise) || \
|
||||||
|
((WAVE) == DAC_Wave_Triangle))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DAC_data
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
|
||||||
|
/** @defgroup DAC_interrupts_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DAC_IT_DMAUDR ((uint32_t)0x00002000)
|
||||||
|
#define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DAC_flags_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DAC_FLAG_DMAUDR ((uint32_t)0x00002000)
|
||||||
|
#define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DAC_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DAC_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void DAC_DeInit(void);
|
||||||
|
void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct);
|
||||||
|
void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct);
|
||||||
|
void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState);
|
||||||
|
#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
|
||||||
|
void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState);
|
||||||
|
#endif
|
||||||
|
void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState);
|
||||||
|
void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState);
|
||||||
|
void DAC_DualSoftwareTriggerCmd(FunctionalState NewState);
|
||||||
|
void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState);
|
||||||
|
void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data);
|
||||||
|
void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data);
|
||||||
|
void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1);
|
||||||
|
uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel);
|
||||||
|
#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
|
||||||
|
FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG);
|
||||||
|
void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG);
|
||||||
|
ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT);
|
||||||
|
void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__STM32F10x_DAC_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,119 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_dbgmcu.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the DBGMCU
|
||||||
|
* firmware library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_DBGMCU_H
|
||||||
|
#define __STM32F10x_DBGMCU_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup DBGMCU
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DBGMCU_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DBGMCU_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DBGMCU_SLEEP ((uint32_t)0x00000001)
|
||||||
|
#define DBGMCU_STOP ((uint32_t)0x00000002)
|
||||||
|
#define DBGMCU_STANDBY ((uint32_t)0x00000004)
|
||||||
|
#define DBGMCU_IWDG_STOP ((uint32_t)0x00000100)
|
||||||
|
#define DBGMCU_WWDG_STOP ((uint32_t)0x00000200)
|
||||||
|
#define DBGMCU_TIM1_STOP ((uint32_t)0x00000400)
|
||||||
|
#define DBGMCU_TIM2_STOP ((uint32_t)0x00000800)
|
||||||
|
#define DBGMCU_TIM3_STOP ((uint32_t)0x00001000)
|
||||||
|
#define DBGMCU_TIM4_STOP ((uint32_t)0x00002000)
|
||||||
|
#define DBGMCU_CAN1_STOP ((uint32_t)0x00004000)
|
||||||
|
#define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000)
|
||||||
|
#define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000)
|
||||||
|
#define DBGMCU_TIM8_STOP ((uint32_t)0x00020000)
|
||||||
|
#define DBGMCU_TIM5_STOP ((uint32_t)0x00040000)
|
||||||
|
#define DBGMCU_TIM6_STOP ((uint32_t)0x00080000)
|
||||||
|
#define DBGMCU_TIM7_STOP ((uint32_t)0x00100000)
|
||||||
|
#define DBGMCU_CAN2_STOP ((uint32_t)0x00200000)
|
||||||
|
#define DBGMCU_TIM15_STOP ((uint32_t)0x00400000)
|
||||||
|
#define DBGMCU_TIM16_STOP ((uint32_t)0x00800000)
|
||||||
|
#define DBGMCU_TIM17_STOP ((uint32_t)0x01000000)
|
||||||
|
#define DBGMCU_TIM12_STOP ((uint32_t)0x02000000)
|
||||||
|
#define DBGMCU_TIM13_STOP ((uint32_t)0x04000000)
|
||||||
|
#define DBGMCU_TIM14_STOP ((uint32_t)0x08000000)
|
||||||
|
#define DBGMCU_TIM9_STOP ((uint32_t)0x10000000)
|
||||||
|
#define DBGMCU_TIM10_STOP ((uint32_t)0x20000000)
|
||||||
|
#define DBGMCU_TIM11_STOP ((uint32_t)0x40000000)
|
||||||
|
|
||||||
|
#define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0x800000F8) == 0x00) && ((PERIPH) != 0x00))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DBGMCU_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DBGMCU_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
uint32_t DBGMCU_GetREVID(void);
|
||||||
|
uint32_t DBGMCU_GetDEVID(void);
|
||||||
|
void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_DBGMCU_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,439 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_dma.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the DMA firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_DMA_H
|
||||||
|
#define __STM32F10x_DMA_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup DMA
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief DMA Init structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t DMA_PeripheralBaseAddr; /*!< Specifies the peripheral base address for DMAy Channelx. */
|
||||||
|
|
||||||
|
uint32_t DMA_MemoryBaseAddr; /*!< Specifies the memory base address for DMAy Channelx. */
|
||||||
|
|
||||||
|
uint32_t DMA_DIR; /*!< Specifies if the peripheral is the source or destination.
|
||||||
|
This parameter can be a value of @ref DMA_data_transfer_direction */
|
||||||
|
|
||||||
|
uint32_t DMA_BufferSize; /*!< Specifies the buffer size, in data unit, of the specified Channel.
|
||||||
|
The data unit is equal to the configuration set in DMA_PeripheralDataSize
|
||||||
|
or DMA_MemoryDataSize members depending in the transfer direction. */
|
||||||
|
|
||||||
|
uint32_t DMA_PeripheralInc; /*!< Specifies whether the Peripheral address register is incremented or not.
|
||||||
|
This parameter can be a value of @ref DMA_peripheral_incremented_mode */
|
||||||
|
|
||||||
|
uint32_t DMA_MemoryInc; /*!< Specifies whether the memory address register is incremented or not.
|
||||||
|
This parameter can be a value of @ref DMA_memory_incremented_mode */
|
||||||
|
|
||||||
|
uint32_t DMA_PeripheralDataSize; /*!< Specifies the Peripheral data width.
|
||||||
|
This parameter can be a value of @ref DMA_peripheral_data_size */
|
||||||
|
|
||||||
|
uint32_t DMA_MemoryDataSize; /*!< Specifies the Memory data width.
|
||||||
|
This parameter can be a value of @ref DMA_memory_data_size */
|
||||||
|
|
||||||
|
uint32_t DMA_Mode; /*!< Specifies the operation mode of the DMAy Channelx.
|
||||||
|
This parameter can be a value of @ref DMA_circular_normal_mode.
|
||||||
|
@note: The circular buffer mode cannot be used if the memory-to-memory
|
||||||
|
data transfer is configured on the selected Channel */
|
||||||
|
|
||||||
|
uint32_t DMA_Priority; /*!< Specifies the software priority for the DMAy Channelx.
|
||||||
|
This parameter can be a value of @ref DMA_priority_level */
|
||||||
|
|
||||||
|
uint32_t DMA_M2M; /*!< Specifies if the DMAy Channelx will be used in memory-to-memory transfer.
|
||||||
|
This parameter can be a value of @ref DMA_memory_to_memory */
|
||||||
|
}DMA_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || \
|
||||||
|
((PERIPH) == DMA1_Channel2) || \
|
||||||
|
((PERIPH) == DMA1_Channel3) || \
|
||||||
|
((PERIPH) == DMA1_Channel4) || \
|
||||||
|
((PERIPH) == DMA1_Channel5) || \
|
||||||
|
((PERIPH) == DMA1_Channel6) || \
|
||||||
|
((PERIPH) == DMA1_Channel7) || \
|
||||||
|
((PERIPH) == DMA2_Channel1) || \
|
||||||
|
((PERIPH) == DMA2_Channel2) || \
|
||||||
|
((PERIPH) == DMA2_Channel3) || \
|
||||||
|
((PERIPH) == DMA2_Channel4) || \
|
||||||
|
((PERIPH) == DMA2_Channel5))
|
||||||
|
|
||||||
|
/** @defgroup DMA_data_transfer_direction
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DMA_DIR_PeripheralDST ((uint32_t)0x00000010)
|
||||||
|
#define DMA_DIR_PeripheralSRC ((uint32_t)0x00000000)
|
||||||
|
#define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \
|
||||||
|
((DIR) == DMA_DIR_PeripheralSRC))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_peripheral_incremented_mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DMA_PeripheralInc_Enable ((uint32_t)0x00000040)
|
||||||
|
#define DMA_PeripheralInc_Disable ((uint32_t)0x00000000)
|
||||||
|
#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \
|
||||||
|
((STATE) == DMA_PeripheralInc_Disable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_memory_incremented_mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DMA_MemoryInc_Enable ((uint32_t)0x00000080)
|
||||||
|
#define DMA_MemoryInc_Disable ((uint32_t)0x00000000)
|
||||||
|
#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \
|
||||||
|
((STATE) == DMA_MemoryInc_Disable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_peripheral_data_size
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000)
|
||||||
|
#define DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100)
|
||||||
|
#define DMA_PeripheralDataSize_Word ((uint32_t)0x00000200)
|
||||||
|
#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \
|
||||||
|
((SIZE) == DMA_PeripheralDataSize_HalfWord) || \
|
||||||
|
((SIZE) == DMA_PeripheralDataSize_Word))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_memory_data_size
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DMA_MemoryDataSize_Byte ((uint32_t)0x00000000)
|
||||||
|
#define DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400)
|
||||||
|
#define DMA_MemoryDataSize_Word ((uint32_t)0x00000800)
|
||||||
|
#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \
|
||||||
|
((SIZE) == DMA_MemoryDataSize_HalfWord) || \
|
||||||
|
((SIZE) == DMA_MemoryDataSize_Word))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_circular_normal_mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DMA_Mode_Circular ((uint32_t)0x00000020)
|
||||||
|
#define DMA_Mode_Normal ((uint32_t)0x00000000)
|
||||||
|
#define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_priority_level
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DMA_Priority_VeryHigh ((uint32_t)0x00003000)
|
||||||
|
#define DMA_Priority_High ((uint32_t)0x00002000)
|
||||||
|
#define DMA_Priority_Medium ((uint32_t)0x00001000)
|
||||||
|
#define DMA_Priority_Low ((uint32_t)0x00000000)
|
||||||
|
#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \
|
||||||
|
((PRIORITY) == DMA_Priority_High) || \
|
||||||
|
((PRIORITY) == DMA_Priority_Medium) || \
|
||||||
|
((PRIORITY) == DMA_Priority_Low))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_memory_to_memory
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DMA_M2M_Enable ((uint32_t)0x00004000)
|
||||||
|
#define DMA_M2M_Disable ((uint32_t)0x00000000)
|
||||||
|
#define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_interrupts_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define DMA_IT_TC ((uint32_t)0x00000002)
|
||||||
|
#define DMA_IT_HT ((uint32_t)0x00000004)
|
||||||
|
#define DMA_IT_TE ((uint32_t)0x00000008)
|
||||||
|
#define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00))
|
||||||
|
|
||||||
|
#define DMA1_IT_GL1 ((uint32_t)0x00000001)
|
||||||
|
#define DMA1_IT_TC1 ((uint32_t)0x00000002)
|
||||||
|
#define DMA1_IT_HT1 ((uint32_t)0x00000004)
|
||||||
|
#define DMA1_IT_TE1 ((uint32_t)0x00000008)
|
||||||
|
#define DMA1_IT_GL2 ((uint32_t)0x00000010)
|
||||||
|
#define DMA1_IT_TC2 ((uint32_t)0x00000020)
|
||||||
|
#define DMA1_IT_HT2 ((uint32_t)0x00000040)
|
||||||
|
#define DMA1_IT_TE2 ((uint32_t)0x00000080)
|
||||||
|
#define DMA1_IT_GL3 ((uint32_t)0x00000100)
|
||||||
|
#define DMA1_IT_TC3 ((uint32_t)0x00000200)
|
||||||
|
#define DMA1_IT_HT3 ((uint32_t)0x00000400)
|
||||||
|
#define DMA1_IT_TE3 ((uint32_t)0x00000800)
|
||||||
|
#define DMA1_IT_GL4 ((uint32_t)0x00001000)
|
||||||
|
#define DMA1_IT_TC4 ((uint32_t)0x00002000)
|
||||||
|
#define DMA1_IT_HT4 ((uint32_t)0x00004000)
|
||||||
|
#define DMA1_IT_TE4 ((uint32_t)0x00008000)
|
||||||
|
#define DMA1_IT_GL5 ((uint32_t)0x00010000)
|
||||||
|
#define DMA1_IT_TC5 ((uint32_t)0x00020000)
|
||||||
|
#define DMA1_IT_HT5 ((uint32_t)0x00040000)
|
||||||
|
#define DMA1_IT_TE5 ((uint32_t)0x00080000)
|
||||||
|
#define DMA1_IT_GL6 ((uint32_t)0x00100000)
|
||||||
|
#define DMA1_IT_TC6 ((uint32_t)0x00200000)
|
||||||
|
#define DMA1_IT_HT6 ((uint32_t)0x00400000)
|
||||||
|
#define DMA1_IT_TE6 ((uint32_t)0x00800000)
|
||||||
|
#define DMA1_IT_GL7 ((uint32_t)0x01000000)
|
||||||
|
#define DMA1_IT_TC7 ((uint32_t)0x02000000)
|
||||||
|
#define DMA1_IT_HT7 ((uint32_t)0x04000000)
|
||||||
|
#define DMA1_IT_TE7 ((uint32_t)0x08000000)
|
||||||
|
|
||||||
|
#define DMA2_IT_GL1 ((uint32_t)0x10000001)
|
||||||
|
#define DMA2_IT_TC1 ((uint32_t)0x10000002)
|
||||||
|
#define DMA2_IT_HT1 ((uint32_t)0x10000004)
|
||||||
|
#define DMA2_IT_TE1 ((uint32_t)0x10000008)
|
||||||
|
#define DMA2_IT_GL2 ((uint32_t)0x10000010)
|
||||||
|
#define DMA2_IT_TC2 ((uint32_t)0x10000020)
|
||||||
|
#define DMA2_IT_HT2 ((uint32_t)0x10000040)
|
||||||
|
#define DMA2_IT_TE2 ((uint32_t)0x10000080)
|
||||||
|
#define DMA2_IT_GL3 ((uint32_t)0x10000100)
|
||||||
|
#define DMA2_IT_TC3 ((uint32_t)0x10000200)
|
||||||
|
#define DMA2_IT_HT3 ((uint32_t)0x10000400)
|
||||||
|
#define DMA2_IT_TE3 ((uint32_t)0x10000800)
|
||||||
|
#define DMA2_IT_GL4 ((uint32_t)0x10001000)
|
||||||
|
#define DMA2_IT_TC4 ((uint32_t)0x10002000)
|
||||||
|
#define DMA2_IT_HT4 ((uint32_t)0x10004000)
|
||||||
|
#define DMA2_IT_TE4 ((uint32_t)0x10008000)
|
||||||
|
#define DMA2_IT_GL5 ((uint32_t)0x10010000)
|
||||||
|
#define DMA2_IT_TC5 ((uint32_t)0x10020000)
|
||||||
|
#define DMA2_IT_HT5 ((uint32_t)0x10040000)
|
||||||
|
#define DMA2_IT_TE5 ((uint32_t)0x10080000)
|
||||||
|
|
||||||
|
#define IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00))
|
||||||
|
|
||||||
|
#define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \
|
||||||
|
((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \
|
||||||
|
((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \
|
||||||
|
((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \
|
||||||
|
((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \
|
||||||
|
((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \
|
||||||
|
((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \
|
||||||
|
((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \
|
||||||
|
((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \
|
||||||
|
((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || \
|
||||||
|
((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || \
|
||||||
|
((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || \
|
||||||
|
((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || \
|
||||||
|
((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7) || \
|
||||||
|
((IT) == DMA2_IT_GL1) || ((IT) == DMA2_IT_TC1) || \
|
||||||
|
((IT) == DMA2_IT_HT1) || ((IT) == DMA2_IT_TE1) || \
|
||||||
|
((IT) == DMA2_IT_GL2) || ((IT) == DMA2_IT_TC2) || \
|
||||||
|
((IT) == DMA2_IT_HT2) || ((IT) == DMA2_IT_TE2) || \
|
||||||
|
((IT) == DMA2_IT_GL3) || ((IT) == DMA2_IT_TC3) || \
|
||||||
|
((IT) == DMA2_IT_HT3) || ((IT) == DMA2_IT_TE3) || \
|
||||||
|
((IT) == DMA2_IT_GL4) || ((IT) == DMA2_IT_TC4) || \
|
||||||
|
((IT) == DMA2_IT_HT4) || ((IT) == DMA2_IT_TE4) || \
|
||||||
|
((IT) == DMA2_IT_GL5) || ((IT) == DMA2_IT_TC5) || \
|
||||||
|
((IT) == DMA2_IT_HT5) || ((IT) == DMA2_IT_TE5))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_flags_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define DMA1_FLAG_GL1 ((uint32_t)0x00000001)
|
||||||
|
#define DMA1_FLAG_TC1 ((uint32_t)0x00000002)
|
||||||
|
#define DMA1_FLAG_HT1 ((uint32_t)0x00000004)
|
||||||
|
#define DMA1_FLAG_TE1 ((uint32_t)0x00000008)
|
||||||
|
#define DMA1_FLAG_GL2 ((uint32_t)0x00000010)
|
||||||
|
#define DMA1_FLAG_TC2 ((uint32_t)0x00000020)
|
||||||
|
#define DMA1_FLAG_HT2 ((uint32_t)0x00000040)
|
||||||
|
#define DMA1_FLAG_TE2 ((uint32_t)0x00000080)
|
||||||
|
#define DMA1_FLAG_GL3 ((uint32_t)0x00000100)
|
||||||
|
#define DMA1_FLAG_TC3 ((uint32_t)0x00000200)
|
||||||
|
#define DMA1_FLAG_HT3 ((uint32_t)0x00000400)
|
||||||
|
#define DMA1_FLAG_TE3 ((uint32_t)0x00000800)
|
||||||
|
#define DMA1_FLAG_GL4 ((uint32_t)0x00001000)
|
||||||
|
#define DMA1_FLAG_TC4 ((uint32_t)0x00002000)
|
||||||
|
#define DMA1_FLAG_HT4 ((uint32_t)0x00004000)
|
||||||
|
#define DMA1_FLAG_TE4 ((uint32_t)0x00008000)
|
||||||
|
#define DMA1_FLAG_GL5 ((uint32_t)0x00010000)
|
||||||
|
#define DMA1_FLAG_TC5 ((uint32_t)0x00020000)
|
||||||
|
#define DMA1_FLAG_HT5 ((uint32_t)0x00040000)
|
||||||
|
#define DMA1_FLAG_TE5 ((uint32_t)0x00080000)
|
||||||
|
#define DMA1_FLAG_GL6 ((uint32_t)0x00100000)
|
||||||
|
#define DMA1_FLAG_TC6 ((uint32_t)0x00200000)
|
||||||
|
#define DMA1_FLAG_HT6 ((uint32_t)0x00400000)
|
||||||
|
#define DMA1_FLAG_TE6 ((uint32_t)0x00800000)
|
||||||
|
#define DMA1_FLAG_GL7 ((uint32_t)0x01000000)
|
||||||
|
#define DMA1_FLAG_TC7 ((uint32_t)0x02000000)
|
||||||
|
#define DMA1_FLAG_HT7 ((uint32_t)0x04000000)
|
||||||
|
#define DMA1_FLAG_TE7 ((uint32_t)0x08000000)
|
||||||
|
|
||||||
|
#define DMA2_FLAG_GL1 ((uint32_t)0x10000001)
|
||||||
|
#define DMA2_FLAG_TC1 ((uint32_t)0x10000002)
|
||||||
|
#define DMA2_FLAG_HT1 ((uint32_t)0x10000004)
|
||||||
|
#define DMA2_FLAG_TE1 ((uint32_t)0x10000008)
|
||||||
|
#define DMA2_FLAG_GL2 ((uint32_t)0x10000010)
|
||||||
|
#define DMA2_FLAG_TC2 ((uint32_t)0x10000020)
|
||||||
|
#define DMA2_FLAG_HT2 ((uint32_t)0x10000040)
|
||||||
|
#define DMA2_FLAG_TE2 ((uint32_t)0x10000080)
|
||||||
|
#define DMA2_FLAG_GL3 ((uint32_t)0x10000100)
|
||||||
|
#define DMA2_FLAG_TC3 ((uint32_t)0x10000200)
|
||||||
|
#define DMA2_FLAG_HT3 ((uint32_t)0x10000400)
|
||||||
|
#define DMA2_FLAG_TE3 ((uint32_t)0x10000800)
|
||||||
|
#define DMA2_FLAG_GL4 ((uint32_t)0x10001000)
|
||||||
|
#define DMA2_FLAG_TC4 ((uint32_t)0x10002000)
|
||||||
|
#define DMA2_FLAG_HT4 ((uint32_t)0x10004000)
|
||||||
|
#define DMA2_FLAG_TE4 ((uint32_t)0x10008000)
|
||||||
|
#define DMA2_FLAG_GL5 ((uint32_t)0x10010000)
|
||||||
|
#define DMA2_FLAG_TC5 ((uint32_t)0x10020000)
|
||||||
|
#define DMA2_FLAG_HT5 ((uint32_t)0x10040000)
|
||||||
|
#define DMA2_FLAG_TE5 ((uint32_t)0x10080000)
|
||||||
|
|
||||||
|
#define IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00))
|
||||||
|
|
||||||
|
#define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \
|
||||||
|
((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \
|
||||||
|
((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \
|
||||||
|
((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \
|
||||||
|
((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \
|
||||||
|
((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \
|
||||||
|
((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \
|
||||||
|
((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \
|
||||||
|
((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \
|
||||||
|
((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || \
|
||||||
|
((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || \
|
||||||
|
((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || \
|
||||||
|
((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || \
|
||||||
|
((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7) || \
|
||||||
|
((FLAG) == DMA2_FLAG_GL1) || ((FLAG) == DMA2_FLAG_TC1) || \
|
||||||
|
((FLAG) == DMA2_FLAG_HT1) || ((FLAG) == DMA2_FLAG_TE1) || \
|
||||||
|
((FLAG) == DMA2_FLAG_GL2) || ((FLAG) == DMA2_FLAG_TC2) || \
|
||||||
|
((FLAG) == DMA2_FLAG_HT2) || ((FLAG) == DMA2_FLAG_TE2) || \
|
||||||
|
((FLAG) == DMA2_FLAG_GL3) || ((FLAG) == DMA2_FLAG_TC3) || \
|
||||||
|
((FLAG) == DMA2_FLAG_HT3) || ((FLAG) == DMA2_FLAG_TE3) || \
|
||||||
|
((FLAG) == DMA2_FLAG_GL4) || ((FLAG) == DMA2_FLAG_TC4) || \
|
||||||
|
((FLAG) == DMA2_FLAG_HT4) || ((FLAG) == DMA2_FLAG_TE4) || \
|
||||||
|
((FLAG) == DMA2_FLAG_GL5) || ((FLAG) == DMA2_FLAG_TC5) || \
|
||||||
|
((FLAG) == DMA2_FLAG_HT5) || ((FLAG) == DMA2_FLAG_TE5))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_Buffer_Size
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup DMA_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx);
|
||||||
|
void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct);
|
||||||
|
void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct);
|
||||||
|
void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState);
|
||||||
|
void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState);
|
||||||
|
void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber);
|
||||||
|
uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx);
|
||||||
|
FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG);
|
||||||
|
void DMA_ClearFlag(uint32_t DMAy_FLAG);
|
||||||
|
ITStatus DMA_GetITStatus(uint32_t DMAy_IT);
|
||||||
|
void DMA_ClearITPendingBit(uint32_t DMAy_IT);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__STM32F10x_DMA_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,184 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_exti.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the EXTI firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_EXTI_H
|
||||||
|
#define __STM32F10x_EXTI_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup EXTI
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup EXTI_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief EXTI mode enumeration
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
EXTI_Mode_Interrupt = 0x00,
|
||||||
|
EXTI_Mode_Event = 0x04
|
||||||
|
}EXTIMode_TypeDef;
|
||||||
|
|
||||||
|
#define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief EXTI Trigger enumeration
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
EXTI_Trigger_Rising = 0x08,
|
||||||
|
EXTI_Trigger_Falling = 0x0C,
|
||||||
|
EXTI_Trigger_Rising_Falling = 0x10
|
||||||
|
}EXTITrigger_TypeDef;
|
||||||
|
|
||||||
|
#define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
|
||||||
|
((TRIGGER) == EXTI_Trigger_Falling) || \
|
||||||
|
((TRIGGER) == EXTI_Trigger_Rising_Falling))
|
||||||
|
/**
|
||||||
|
* @brief EXTI Init Structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled.
|
||||||
|
This parameter can be any combination of @ref EXTI_Lines */
|
||||||
|
|
||||||
|
EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines.
|
||||||
|
This parameter can be a value of @ref EXTIMode_TypeDef */
|
||||||
|
|
||||||
|
EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
|
||||||
|
This parameter can be a value of @ref EXTIMode_TypeDef */
|
||||||
|
|
||||||
|
FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines.
|
||||||
|
This parameter can be set either to ENABLE or DISABLE */
|
||||||
|
}EXTI_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup EXTI_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup EXTI_Lines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */
|
||||||
|
#define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */
|
||||||
|
#define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */
|
||||||
|
#define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */
|
||||||
|
#define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */
|
||||||
|
#define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */
|
||||||
|
#define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */
|
||||||
|
#define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */
|
||||||
|
#define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */
|
||||||
|
#define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */
|
||||||
|
#define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */
|
||||||
|
#define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */
|
||||||
|
#define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */
|
||||||
|
#define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */
|
||||||
|
#define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */
|
||||||
|
#define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */
|
||||||
|
#define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */
|
||||||
|
#define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */
|
||||||
|
#define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS
|
||||||
|
Wakeup from suspend event */
|
||||||
|
#define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
|
||||||
|
|
||||||
|
#define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00))
|
||||||
|
#define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
|
||||||
|
((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
|
||||||
|
((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
|
||||||
|
((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
|
||||||
|
((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
|
||||||
|
((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
|
||||||
|
((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
|
||||||
|
((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
|
||||||
|
((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
|
||||||
|
((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19))
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup EXTI_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup EXTI_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void EXTI_DeInit(void);
|
||||||
|
void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
|
||||||
|
void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
|
||||||
|
void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
|
||||||
|
FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
|
||||||
|
void EXTI_ClearFlag(uint32_t EXTI_Line);
|
||||||
|
ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
|
||||||
|
void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_EXTI_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,426 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_flash.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the FLASH
|
||||||
|
* firmware library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_FLASH_H
|
||||||
|
#define __STM32F10x_FLASH_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup FLASH
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FLASH_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief FLASH Status
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
FLASH_BUSY = 1,
|
||||||
|
FLASH_ERROR_PG,
|
||||||
|
FLASH_ERROR_WRP,
|
||||||
|
FLASH_COMPLETE,
|
||||||
|
FLASH_TIMEOUT
|
||||||
|
}FLASH_Status;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FLASH_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Flash_Latency
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FLASH_Latency_0 ((uint32_t)0x00000000) /*!< FLASH Zero Latency cycle */
|
||||||
|
#define FLASH_Latency_1 ((uint32_t)0x00000001) /*!< FLASH One Latency cycle */
|
||||||
|
#define FLASH_Latency_2 ((uint32_t)0x00000002) /*!< FLASH Two Latency cycles */
|
||||||
|
#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \
|
||||||
|
((LATENCY) == FLASH_Latency_1) || \
|
||||||
|
((LATENCY) == FLASH_Latency_2))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Half_Cycle_Enable_Disable
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FLASH_HalfCycleAccess_Enable ((uint32_t)0x00000008) /*!< FLASH Half Cycle Enable */
|
||||||
|
#define FLASH_HalfCycleAccess_Disable ((uint32_t)0x00000000) /*!< FLASH Half Cycle Disable */
|
||||||
|
#define IS_FLASH_HALFCYCLEACCESS_STATE(STATE) (((STATE) == FLASH_HalfCycleAccess_Enable) || \
|
||||||
|
((STATE) == FLASH_HalfCycleAccess_Disable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Prefetch_Buffer_Enable_Disable
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FLASH_PrefetchBuffer_Enable ((uint32_t)0x00000010) /*!< FLASH Prefetch Buffer Enable */
|
||||||
|
#define FLASH_PrefetchBuffer_Disable ((uint32_t)0x00000000) /*!< FLASH Prefetch Buffer Disable */
|
||||||
|
#define IS_FLASH_PREFETCHBUFFER_STATE(STATE) (((STATE) == FLASH_PrefetchBuffer_Enable) || \
|
||||||
|
((STATE) == FLASH_PrefetchBuffer_Disable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Option_Bytes_Write_Protection
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Values to be used with STM32 Low and Medium density devices */
|
||||||
|
#define FLASH_WRProt_Pages0to3 ((uint32_t)0x00000001) /*!< STM32 Low and Medium density devices: Write protection of page 0 to 3 */
|
||||||
|
#define FLASH_WRProt_Pages4to7 ((uint32_t)0x00000002) /*!< STM32 Low and Medium density devices: Write protection of page 4 to 7 */
|
||||||
|
#define FLASH_WRProt_Pages8to11 ((uint32_t)0x00000004) /*!< STM32 Low and Medium density devices: Write protection of page 8 to 11 */
|
||||||
|
#define FLASH_WRProt_Pages12to15 ((uint32_t)0x00000008) /*!< STM32 Low and Medium density devices: Write protection of page 12 to 15 */
|
||||||
|
#define FLASH_WRProt_Pages16to19 ((uint32_t)0x00000010) /*!< STM32 Low and Medium density devices: Write protection of page 16 to 19 */
|
||||||
|
#define FLASH_WRProt_Pages20to23 ((uint32_t)0x00000020) /*!< STM32 Low and Medium density devices: Write protection of page 20 to 23 */
|
||||||
|
#define FLASH_WRProt_Pages24to27 ((uint32_t)0x00000040) /*!< STM32 Low and Medium density devices: Write protection of page 24 to 27 */
|
||||||
|
#define FLASH_WRProt_Pages28to31 ((uint32_t)0x00000080) /*!< STM32 Low and Medium density devices: Write protection of page 28 to 31 */
|
||||||
|
|
||||||
|
/* Values to be used with STM32 Medium-density devices */
|
||||||
|
#define FLASH_WRProt_Pages32to35 ((uint32_t)0x00000100) /*!< STM32 Medium-density devices: Write protection of page 32 to 35 */
|
||||||
|
#define FLASH_WRProt_Pages36to39 ((uint32_t)0x00000200) /*!< STM32 Medium-density devices: Write protection of page 36 to 39 */
|
||||||
|
#define FLASH_WRProt_Pages40to43 ((uint32_t)0x00000400) /*!< STM32 Medium-density devices: Write protection of page 40 to 43 */
|
||||||
|
#define FLASH_WRProt_Pages44to47 ((uint32_t)0x00000800) /*!< STM32 Medium-density devices: Write protection of page 44 to 47 */
|
||||||
|
#define FLASH_WRProt_Pages48to51 ((uint32_t)0x00001000) /*!< STM32 Medium-density devices: Write protection of page 48 to 51 */
|
||||||
|
#define FLASH_WRProt_Pages52to55 ((uint32_t)0x00002000) /*!< STM32 Medium-density devices: Write protection of page 52 to 55 */
|
||||||
|
#define FLASH_WRProt_Pages56to59 ((uint32_t)0x00004000) /*!< STM32 Medium-density devices: Write protection of page 56 to 59 */
|
||||||
|
#define FLASH_WRProt_Pages60to63 ((uint32_t)0x00008000) /*!< STM32 Medium-density devices: Write protection of page 60 to 63 */
|
||||||
|
#define FLASH_WRProt_Pages64to67 ((uint32_t)0x00010000) /*!< STM32 Medium-density devices: Write protection of page 64 to 67 */
|
||||||
|
#define FLASH_WRProt_Pages68to71 ((uint32_t)0x00020000) /*!< STM32 Medium-density devices: Write protection of page 68 to 71 */
|
||||||
|
#define FLASH_WRProt_Pages72to75 ((uint32_t)0x00040000) /*!< STM32 Medium-density devices: Write protection of page 72 to 75 */
|
||||||
|
#define FLASH_WRProt_Pages76to79 ((uint32_t)0x00080000) /*!< STM32 Medium-density devices: Write protection of page 76 to 79 */
|
||||||
|
#define FLASH_WRProt_Pages80to83 ((uint32_t)0x00100000) /*!< STM32 Medium-density devices: Write protection of page 80 to 83 */
|
||||||
|
#define FLASH_WRProt_Pages84to87 ((uint32_t)0x00200000) /*!< STM32 Medium-density devices: Write protection of page 84 to 87 */
|
||||||
|
#define FLASH_WRProt_Pages88to91 ((uint32_t)0x00400000) /*!< STM32 Medium-density devices: Write protection of page 88 to 91 */
|
||||||
|
#define FLASH_WRProt_Pages92to95 ((uint32_t)0x00800000) /*!< STM32 Medium-density devices: Write protection of page 92 to 95 */
|
||||||
|
#define FLASH_WRProt_Pages96to99 ((uint32_t)0x01000000) /*!< STM32 Medium-density devices: Write protection of page 96 to 99 */
|
||||||
|
#define FLASH_WRProt_Pages100to103 ((uint32_t)0x02000000) /*!< STM32 Medium-density devices: Write protection of page 100 to 103 */
|
||||||
|
#define FLASH_WRProt_Pages104to107 ((uint32_t)0x04000000) /*!< STM32 Medium-density devices: Write protection of page 104 to 107 */
|
||||||
|
#define FLASH_WRProt_Pages108to111 ((uint32_t)0x08000000) /*!< STM32 Medium-density devices: Write protection of page 108 to 111 */
|
||||||
|
#define FLASH_WRProt_Pages112to115 ((uint32_t)0x10000000) /*!< STM32 Medium-density devices: Write protection of page 112 to 115 */
|
||||||
|
#define FLASH_WRProt_Pages116to119 ((uint32_t)0x20000000) /*!< STM32 Medium-density devices: Write protection of page 115 to 119 */
|
||||||
|
#define FLASH_WRProt_Pages120to123 ((uint32_t)0x40000000) /*!< STM32 Medium-density devices: Write protection of page 120 to 123 */
|
||||||
|
#define FLASH_WRProt_Pages124to127 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 124 to 127 */
|
||||||
|
|
||||||
|
/* Values to be used with STM32 High-density and STM32F10X Connectivity line devices */
|
||||||
|
#define FLASH_WRProt_Pages0to1 ((uint32_t)0x00000001) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 0 to 1 */
|
||||||
|
#define FLASH_WRProt_Pages2to3 ((uint32_t)0x00000002) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 2 to 3 */
|
||||||
|
#define FLASH_WRProt_Pages4to5 ((uint32_t)0x00000004) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 4 to 5 */
|
||||||
|
#define FLASH_WRProt_Pages6to7 ((uint32_t)0x00000008) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 6 to 7 */
|
||||||
|
#define FLASH_WRProt_Pages8to9 ((uint32_t)0x00000010) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 8 to 9 */
|
||||||
|
#define FLASH_WRProt_Pages10to11 ((uint32_t)0x00000020) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 10 to 11 */
|
||||||
|
#define FLASH_WRProt_Pages12to13 ((uint32_t)0x00000040) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 12 to 13 */
|
||||||
|
#define FLASH_WRProt_Pages14to15 ((uint32_t)0x00000080) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 14 to 15 */
|
||||||
|
#define FLASH_WRProt_Pages16to17 ((uint32_t)0x00000100) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 16 to 17 */
|
||||||
|
#define FLASH_WRProt_Pages18to19 ((uint32_t)0x00000200) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 18 to 19 */
|
||||||
|
#define FLASH_WRProt_Pages20to21 ((uint32_t)0x00000400) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 20 to 21 */
|
||||||
|
#define FLASH_WRProt_Pages22to23 ((uint32_t)0x00000800) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 22 to 23 */
|
||||||
|
#define FLASH_WRProt_Pages24to25 ((uint32_t)0x00001000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 24 to 25 */
|
||||||
|
#define FLASH_WRProt_Pages26to27 ((uint32_t)0x00002000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 26 to 27 */
|
||||||
|
#define FLASH_WRProt_Pages28to29 ((uint32_t)0x00004000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 28 to 29 */
|
||||||
|
#define FLASH_WRProt_Pages30to31 ((uint32_t)0x00008000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 30 to 31 */
|
||||||
|
#define FLASH_WRProt_Pages32to33 ((uint32_t)0x00010000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 32 to 33 */
|
||||||
|
#define FLASH_WRProt_Pages34to35 ((uint32_t)0x00020000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 34 to 35 */
|
||||||
|
#define FLASH_WRProt_Pages36to37 ((uint32_t)0x00040000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 36 to 37 */
|
||||||
|
#define FLASH_WRProt_Pages38to39 ((uint32_t)0x00080000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 38 to 39 */
|
||||||
|
#define FLASH_WRProt_Pages40to41 ((uint32_t)0x00100000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 40 to 41 */
|
||||||
|
#define FLASH_WRProt_Pages42to43 ((uint32_t)0x00200000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 42 to 43 */
|
||||||
|
#define FLASH_WRProt_Pages44to45 ((uint32_t)0x00400000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 44 to 45 */
|
||||||
|
#define FLASH_WRProt_Pages46to47 ((uint32_t)0x00800000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 46 to 47 */
|
||||||
|
#define FLASH_WRProt_Pages48to49 ((uint32_t)0x01000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 48 to 49 */
|
||||||
|
#define FLASH_WRProt_Pages50to51 ((uint32_t)0x02000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 50 to 51 */
|
||||||
|
#define FLASH_WRProt_Pages52to53 ((uint32_t)0x04000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 52 to 53 */
|
||||||
|
#define FLASH_WRProt_Pages54to55 ((uint32_t)0x08000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 54 to 55 */
|
||||||
|
#define FLASH_WRProt_Pages56to57 ((uint32_t)0x10000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 56 to 57 */
|
||||||
|
#define FLASH_WRProt_Pages58to59 ((uint32_t)0x20000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 58 to 59 */
|
||||||
|
#define FLASH_WRProt_Pages60to61 ((uint32_t)0x40000000) /*!< STM32 High-density, XL-density and Connectivity line devices:
|
||||||
|
Write protection of page 60 to 61 */
|
||||||
|
#define FLASH_WRProt_Pages62to127 ((uint32_t)0x80000000) /*!< STM32 Connectivity line devices: Write protection of page 62 to 127 */
|
||||||
|
#define FLASH_WRProt_Pages62to255 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 62 to 255 */
|
||||||
|
#define FLASH_WRProt_Pages62to511 ((uint32_t)0x80000000) /*!< STM32 XL-density devices: Write protection of page 62 to 511 */
|
||||||
|
|
||||||
|
#define FLASH_WRProt_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */
|
||||||
|
|
||||||
|
#define IS_FLASH_WRPROT_PAGE(PAGE) (((PAGE) != 0x00000000))
|
||||||
|
|
||||||
|
#define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x080FFFFF))
|
||||||
|
|
||||||
|
#define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == 0x1FFFF804) || ((ADDRESS) == 0x1FFFF806))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Option_Bytes_IWatchdog
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */
|
||||||
|
#define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */
|
||||||
|
#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Option_Bytes_nRST_STOP
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define OB_STOP_NoRST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */
|
||||||
|
#define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */
|
||||||
|
#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Option_Bytes_nRST_STDBY
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define OB_STDBY_NoRST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */
|
||||||
|
#define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */
|
||||||
|
#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST))
|
||||||
|
|
||||||
|
#ifdef STM32F10X_XL
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/** @defgroup FLASH_Boot
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define FLASH_BOOT_Bank1 ((uint16_t)0x0000) /*!< At startup, if boot pins are set in boot from user Flash position
|
||||||
|
and this parameter is selected the device will boot from Bank1(Default) */
|
||||||
|
#define FLASH_BOOT_Bank2 ((uint16_t)0x0001) /*!< At startup, if boot pins are set in boot from user Flash position
|
||||||
|
and this parameter is selected the device will boot from Bank 2 or Bank 1,
|
||||||
|
depending on the activation of the bank */
|
||||||
|
#define IS_FLASH_BOOT(BOOT) (((BOOT) == FLASH_BOOT_Bank1) || ((BOOT) == FLASH_BOOT_Bank2))
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/** @defgroup FLASH_Interrupts
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#ifdef STM32F10X_XL
|
||||||
|
#define FLASH_IT_BANK2_ERROR ((uint32_t)0x80000400) /*!< FPEC BANK2 error interrupt source */
|
||||||
|
#define FLASH_IT_BANK2_EOP ((uint32_t)0x80001000) /*!< End of FLASH BANK2 Operation Interrupt source */
|
||||||
|
|
||||||
|
#define FLASH_IT_BANK1_ERROR FLASH_IT_ERROR /*!< FPEC BANK1 error interrupt source */
|
||||||
|
#define FLASH_IT_BANK1_EOP FLASH_IT_EOP /*!< End of FLASH BANK1 Operation Interrupt source */
|
||||||
|
|
||||||
|
#define FLASH_IT_ERROR ((uint32_t)0x00000400) /*!< FPEC BANK1 error interrupt source */
|
||||||
|
#define FLASH_IT_EOP ((uint32_t)0x00001000) /*!< End of FLASH BANK1 Operation Interrupt source */
|
||||||
|
#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0x7FFFEBFF) == 0x00000000) && (((IT) != 0x00000000)))
|
||||||
|
#else
|
||||||
|
#define FLASH_IT_ERROR ((uint32_t)0x00000400) /*!< FPEC error interrupt source */
|
||||||
|
#define FLASH_IT_EOP ((uint32_t)0x00001000) /*!< End of FLASH Operation Interrupt source */
|
||||||
|
#define FLASH_IT_BANK1_ERROR FLASH_IT_ERROR /*!< FPEC BANK1 error interrupt source */
|
||||||
|
#define FLASH_IT_BANK1_EOP FLASH_IT_EOP /*!< End of FLASH BANK1 Operation Interrupt source */
|
||||||
|
|
||||||
|
#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFFEBFF) == 0x00000000) && (((IT) != 0x00000000)))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FLASH_Flags
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#ifdef STM32F10X_XL
|
||||||
|
#define FLASH_FLAG_BANK2_BSY ((uint32_t)0x80000001) /*!< FLASH BANK2 Busy flag */
|
||||||
|
#define FLASH_FLAG_BANK2_EOP ((uint32_t)0x80000020) /*!< FLASH BANK2 End of Operation flag */
|
||||||
|
#define FLASH_FLAG_BANK2_PGERR ((uint32_t)0x80000004) /*!< FLASH BANK2 Program error flag */
|
||||||
|
#define FLASH_FLAG_BANK2_WRPRTERR ((uint32_t)0x80000010) /*!< FLASH BANK2 Write protected error flag */
|
||||||
|
|
||||||
|
#define FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY /*!< FLASH BANK1 Busy flag*/
|
||||||
|
#define FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP /*!< FLASH BANK1 End of Operation flag */
|
||||||
|
#define FLASH_FLAG_BANK1_PGERR FLASH_FLAG_PGERR /*!< FLASH BANK1 Program error flag */
|
||||||
|
#define FLASH_FLAG_BANK1_WRPRTERR FLASH_FLAG_WRPRTERR /*!< FLASH BANK1 Write protected error flag */
|
||||||
|
|
||||||
|
#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /*!< FLASH Busy flag */
|
||||||
|
#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /*!< FLASH End of Operation flag */
|
||||||
|
#define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /*!< FLASH Program error flag */
|
||||||
|
#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */
|
||||||
|
#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /*!< FLASH Option Byte error flag */
|
||||||
|
|
||||||
|
#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0x7FFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000))
|
||||||
|
#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \
|
||||||
|
((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \
|
||||||
|
((FLAG) == FLASH_FLAG_OPTERR)|| \
|
||||||
|
((FLAG) == FLASH_FLAG_BANK1_BSY) || ((FLAG) == FLASH_FLAG_BANK1_EOP) || \
|
||||||
|
((FLAG) == FLASH_FLAG_BANK1_PGERR) || ((FLAG) == FLASH_FLAG_BANK1_WRPRTERR) || \
|
||||||
|
((FLAG) == FLASH_FLAG_BANK2_BSY) || ((FLAG) == FLASH_FLAG_BANK2_EOP) || \
|
||||||
|
((FLAG) == FLASH_FLAG_BANK2_PGERR) || ((FLAG) == FLASH_FLAG_BANK2_WRPRTERR))
|
||||||
|
#else
|
||||||
|
#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /*!< FLASH Busy flag */
|
||||||
|
#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /*!< FLASH End of Operation flag */
|
||||||
|
#define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /*!< FLASH Program error flag */
|
||||||
|
#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */
|
||||||
|
#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /*!< FLASH Option Byte error flag */
|
||||||
|
|
||||||
|
#define FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY /*!< FLASH BANK1 Busy flag*/
|
||||||
|
#define FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP /*!< FLASH BANK1 End of Operation flag */
|
||||||
|
#define FLASH_FLAG_BANK1_PGERR FLASH_FLAG_PGERR /*!< FLASH BANK1 Program error flag */
|
||||||
|
#define FLASH_FLAG_BANK1_WRPRTERR FLASH_FLAG_WRPRTERR /*!< FLASH BANK1 Write protected error flag */
|
||||||
|
|
||||||
|
#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000))
|
||||||
|
#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \
|
||||||
|
((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \
|
||||||
|
((FLAG) == FLASH_FLAG_BANK1_BSY) || ((FLAG) == FLASH_FLAG_BANK1_EOP) || \
|
||||||
|
((FLAG) == FLASH_FLAG_BANK1_PGERR) || ((FLAG) == FLASH_FLAG_BANK1_WRPRTERR) || \
|
||||||
|
((FLAG) == FLASH_FLAG_OPTERR))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FLASH_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FLASH_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*------------ Functions used for all STM32F10x devices -----*/
|
||||||
|
void FLASH_SetLatency(uint32_t FLASH_Latency);
|
||||||
|
void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess);
|
||||||
|
void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer);
|
||||||
|
void FLASH_Unlock(void);
|
||||||
|
void FLASH_Lock(void);
|
||||||
|
FLASH_Status FLASH_ErasePage(uint32_t Page_Address);
|
||||||
|
FLASH_Status FLASH_EraseAllPages(void);
|
||||||
|
FLASH_Status FLASH_EraseOptionBytes(void);
|
||||||
|
FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data);
|
||||||
|
FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data);
|
||||||
|
FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data);
|
||||||
|
FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages);
|
||||||
|
FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState);
|
||||||
|
FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY);
|
||||||
|
uint32_t FLASH_GetUserOptionByte(void);
|
||||||
|
uint32_t FLASH_GetWriteProtectionOptionByte(void);
|
||||||
|
FlagStatus FLASH_GetReadOutProtectionStatus(void);
|
||||||
|
FlagStatus FLASH_GetPrefetchBufferStatus(void);
|
||||||
|
void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
|
||||||
|
FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
|
||||||
|
void FLASH_ClearFlag(uint32_t FLASH_FLAG);
|
||||||
|
FLASH_Status FLASH_GetStatus(void);
|
||||||
|
FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout);
|
||||||
|
|
||||||
|
/*------------ New function used for all STM32F10x devices -----*/
|
||||||
|
void FLASH_UnlockBank1(void);
|
||||||
|
void FLASH_LockBank1(void);
|
||||||
|
FLASH_Status FLASH_EraseAllBank1Pages(void);
|
||||||
|
FLASH_Status FLASH_GetBank1Status(void);
|
||||||
|
FLASH_Status FLASH_WaitForLastBank1Operation(uint32_t Timeout);
|
||||||
|
|
||||||
|
#ifdef STM32F10X_XL
|
||||||
|
/*---- New Functions used only with STM32F10x_XL density devices -----*/
|
||||||
|
void FLASH_UnlockBank2(void);
|
||||||
|
void FLASH_LockBank2(void);
|
||||||
|
FLASH_Status FLASH_EraseAllBank2Pages(void);
|
||||||
|
FLASH_Status FLASH_GetBank2Status(void);
|
||||||
|
FLASH_Status FLASH_WaitForLastBank2Operation(uint32_t Timeout);
|
||||||
|
FLASH_Status FLASH_BootConfig(uint16_t FLASH_BOOT);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_FLASH_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,733 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_fsmc.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the FSMC firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_FSMC_H
|
||||||
|
#define __STM32F10x_FSMC_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup FSMC
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Timing parameters For NOR/SRAM Banks
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t FSMC_AddressSetupTime; /*!< Defines the number of HCLK cycles to configure
|
||||||
|
the duration of the address setup time.
|
||||||
|
This parameter can be a value between 0 and 0xF.
|
||||||
|
@note: It is not used with synchronous NOR Flash memories. */
|
||||||
|
|
||||||
|
uint32_t FSMC_AddressHoldTime; /*!< Defines the number of HCLK cycles to configure
|
||||||
|
the duration of the address hold time.
|
||||||
|
This parameter can be a value between 0 and 0xF.
|
||||||
|
@note: It is not used with synchronous NOR Flash memories.*/
|
||||||
|
|
||||||
|
uint32_t FSMC_DataSetupTime; /*!< Defines the number of HCLK cycles to configure
|
||||||
|
the duration of the data setup time.
|
||||||
|
This parameter can be a value between 0 and 0xFF.
|
||||||
|
@note: It is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories. */
|
||||||
|
|
||||||
|
uint32_t FSMC_BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure
|
||||||
|
the duration of the bus turnaround.
|
||||||
|
This parameter can be a value between 0 and 0xF.
|
||||||
|
@note: It is only used for multiplexed NOR Flash memories. */
|
||||||
|
|
||||||
|
uint32_t FSMC_CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of HCLK cycles.
|
||||||
|
This parameter can be a value between 1 and 0xF.
|
||||||
|
@note: This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses. */
|
||||||
|
|
||||||
|
uint32_t FSMC_DataLatency; /*!< Defines the number of memory clock cycles to issue
|
||||||
|
to the memory before getting the first data.
|
||||||
|
The value of this parameter depends on the memory type as shown below:
|
||||||
|
- It must be set to 0 in case of a CRAM
|
||||||
|
- It is don't care in asynchronous NOR, SRAM or ROM accesses
|
||||||
|
- It may assume a value between 0 and 0xF in NOR Flash memories
|
||||||
|
with synchronous burst mode enable */
|
||||||
|
|
||||||
|
uint32_t FSMC_AccessMode; /*!< Specifies the asynchronous access mode.
|
||||||
|
This parameter can be a value of @ref FSMC_Access_Mode */
|
||||||
|
}FSMC_NORSRAMTimingInitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief FSMC NOR/SRAM Init structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t FSMC_Bank; /*!< Specifies the NOR/SRAM memory bank that will be used.
|
||||||
|
This parameter can be a value of @ref FSMC_NORSRAM_Bank */
|
||||||
|
|
||||||
|
uint32_t FSMC_DataAddressMux; /*!< Specifies whether the address and data values are
|
||||||
|
multiplexed on the databus or not.
|
||||||
|
This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing */
|
||||||
|
|
||||||
|
uint32_t FSMC_MemoryType; /*!< Specifies the type of external memory attached to
|
||||||
|
the corresponding memory bank.
|
||||||
|
This parameter can be a value of @ref FSMC_Memory_Type */
|
||||||
|
|
||||||
|
uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width.
|
||||||
|
This parameter can be a value of @ref FSMC_Data_Width */
|
||||||
|
|
||||||
|
uint32_t FSMC_BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory,
|
||||||
|
valid only with synchronous burst Flash memories.
|
||||||
|
This parameter can be a value of @ref FSMC_Burst_Access_Mode */
|
||||||
|
|
||||||
|
uint32_t FSMC_AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers,
|
||||||
|
valid only with asynchronous Flash memories.
|
||||||
|
This parameter can be a value of @ref FSMC_AsynchronousWait */
|
||||||
|
|
||||||
|
uint32_t FSMC_WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing
|
||||||
|
the Flash memory in burst mode.
|
||||||
|
This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */
|
||||||
|
|
||||||
|
uint32_t FSMC_WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash
|
||||||
|
memory, valid only when accessing Flash memories in burst mode.
|
||||||
|
This parameter can be a value of @ref FSMC_Wrap_Mode */
|
||||||
|
|
||||||
|
uint32_t FSMC_WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one
|
||||||
|
clock cycle before the wait state or during the wait state,
|
||||||
|
valid only when accessing memories in burst mode.
|
||||||
|
This parameter can be a value of @ref FSMC_Wait_Timing */
|
||||||
|
|
||||||
|
uint32_t FSMC_WriteOperation; /*!< Enables or disables the write operation in the selected bank by the FSMC.
|
||||||
|
This parameter can be a value of @ref FSMC_Write_Operation */
|
||||||
|
|
||||||
|
uint32_t FSMC_WaitSignal; /*!< Enables or disables the wait-state insertion via wait
|
||||||
|
signal, valid for Flash memory access in burst mode.
|
||||||
|
This parameter can be a value of @ref FSMC_Wait_Signal */
|
||||||
|
|
||||||
|
uint32_t FSMC_ExtendedMode; /*!< Enables or disables the extended mode.
|
||||||
|
This parameter can be a value of @ref FSMC_Extended_Mode */
|
||||||
|
|
||||||
|
uint32_t FSMC_WriteBurst; /*!< Enables or disables the write burst operation.
|
||||||
|
This parameter can be a value of @ref FSMC_Write_Burst */
|
||||||
|
|
||||||
|
FSMC_NORSRAMTimingInitTypeDef* FSMC_ReadWriteTimingStruct; /*!< Timing Parameters for write and read access if the ExtendedMode is not used*/
|
||||||
|
|
||||||
|
FSMC_NORSRAMTimingInitTypeDef* FSMC_WriteTimingStruct; /*!< Timing Parameters for write access if the ExtendedMode is used*/
|
||||||
|
}FSMC_NORSRAMInitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Timing parameters For FSMC NAND and PCCARD Banks
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t FSMC_SetupTime; /*!< Defines the number of HCLK cycles to setup address before
|
||||||
|
the command assertion for NAND-Flash read or write access
|
||||||
|
to common/Attribute or I/O memory space (depending on
|
||||||
|
the memory space timing to be configured).
|
||||||
|
This parameter can be a value between 0 and 0xFF.*/
|
||||||
|
|
||||||
|
uint32_t FSMC_WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the
|
||||||
|
command for NAND-Flash read or write access to
|
||||||
|
common/Attribute or I/O memory space (depending on the
|
||||||
|
memory space timing to be configured).
|
||||||
|
This parameter can be a number between 0x00 and 0xFF */
|
||||||
|
|
||||||
|
uint32_t FSMC_HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address
|
||||||
|
(and data for write access) after the command deassertion
|
||||||
|
for NAND-Flash read or write access to common/Attribute
|
||||||
|
or I/O memory space (depending on the memory space timing
|
||||||
|
to be configured).
|
||||||
|
This parameter can be a number between 0x00 and 0xFF */
|
||||||
|
|
||||||
|
uint32_t FSMC_HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the
|
||||||
|
databus is kept in HiZ after the start of a NAND-Flash
|
||||||
|
write access to common/Attribute or I/O memory space (depending
|
||||||
|
on the memory space timing to be configured).
|
||||||
|
This parameter can be a number between 0x00 and 0xFF */
|
||||||
|
}FSMC_NAND_PCCARDTimingInitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief FSMC NAND Init structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t FSMC_Bank; /*!< Specifies the NAND memory bank that will be used.
|
||||||
|
This parameter can be a value of @ref FSMC_NAND_Bank */
|
||||||
|
|
||||||
|
uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory Bank.
|
||||||
|
This parameter can be any value of @ref FSMC_Wait_feature */
|
||||||
|
|
||||||
|
uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width.
|
||||||
|
This parameter can be any value of @ref FSMC_Data_Width */
|
||||||
|
|
||||||
|
uint32_t FSMC_ECC; /*!< Enables or disables the ECC computation.
|
||||||
|
This parameter can be any value of @ref FSMC_ECC */
|
||||||
|
|
||||||
|
uint32_t FSMC_ECCPageSize; /*!< Defines the page size for the extended ECC.
|
||||||
|
This parameter can be any value of @ref FSMC_ECC_Page_Size */
|
||||||
|
|
||||||
|
uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
|
||||||
|
delay between CLE low and RE low.
|
||||||
|
This parameter can be a value between 0 and 0xFF. */
|
||||||
|
|
||||||
|
uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
|
||||||
|
delay between ALE low and RE low.
|
||||||
|
This parameter can be a number between 0x0 and 0xFF */
|
||||||
|
|
||||||
|
FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */
|
||||||
|
|
||||||
|
FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */
|
||||||
|
}FSMC_NANDInitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief FSMC PCCARD Init structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the Memory Bank.
|
||||||
|
This parameter can be any value of @ref FSMC_Wait_feature */
|
||||||
|
|
||||||
|
uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the
|
||||||
|
delay between CLE low and RE low.
|
||||||
|
This parameter can be a value between 0 and 0xFF. */
|
||||||
|
|
||||||
|
uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the
|
||||||
|
delay between ALE low and RE low.
|
||||||
|
This parameter can be a number between 0x0 and 0xFF */
|
||||||
|
|
||||||
|
|
||||||
|
FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */
|
||||||
|
|
||||||
|
FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */
|
||||||
|
|
||||||
|
FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_IOSpaceTimingStruct; /*!< FSMC IO Space Timing */
|
||||||
|
}FSMC_PCCARDInitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_NORSRAM_Bank
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define FSMC_Bank1_NORSRAM1 ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_Bank1_NORSRAM2 ((uint32_t)0x00000002)
|
||||||
|
#define FSMC_Bank1_NORSRAM3 ((uint32_t)0x00000004)
|
||||||
|
#define FSMC_Bank1_NORSRAM4 ((uint32_t)0x00000006)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_NAND_Bank
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define FSMC_Bank2_NAND ((uint32_t)0x00000010)
|
||||||
|
#define FSMC_Bank3_NAND ((uint32_t)0x00000100)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_PCCARD_Bank
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define FSMC_Bank4_PCCARD ((uint32_t)0x00001000)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_FSMC_NORSRAM_BANK(BANK) (((BANK) == FSMC_Bank1_NORSRAM1) || \
|
||||||
|
((BANK) == FSMC_Bank1_NORSRAM2) || \
|
||||||
|
((BANK) == FSMC_Bank1_NORSRAM3) || \
|
||||||
|
((BANK) == FSMC_Bank1_NORSRAM4))
|
||||||
|
|
||||||
|
#define IS_FSMC_NAND_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
|
||||||
|
((BANK) == FSMC_Bank3_NAND))
|
||||||
|
|
||||||
|
#define IS_FSMC_GETFLAG_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
|
||||||
|
((BANK) == FSMC_Bank3_NAND) || \
|
||||||
|
((BANK) == FSMC_Bank4_PCCARD))
|
||||||
|
|
||||||
|
#define IS_FSMC_IT_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \
|
||||||
|
((BANK) == FSMC_Bank3_NAND) || \
|
||||||
|
((BANK) == FSMC_Bank4_PCCARD))
|
||||||
|
|
||||||
|
/** @defgroup NOR_SRAM_Controller
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Data_Address_Bus_Multiplexing
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_DataAddressMux_Disable ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_DataAddressMux_Enable ((uint32_t)0x00000002)
|
||||||
|
#define IS_FSMC_MUX(MUX) (((MUX) == FSMC_DataAddressMux_Disable) || \
|
||||||
|
((MUX) == FSMC_DataAddressMux_Enable))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Memory_Type
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_MemoryType_SRAM ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_MemoryType_PSRAM ((uint32_t)0x00000004)
|
||||||
|
#define FSMC_MemoryType_NOR ((uint32_t)0x00000008)
|
||||||
|
#define IS_FSMC_MEMORY(MEMORY) (((MEMORY) == FSMC_MemoryType_SRAM) || \
|
||||||
|
((MEMORY) == FSMC_MemoryType_PSRAM)|| \
|
||||||
|
((MEMORY) == FSMC_MemoryType_NOR))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Data_Width
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_MemoryDataWidth_8b ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_MemoryDataWidth_16b ((uint32_t)0x00000010)
|
||||||
|
#define IS_FSMC_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || \
|
||||||
|
((WIDTH) == FSMC_MemoryDataWidth_16b))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Burst_Access_Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_BurstAccessMode_Disable ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_BurstAccessMode_Enable ((uint32_t)0x00000100)
|
||||||
|
#define IS_FSMC_BURSTMODE(STATE) (((STATE) == FSMC_BurstAccessMode_Disable) || \
|
||||||
|
((STATE) == FSMC_BurstAccessMode_Enable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_AsynchronousWait
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define FSMC_AsynchronousWait_Disable ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_AsynchronousWait_Enable ((uint32_t)0x00008000)
|
||||||
|
#define IS_FSMC_ASYNWAIT(STATE) (((STATE) == FSMC_AsynchronousWait_Disable) || \
|
||||||
|
((STATE) == FSMC_AsynchronousWait_Enable))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Wait_Signal_Polarity
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_WaitSignalPolarity_Low ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_WaitSignalPolarity_High ((uint32_t)0x00000200)
|
||||||
|
#define IS_FSMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FSMC_WaitSignalPolarity_Low) || \
|
||||||
|
((POLARITY) == FSMC_WaitSignalPolarity_High))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Wrap_Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_WrapMode_Disable ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_WrapMode_Enable ((uint32_t)0x00000400)
|
||||||
|
#define IS_FSMC_WRAP_MODE(MODE) (((MODE) == FSMC_WrapMode_Disable) || \
|
||||||
|
((MODE) == FSMC_WrapMode_Enable))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Wait_Timing
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_WaitSignalActive_BeforeWaitState ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_WaitSignalActive_DuringWaitState ((uint32_t)0x00000800)
|
||||||
|
#define IS_FSMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FSMC_WaitSignalActive_BeforeWaitState) || \
|
||||||
|
((ACTIVE) == FSMC_WaitSignalActive_DuringWaitState))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Write_Operation
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_WriteOperation_Disable ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_WriteOperation_Enable ((uint32_t)0x00001000)
|
||||||
|
#define IS_FSMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FSMC_WriteOperation_Disable) || \
|
||||||
|
((OPERATION) == FSMC_WriteOperation_Enable))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Wait_Signal
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_WaitSignal_Disable ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_WaitSignal_Enable ((uint32_t)0x00002000)
|
||||||
|
#define IS_FSMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FSMC_WaitSignal_Disable) || \
|
||||||
|
((SIGNAL) == FSMC_WaitSignal_Enable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Extended_Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_ExtendedMode_Disable ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_ExtendedMode_Enable ((uint32_t)0x00004000)
|
||||||
|
|
||||||
|
#define IS_FSMC_EXTENDED_MODE(MODE) (((MODE) == FSMC_ExtendedMode_Disable) || \
|
||||||
|
((MODE) == FSMC_ExtendedMode_Enable))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Write_Burst
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_WriteBurst_Disable ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_WriteBurst_Enable ((uint32_t)0x00080000)
|
||||||
|
#define IS_FSMC_WRITE_BURST(BURST) (((BURST) == FSMC_WriteBurst_Disable) || \
|
||||||
|
((BURST) == FSMC_WriteBurst_Enable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Address_Setup_Time
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_FSMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 0xF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Address_Hold_Time
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_FSMC_ADDRESS_HOLD_TIME(TIME) ((TIME) <= 0xF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Data_Setup_Time
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_FSMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 0xFF))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Bus_Turn_around_Duration
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_FSMC_TURNAROUND_TIME(TIME) ((TIME) <= 0xF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_CLK_Division
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_FSMC_CLK_DIV(DIV) ((DIV) <= 0xF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Data_Latency
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_FSMC_DATA_LATENCY(LATENCY) ((LATENCY) <= 0xF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Access_Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_AccessMode_A ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_AccessMode_B ((uint32_t)0x10000000)
|
||||||
|
#define FSMC_AccessMode_C ((uint32_t)0x20000000)
|
||||||
|
#define FSMC_AccessMode_D ((uint32_t)0x30000000)
|
||||||
|
#define IS_FSMC_ACCESS_MODE(MODE) (((MODE) == FSMC_AccessMode_A) || \
|
||||||
|
((MODE) == FSMC_AccessMode_B) || \
|
||||||
|
((MODE) == FSMC_AccessMode_C) || \
|
||||||
|
((MODE) == FSMC_AccessMode_D))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup NAND_PCCARD_Controller
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Wait_feature
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_Waitfeature_Disable ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_Waitfeature_Enable ((uint32_t)0x00000002)
|
||||||
|
#define IS_FSMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FSMC_Waitfeature_Disable) || \
|
||||||
|
((FEATURE) == FSMC_Waitfeature_Enable))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup FSMC_ECC
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_ECC_Disable ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_ECC_Enable ((uint32_t)0x00000040)
|
||||||
|
#define IS_FSMC_ECC_STATE(STATE) (((STATE) == FSMC_ECC_Disable) || \
|
||||||
|
((STATE) == FSMC_ECC_Enable))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_ECC_Page_Size
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_ECCPageSize_256Bytes ((uint32_t)0x00000000)
|
||||||
|
#define FSMC_ECCPageSize_512Bytes ((uint32_t)0x00020000)
|
||||||
|
#define FSMC_ECCPageSize_1024Bytes ((uint32_t)0x00040000)
|
||||||
|
#define FSMC_ECCPageSize_2048Bytes ((uint32_t)0x00060000)
|
||||||
|
#define FSMC_ECCPageSize_4096Bytes ((uint32_t)0x00080000)
|
||||||
|
#define FSMC_ECCPageSize_8192Bytes ((uint32_t)0x000A0000)
|
||||||
|
#define IS_FSMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FSMC_ECCPageSize_256Bytes) || \
|
||||||
|
((SIZE) == FSMC_ECCPageSize_512Bytes) || \
|
||||||
|
((SIZE) == FSMC_ECCPageSize_1024Bytes) || \
|
||||||
|
((SIZE) == FSMC_ECCPageSize_2048Bytes) || \
|
||||||
|
((SIZE) == FSMC_ECCPageSize_4096Bytes) || \
|
||||||
|
((SIZE) == FSMC_ECCPageSize_8192Bytes))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_TCLR_Setup_Time
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_FSMC_TCLR_TIME(TIME) ((TIME) <= 0xFF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_TAR_Setup_Time
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_FSMC_TAR_TIME(TIME) ((TIME) <= 0xFF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Setup_Time
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_FSMC_SETUP_TIME(TIME) ((TIME) <= 0xFF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Wait_Setup_Time
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_FSMC_WAIT_TIME(TIME) ((TIME) <= 0xFF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Hold_Setup_Time
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_FSMC_HOLD_TIME(TIME) ((TIME) <= 0xFF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_HiZ_Setup_Time
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_FSMC_HIZ_TIME(TIME) ((TIME) <= 0xFF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Interrupt_sources
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_IT_RisingEdge ((uint32_t)0x00000008)
|
||||||
|
#define FSMC_IT_Level ((uint32_t)0x00000010)
|
||||||
|
#define FSMC_IT_FallingEdge ((uint32_t)0x00000020)
|
||||||
|
#define IS_FSMC_IT(IT) ((((IT) & (uint32_t)0xFFFFFFC7) == 0x00000000) && ((IT) != 0x00000000))
|
||||||
|
#define IS_FSMC_GET_IT(IT) (((IT) == FSMC_IT_RisingEdge) || \
|
||||||
|
((IT) == FSMC_IT_Level) || \
|
||||||
|
((IT) == FSMC_IT_FallingEdge))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Flags
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define FSMC_FLAG_RisingEdge ((uint32_t)0x00000001)
|
||||||
|
#define FSMC_FLAG_Level ((uint32_t)0x00000002)
|
||||||
|
#define FSMC_FLAG_FallingEdge ((uint32_t)0x00000004)
|
||||||
|
#define FSMC_FLAG_FEMPT ((uint32_t)0x00000040)
|
||||||
|
#define IS_FSMC_GET_FLAG(FLAG) (((FLAG) == FSMC_FLAG_RisingEdge) || \
|
||||||
|
((FLAG) == FSMC_FLAG_Level) || \
|
||||||
|
((FLAG) == FSMC_FLAG_FallingEdge) || \
|
||||||
|
((FLAG) == FSMC_FLAG_FEMPT))
|
||||||
|
|
||||||
|
#define IS_FSMC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF8) == 0x00000000) && ((FLAG) != 0x00000000))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup FSMC_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank);
|
||||||
|
void FSMC_NANDDeInit(uint32_t FSMC_Bank);
|
||||||
|
void FSMC_PCCARDDeInit(void);
|
||||||
|
void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
|
||||||
|
void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct);
|
||||||
|
void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct);
|
||||||
|
void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct);
|
||||||
|
void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct);
|
||||||
|
void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct);
|
||||||
|
void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState);
|
||||||
|
void FSMC_NANDCmd(uint32_t FSMC_Bank, FunctionalState NewState);
|
||||||
|
void FSMC_PCCARDCmd(FunctionalState NewState);
|
||||||
|
void FSMC_NANDECCCmd(uint32_t FSMC_Bank, FunctionalState NewState);
|
||||||
|
uint32_t FSMC_GetECC(uint32_t FSMC_Bank);
|
||||||
|
void FSMC_ITConfig(uint32_t FSMC_Bank, uint32_t FSMC_IT, FunctionalState NewState);
|
||||||
|
FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG);
|
||||||
|
void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG);
|
||||||
|
ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT);
|
||||||
|
void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__STM32F10x_FSMC_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,385 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_gpio.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the GPIO
|
||||||
|
* firmware library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_GPIO_H
|
||||||
|
#define __STM32F10x_GPIO_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup GPIO
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup GPIO_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \
|
||||||
|
((PERIPH) == GPIOB) || \
|
||||||
|
((PERIPH) == GPIOC) || \
|
||||||
|
((PERIPH) == GPIOD) || \
|
||||||
|
((PERIPH) == GPIOE) || \
|
||||||
|
((PERIPH) == GPIOF) || \
|
||||||
|
((PERIPH) == GPIOG))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Output Maximum frequency selection
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
GPIO_Speed_10MHz = 1,
|
||||||
|
GPIO_Speed_2MHz,
|
||||||
|
GPIO_Speed_50MHz
|
||||||
|
}GPIOSpeed_TypeDef;
|
||||||
|
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \
|
||||||
|
((SPEED) == GPIO_Speed_50MHz))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configuration Mode enumeration
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{ GPIO_Mode_AIN = 0x0,
|
||||||
|
GPIO_Mode_IN_FLOATING = 0x04,
|
||||||
|
GPIO_Mode_IPD = 0x28,
|
||||||
|
GPIO_Mode_IPU = 0x48,
|
||||||
|
GPIO_Mode_Out_OD = 0x14,
|
||||||
|
GPIO_Mode_Out_PP = 0x10,
|
||||||
|
GPIO_Mode_AF_OD = 0x1C,
|
||||||
|
GPIO_Mode_AF_PP = 0x18
|
||||||
|
}GPIOMode_TypeDef;
|
||||||
|
|
||||||
|
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \
|
||||||
|
((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \
|
||||||
|
((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \
|
||||||
|
((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief GPIO Init structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
|
||||||
|
This parameter can be any value of @ref GPIO_pins_define */
|
||||||
|
|
||||||
|
GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins.
|
||||||
|
This parameter can be a value of @ref GPIOSpeed_TypeDef */
|
||||||
|
|
||||||
|
GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins.
|
||||||
|
This parameter can be a value of @ref GPIOMode_TypeDef */
|
||||||
|
}GPIO_InitTypeDef;
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Bit_SET and Bit_RESET enumeration
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{ Bit_RESET = 0,
|
||||||
|
Bit_SET
|
||||||
|
}BitAction;
|
||||||
|
|
||||||
|
#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup GPIO_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup GPIO_pins_define
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
|
||||||
|
#define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
|
||||||
|
#define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
|
||||||
|
#define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
|
||||||
|
#define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
|
||||||
|
#define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
|
||||||
|
#define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
|
||||||
|
#define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
|
||||||
|
#define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
|
||||||
|
#define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
|
||||||
|
#define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
|
||||||
|
#define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
|
||||||
|
#define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
|
||||||
|
#define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
|
||||||
|
#define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
|
||||||
|
#define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
|
||||||
|
#define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
|
||||||
|
|
||||||
|
#define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00))
|
||||||
|
|
||||||
|
#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
|
||||||
|
((PIN) == GPIO_Pin_1) || \
|
||||||
|
((PIN) == GPIO_Pin_2) || \
|
||||||
|
((PIN) == GPIO_Pin_3) || \
|
||||||
|
((PIN) == GPIO_Pin_4) || \
|
||||||
|
((PIN) == GPIO_Pin_5) || \
|
||||||
|
((PIN) == GPIO_Pin_6) || \
|
||||||
|
((PIN) == GPIO_Pin_7) || \
|
||||||
|
((PIN) == GPIO_Pin_8) || \
|
||||||
|
((PIN) == GPIO_Pin_9) || \
|
||||||
|
((PIN) == GPIO_Pin_10) || \
|
||||||
|
((PIN) == GPIO_Pin_11) || \
|
||||||
|
((PIN) == GPIO_Pin_12) || \
|
||||||
|
((PIN) == GPIO_Pin_13) || \
|
||||||
|
((PIN) == GPIO_Pin_14) || \
|
||||||
|
((PIN) == GPIO_Pin_15))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup GPIO_Remap_define
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /*!< SPI1 Alternate Function mapping */
|
||||||
|
#define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /*!< I2C1 Alternate Function mapping */
|
||||||
|
#define GPIO_Remap_USART1 ((uint32_t)0x00000004) /*!< USART1 Alternate Function mapping */
|
||||||
|
#define GPIO_Remap_USART2 ((uint32_t)0x00000008) /*!< USART2 Alternate Function mapping */
|
||||||
|
#define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /*!< USART3 Partial Alternate Function mapping */
|
||||||
|
#define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /*!< USART3 Full Alternate Function mapping */
|
||||||
|
#define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /*!< TIM1 Partial Alternate Function mapping */
|
||||||
|
#define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /*!< TIM1 Full Alternate Function mapping */
|
||||||
|
#define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /*!< TIM2 Partial1 Alternate Function mapping */
|
||||||
|
#define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /*!< TIM2 Partial2 Alternate Function mapping */
|
||||||
|
#define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /*!< TIM2 Full Alternate Function mapping */
|
||||||
|
#define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /*!< TIM3 Partial Alternate Function mapping */
|
||||||
|
#define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /*!< TIM3 Full Alternate Function mapping */
|
||||||
|
#define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /*!< TIM4 Alternate Function mapping */
|
||||||
|
#define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /*!< CAN1 Alternate Function mapping */
|
||||||
|
#define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /*!< CAN1 Alternate Function mapping */
|
||||||
|
#define GPIO_Remap_PD01 ((uint32_t)0x00008000) /*!< PD01 Alternate Function mapping */
|
||||||
|
#define GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001) /*!< LSI connected to TIM5 Channel4 input capture for calibration */
|
||||||
|
#define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /*!< ADC1 External Trigger Injected Conversion remapping */
|
||||||
|
#define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /*!< ADC1 External Trigger Regular Conversion remapping */
|
||||||
|
#define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /*!< ADC2 External Trigger Injected Conversion remapping */
|
||||||
|
#define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /*!< ADC2 External Trigger Regular Conversion remapping */
|
||||||
|
#define GPIO_Remap_ETH ((uint32_t)0x00200020) /*!< Ethernet remapping (only for Connectivity line devices) */
|
||||||
|
#define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /*!< CAN2 remapping (only for Connectivity line devices) */
|
||||||
|
#define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /*!< Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */
|
||||||
|
#define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */
|
||||||
|
#define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /*!< Full SWJ Disabled (JTAG-DP + SW-DP) */
|
||||||
|
#define GPIO_Remap_SPI3 ((uint32_t)0x00201100) /*!< SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */
|
||||||
|
#define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /*!< Ethernet PTP output or USB OTG SOF (Start of Frame) connected
|
||||||
|
to TIM2 Internal Trigger 1 for calibration
|
||||||
|
(only for Connectivity line devices) */
|
||||||
|
#define GPIO_Remap_PTP_PPS ((uint32_t)0x00204000) /*!< Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */
|
||||||
|
|
||||||
|
#define GPIO_Remap_TIM15 ((uint32_t)0x80000001) /*!< TIM15 Alternate Function mapping (only for Value line devices) */
|
||||||
|
#define GPIO_Remap_TIM16 ((uint32_t)0x80000002) /*!< TIM16 Alternate Function mapping (only for Value line devices) */
|
||||||
|
#define GPIO_Remap_TIM17 ((uint32_t)0x80000004) /*!< TIM17 Alternate Function mapping (only for Value line devices) */
|
||||||
|
#define GPIO_Remap_CEC ((uint32_t)0x80000008) /*!< CEC Alternate Function mapping (only for Value line devices) */
|
||||||
|
#define GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010) /*!< TIM1 DMA requests mapping (only for Value line devices) */
|
||||||
|
|
||||||
|
#define GPIO_Remap_TIM9 ((uint32_t)0x80000020) /*!< TIM9 Alternate Function mapping (only for XL-density devices) */
|
||||||
|
#define GPIO_Remap_TIM10 ((uint32_t)0x80000040) /*!< TIM10 Alternate Function mapping (only for XL-density devices) */
|
||||||
|
#define GPIO_Remap_TIM11 ((uint32_t)0x80000080) /*!< TIM11 Alternate Function mapping (only for XL-density devices) */
|
||||||
|
#define GPIO_Remap_TIM13 ((uint32_t)0x80000100) /*!< TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) */
|
||||||
|
#define GPIO_Remap_TIM14 ((uint32_t)0x80000200) /*!< TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) */
|
||||||
|
#define GPIO_Remap_FSMC_NADV ((uint32_t)0x80000400) /*!< FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) */
|
||||||
|
|
||||||
|
#define GPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800) /*!< TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) */
|
||||||
|
#define GPIO_Remap_TIM12 ((uint32_t)0x80001000) /*!< TIM12 Alternate Function mapping (only for High density Value line devices) */
|
||||||
|
#define GPIO_Remap_MISC ((uint32_t)0x80002000) /*!< Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping,
|
||||||
|
only for High density Value line devices) */
|
||||||
|
|
||||||
|
#define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \
|
||||||
|
((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \
|
||||||
|
((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \
|
||||||
|
((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \
|
||||||
|
((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \
|
||||||
|
((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \
|
||||||
|
((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \
|
||||||
|
((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) || \
|
||||||
|
((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \
|
||||||
|
((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \
|
||||||
|
((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \
|
||||||
|
((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) || \
|
||||||
|
((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) || \
|
||||||
|
((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) || \
|
||||||
|
((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS) || \
|
||||||
|
((REMAP) == GPIO_Remap_TIM15) || ((REMAP) == GPIO_Remap_TIM16) || \
|
||||||
|
((REMAP) == GPIO_Remap_TIM17) || ((REMAP) == GPIO_Remap_CEC) || \
|
||||||
|
((REMAP) == GPIO_Remap_TIM1_DMA) || ((REMAP) == GPIO_Remap_TIM9) || \
|
||||||
|
((REMAP) == GPIO_Remap_TIM10) || ((REMAP) == GPIO_Remap_TIM11) || \
|
||||||
|
((REMAP) == GPIO_Remap_TIM13) || ((REMAP) == GPIO_Remap_TIM14) || \
|
||||||
|
((REMAP) == GPIO_Remap_FSMC_NADV) || ((REMAP) == GPIO_Remap_TIM67_DAC_DMA) || \
|
||||||
|
((REMAP) == GPIO_Remap_TIM12) || ((REMAP) == GPIO_Remap_MISC))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup GPIO_Port_Sources
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define GPIO_PortSourceGPIOA ((uint8_t)0x00)
|
||||||
|
#define GPIO_PortSourceGPIOB ((uint8_t)0x01)
|
||||||
|
#define GPIO_PortSourceGPIOC ((uint8_t)0x02)
|
||||||
|
#define GPIO_PortSourceGPIOD ((uint8_t)0x03)
|
||||||
|
#define GPIO_PortSourceGPIOE ((uint8_t)0x04)
|
||||||
|
#define GPIO_PortSourceGPIOF ((uint8_t)0x05)
|
||||||
|
#define GPIO_PortSourceGPIOG ((uint8_t)0x06)
|
||||||
|
#define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
|
||||||
|
((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
|
||||||
|
((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
|
||||||
|
((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
|
||||||
|
((PORTSOURCE) == GPIO_PortSourceGPIOE))
|
||||||
|
|
||||||
|
#define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
|
||||||
|
((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
|
||||||
|
((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
|
||||||
|
((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
|
||||||
|
((PORTSOURCE) == GPIO_PortSourceGPIOE) || \
|
||||||
|
((PORTSOURCE) == GPIO_PortSourceGPIOF) || \
|
||||||
|
((PORTSOURCE) == GPIO_PortSourceGPIOG))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup GPIO_Pin_sources
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define GPIO_PinSource0 ((uint8_t)0x00)
|
||||||
|
#define GPIO_PinSource1 ((uint8_t)0x01)
|
||||||
|
#define GPIO_PinSource2 ((uint8_t)0x02)
|
||||||
|
#define GPIO_PinSource3 ((uint8_t)0x03)
|
||||||
|
#define GPIO_PinSource4 ((uint8_t)0x04)
|
||||||
|
#define GPIO_PinSource5 ((uint8_t)0x05)
|
||||||
|
#define GPIO_PinSource6 ((uint8_t)0x06)
|
||||||
|
#define GPIO_PinSource7 ((uint8_t)0x07)
|
||||||
|
#define GPIO_PinSource8 ((uint8_t)0x08)
|
||||||
|
#define GPIO_PinSource9 ((uint8_t)0x09)
|
||||||
|
#define GPIO_PinSource10 ((uint8_t)0x0A)
|
||||||
|
#define GPIO_PinSource11 ((uint8_t)0x0B)
|
||||||
|
#define GPIO_PinSource12 ((uint8_t)0x0C)
|
||||||
|
#define GPIO_PinSource13 ((uint8_t)0x0D)
|
||||||
|
#define GPIO_PinSource14 ((uint8_t)0x0E)
|
||||||
|
#define GPIO_PinSource15 ((uint8_t)0x0F)
|
||||||
|
|
||||||
|
#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource1) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource2) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource3) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource4) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource5) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource6) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource7) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource8) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource9) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource10) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource11) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource12) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource13) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource14) || \
|
||||||
|
((PINSOURCE) == GPIO_PinSource15))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Ethernet_Media_Interface
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define GPIO_ETH_MediaInterface_MII ((u32)0x00000000)
|
||||||
|
#define GPIO_ETH_MediaInterface_RMII ((u32)0x00000001)
|
||||||
|
|
||||||
|
#define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || \
|
||||||
|
((INTERFACE) == GPIO_ETH_MediaInterface_RMII))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup GPIO_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup GPIO_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void GPIO_DeInit(GPIO_TypeDef* GPIOx);
|
||||||
|
void GPIO_AFIODeInit(void);
|
||||||
|
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
|
||||||
|
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
|
||||||
|
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||||
|
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
|
||||||
|
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||||
|
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
|
||||||
|
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||||
|
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||||
|
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
|
||||||
|
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
|
||||||
|
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||||
|
void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
|
||||||
|
void GPIO_EventOutputCmd(FunctionalState NewState);
|
||||||
|
void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState);
|
||||||
|
void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
|
||||||
|
void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_GPIO_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,684 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_i2c.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the I2C firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_I2C_H
|
||||||
|
#define __STM32F10x_I2C_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup I2C
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief I2C Init structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency.
|
||||||
|
This parameter must be set to a value lower than 400kHz */
|
||||||
|
|
||||||
|
uint16_t I2C_Mode; /*!< Specifies the I2C mode.
|
||||||
|
This parameter can be a value of @ref I2C_mode */
|
||||||
|
|
||||||
|
uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
|
||||||
|
This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
|
||||||
|
|
||||||
|
uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address.
|
||||||
|
This parameter can be a 7-bit or 10-bit address. */
|
||||||
|
|
||||||
|
uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement.
|
||||||
|
This parameter can be a value of @ref I2C_acknowledgement */
|
||||||
|
|
||||||
|
uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
|
||||||
|
This parameter can be a value of @ref I2C_acknowledged_address */
|
||||||
|
}I2C_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup I2C_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
|
||||||
|
((PERIPH) == I2C2))
|
||||||
|
/** @defgroup I2C_mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2C_Mode_I2C ((uint16_t)0x0000)
|
||||||
|
#define I2C_Mode_SMBusDevice ((uint16_t)0x0002)
|
||||||
|
#define I2C_Mode_SMBusHost ((uint16_t)0x000A)
|
||||||
|
#define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
|
||||||
|
((MODE) == I2C_Mode_SMBusDevice) || \
|
||||||
|
((MODE) == I2C_Mode_SMBusHost))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_duty_cycle_in_fast_mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */
|
||||||
|
#define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */
|
||||||
|
#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \
|
||||||
|
((CYCLE) == I2C_DutyCycle_2))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_acknowledgement
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2C_Ack_Enable ((uint16_t)0x0400)
|
||||||
|
#define I2C_Ack_Disable ((uint16_t)0x0000)
|
||||||
|
#define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \
|
||||||
|
((STATE) == I2C_Ack_Disable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_transfer_direction
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2C_Direction_Transmitter ((uint8_t)0x00)
|
||||||
|
#define I2C_Direction_Receiver ((uint8_t)0x01)
|
||||||
|
#define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
|
||||||
|
((DIRECTION) == I2C_Direction_Receiver))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_acknowledged_address
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
|
||||||
|
#define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
|
||||||
|
#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
|
||||||
|
((ADDRESS) == I2C_AcknowledgedAddress_10bit))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_registers
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2C_Register_CR1 ((uint8_t)0x00)
|
||||||
|
#define I2C_Register_CR2 ((uint8_t)0x04)
|
||||||
|
#define I2C_Register_OAR1 ((uint8_t)0x08)
|
||||||
|
#define I2C_Register_OAR2 ((uint8_t)0x0C)
|
||||||
|
#define I2C_Register_DR ((uint8_t)0x10)
|
||||||
|
#define I2C_Register_SR1 ((uint8_t)0x14)
|
||||||
|
#define I2C_Register_SR2 ((uint8_t)0x18)
|
||||||
|
#define I2C_Register_CCR ((uint8_t)0x1C)
|
||||||
|
#define I2C_Register_TRISE ((uint8_t)0x20)
|
||||||
|
#define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
|
||||||
|
((REGISTER) == I2C_Register_CR2) || \
|
||||||
|
((REGISTER) == I2C_Register_OAR1) || \
|
||||||
|
((REGISTER) == I2C_Register_OAR2) || \
|
||||||
|
((REGISTER) == I2C_Register_DR) || \
|
||||||
|
((REGISTER) == I2C_Register_SR1) || \
|
||||||
|
((REGISTER) == I2C_Register_SR2) || \
|
||||||
|
((REGISTER) == I2C_Register_CCR) || \
|
||||||
|
((REGISTER) == I2C_Register_TRISE))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_SMBus_alert_pin_level
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2C_SMBusAlert_Low ((uint16_t)0x2000)
|
||||||
|
#define I2C_SMBusAlert_High ((uint16_t)0xDFFF)
|
||||||
|
#define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \
|
||||||
|
((ALERT) == I2C_SMBusAlert_High))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_PEC_position
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2C_PECPosition_Next ((uint16_t)0x0800)
|
||||||
|
#define I2C_PECPosition_Current ((uint16_t)0xF7FF)
|
||||||
|
#define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \
|
||||||
|
((POSITION) == I2C_PECPosition_Current))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_NCAK_position
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2C_NACKPosition_Next ((uint16_t)0x0800)
|
||||||
|
#define I2C_NACKPosition_Current ((uint16_t)0xF7FF)
|
||||||
|
#define IS_I2C_NACK_POSITION(POSITION) (((POSITION) == I2C_NACKPosition_Next) || \
|
||||||
|
((POSITION) == I2C_NACKPosition_Current))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_interrupts_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2C_IT_BUF ((uint16_t)0x0400)
|
||||||
|
#define I2C_IT_EVT ((uint16_t)0x0200)
|
||||||
|
#define I2C_IT_ERR ((uint16_t)0x0100)
|
||||||
|
#define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_interrupts_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2C_IT_SMBALERT ((uint32_t)0x01008000)
|
||||||
|
#define I2C_IT_TIMEOUT ((uint32_t)0x01004000)
|
||||||
|
#define I2C_IT_PECERR ((uint32_t)0x01001000)
|
||||||
|
#define I2C_IT_OVR ((uint32_t)0x01000800)
|
||||||
|
#define I2C_IT_AF ((uint32_t)0x01000400)
|
||||||
|
#define I2C_IT_ARLO ((uint32_t)0x01000200)
|
||||||
|
#define I2C_IT_BERR ((uint32_t)0x01000100)
|
||||||
|
#define I2C_IT_TXE ((uint32_t)0x06000080)
|
||||||
|
#define I2C_IT_RXNE ((uint32_t)0x06000040)
|
||||||
|
#define I2C_IT_STOPF ((uint32_t)0x02000010)
|
||||||
|
#define I2C_IT_ADD10 ((uint32_t)0x02000008)
|
||||||
|
#define I2C_IT_BTF ((uint32_t)0x02000004)
|
||||||
|
#define I2C_IT_ADDR ((uint32_t)0x02000002)
|
||||||
|
#define I2C_IT_SB ((uint32_t)0x02000001)
|
||||||
|
|
||||||
|
#define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00))
|
||||||
|
|
||||||
|
#define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \
|
||||||
|
((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \
|
||||||
|
((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \
|
||||||
|
((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \
|
||||||
|
((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \
|
||||||
|
((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \
|
||||||
|
((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_flags_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief SR2 register flags
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2C_FLAG_DUALF ((uint32_t)0x00800000)
|
||||||
|
#define I2C_FLAG_SMBHOST ((uint32_t)0x00400000)
|
||||||
|
#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)
|
||||||
|
#define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
|
||||||
|
#define I2C_FLAG_TRA ((uint32_t)0x00040000)
|
||||||
|
#define I2C_FLAG_BUSY ((uint32_t)0x00020000)
|
||||||
|
#define I2C_FLAG_MSL ((uint32_t)0x00010000)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief SR1 register flags
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2C_FLAG_SMBALERT ((uint32_t)0x10008000)
|
||||||
|
#define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)
|
||||||
|
#define I2C_FLAG_PECERR ((uint32_t)0x10001000)
|
||||||
|
#define I2C_FLAG_OVR ((uint32_t)0x10000800)
|
||||||
|
#define I2C_FLAG_AF ((uint32_t)0x10000400)
|
||||||
|
#define I2C_FLAG_ARLO ((uint32_t)0x10000200)
|
||||||
|
#define I2C_FLAG_BERR ((uint32_t)0x10000100)
|
||||||
|
#define I2C_FLAG_TXE ((uint32_t)0x10000080)
|
||||||
|
#define I2C_FLAG_RXNE ((uint32_t)0x10000040)
|
||||||
|
#define I2C_FLAG_STOPF ((uint32_t)0x10000010)
|
||||||
|
#define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
|
||||||
|
#define I2C_FLAG_BTF ((uint32_t)0x10000004)
|
||||||
|
#define I2C_FLAG_ADDR ((uint32_t)0x10000002)
|
||||||
|
#define I2C_FLAG_SB ((uint32_t)0x10000001)
|
||||||
|
|
||||||
|
#define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00))
|
||||||
|
|
||||||
|
#define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \
|
||||||
|
((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \
|
||||||
|
((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \
|
||||||
|
((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \
|
||||||
|
((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \
|
||||||
|
((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \
|
||||||
|
((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \
|
||||||
|
((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \
|
||||||
|
((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \
|
||||||
|
((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \
|
||||||
|
((FLAG) == I2C_FLAG_SB))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_Events
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*========================================
|
||||||
|
|
||||||
|
I2C Master Events (Events grouped in order of communication)
|
||||||
|
==========================================*/
|
||||||
|
/**
|
||||||
|
* @brief Communication start
|
||||||
|
*
|
||||||
|
* After sending the START condition (I2C_GenerateSTART() function) the master
|
||||||
|
* has to wait for this event. It means that the Start condition has been correctly
|
||||||
|
* released on the I2C bus (the bus is free, no other devices is communicating).
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
/* --EV5 */
|
||||||
|
#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Address Acknowledge
|
||||||
|
*
|
||||||
|
* After checking on EV5 (start condition correctly released on the bus), the
|
||||||
|
* master sends the address of the slave(s) with which it will communicate
|
||||||
|
* (I2C_Send7bitAddress() function, it also determines the direction of the communication:
|
||||||
|
* Master transmitter or Receiver). Then the master has to wait that a slave acknowledges
|
||||||
|
* his address. If an acknowledge is sent on the bus, one of the following events will
|
||||||
|
* be set:
|
||||||
|
*
|
||||||
|
* 1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED
|
||||||
|
* event is set.
|
||||||
|
*
|
||||||
|
* 2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED
|
||||||
|
* is set
|
||||||
|
*
|
||||||
|
* 3) In case of 10-Bit addressing mode, the master (just after generating the START
|
||||||
|
* and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData()
|
||||||
|
* function). Then master should wait on EV9. It means that the 10-bit addressing
|
||||||
|
* header has been correctly sent on the bus. Then master should send the second part of
|
||||||
|
* the 10-bit address (LSB) using the function I2C_Send7bitAddress(). Then master
|
||||||
|
* should wait for event EV6.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* --EV6 */
|
||||||
|
#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
|
||||||
|
#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
|
||||||
|
/* --EV9 */
|
||||||
|
#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Communication events
|
||||||
|
*
|
||||||
|
* If a communication is established (START condition generated and slave address
|
||||||
|
* acknowledged) then the master has to check on one of the following events for
|
||||||
|
* communication procedures:
|
||||||
|
*
|
||||||
|
* 1) Master Receiver mode: The master has to wait on the event EV7 then to read
|
||||||
|
* the data received from the slave (I2C_ReceiveData() function).
|
||||||
|
*
|
||||||
|
* 2) Master Transmitter mode: The master has to send data (I2C_SendData()
|
||||||
|
* function) then to wait on event EV8 or EV8_2.
|
||||||
|
* These two events are similar:
|
||||||
|
* - EV8 means that the data has been written in the data register and is
|
||||||
|
* being shifted out.
|
||||||
|
* - EV8_2 means that the data has been physically shifted out and output
|
||||||
|
* on the bus.
|
||||||
|
* In most cases, using EV8 is sufficient for the application.
|
||||||
|
* Using EV8_2 leads to a slower communication but ensure more reliable test.
|
||||||
|
* EV8_2 is also more suitable than EV8 for testing on the last data transmission
|
||||||
|
* (before Stop condition generation).
|
||||||
|
*
|
||||||
|
* @note In case the user software does not guarantee that this event EV7 is
|
||||||
|
* managed before the current byte end of transfer, then user may check on EV7
|
||||||
|
* and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)).
|
||||||
|
* In this case the communication may be slower.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Master RECEIVER mode -----------------------------*/
|
||||||
|
/* --EV7 */
|
||||||
|
#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
|
||||||
|
|
||||||
|
/* Master TRANSMITTER mode --------------------------*/
|
||||||
|
/* --EV8 */
|
||||||
|
#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
|
||||||
|
/* --EV8_2 */
|
||||||
|
#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
|
||||||
|
|
||||||
|
|
||||||
|
/*========================================
|
||||||
|
|
||||||
|
I2C Slave Events (Events grouped in order of communication)
|
||||||
|
==========================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Communication start events
|
||||||
|
*
|
||||||
|
* Wait on one of these events at the start of the communication. It means that
|
||||||
|
* the I2C peripheral detected a Start condition on the bus (generated by master
|
||||||
|
* device) followed by the peripheral address. The peripheral generates an ACK
|
||||||
|
* condition on the bus (if the acknowledge feature is enabled through function
|
||||||
|
* I2C_AcknowledgeConfig()) and the events listed above are set :
|
||||||
|
*
|
||||||
|
* 1) In normal case (only one address managed by the slave), when the address
|
||||||
|
* sent by the master matches the own address of the peripheral (configured by
|
||||||
|
* I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set
|
||||||
|
* (where XXX could be TRANSMITTER or RECEIVER).
|
||||||
|
*
|
||||||
|
* 2) In case the address sent by the master matches the second address of the
|
||||||
|
* peripheral (configured by the function I2C_OwnAddress2Config() and enabled
|
||||||
|
* by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED
|
||||||
|
* (where XXX could be TRANSMITTER or RECEIVER) are set.
|
||||||
|
*
|
||||||
|
* 3) In case the address sent by the master is General Call (address 0x00) and
|
||||||
|
* if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd())
|
||||||
|
* the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* --EV1 (all the events below are variants of EV1) */
|
||||||
|
/* 1) Case of One Single Address managed by the slave */
|
||||||
|
#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
|
||||||
|
#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
|
||||||
|
|
||||||
|
/* 2) Case of Dual address managed by the slave */
|
||||||
|
#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
|
||||||
|
#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
|
||||||
|
|
||||||
|
/* 3) Case of General Call enabled for the slave */
|
||||||
|
#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Communication events
|
||||||
|
*
|
||||||
|
* Wait on one of these events when EV1 has already been checked and:
|
||||||
|
*
|
||||||
|
* - Slave RECEIVER mode:
|
||||||
|
* - EV2: When the application is expecting a data byte to be received.
|
||||||
|
* - EV4: When the application is expecting the end of the communication: master
|
||||||
|
* sends a stop condition and data transmission is stopped.
|
||||||
|
*
|
||||||
|
* - Slave Transmitter mode:
|
||||||
|
* - EV3: When a byte has been transmitted by the slave and the application is expecting
|
||||||
|
* the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and
|
||||||
|
* I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. The second one can optionally be
|
||||||
|
* used when the user software doesn't guarantee the EV3 is managed before the
|
||||||
|
* current byte end of transfer.
|
||||||
|
* - EV3_2: When the master sends a NACK in order to tell slave that data transmission
|
||||||
|
* shall end (before sending the STOP condition). In this case slave has to stop sending
|
||||||
|
* data bytes and expect a Stop condition on the bus.
|
||||||
|
*
|
||||||
|
* @note In case the user software does not guarantee that the event EV2 is
|
||||||
|
* managed before the current byte end of transfer, then user may check on EV2
|
||||||
|
* and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)).
|
||||||
|
* In this case the communication may be slower.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Slave RECEIVER mode --------------------------*/
|
||||||
|
/* --EV2 */
|
||||||
|
#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
|
||||||
|
/* --EV4 */
|
||||||
|
#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
|
||||||
|
|
||||||
|
/* Slave TRANSMITTER mode -----------------------*/
|
||||||
|
/* --EV3 */
|
||||||
|
#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
|
||||||
|
#define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */
|
||||||
|
/* --EV3_2 */
|
||||||
|
#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
|
||||||
|
|
||||||
|
/*=========================== End of Events Description ==========================================*/
|
||||||
|
|
||||||
|
#define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
|
||||||
|
((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
|
||||||
|
((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
|
||||||
|
((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
|
||||||
|
((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
|
||||||
|
((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
|
||||||
|
((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \
|
||||||
|
((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \
|
||||||
|
((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
|
||||||
|
((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \
|
||||||
|
((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \
|
||||||
|
((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \
|
||||||
|
((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \
|
||||||
|
((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
|
||||||
|
((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
|
||||||
|
((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
|
||||||
|
((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
|
||||||
|
((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \
|
||||||
|
((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
|
||||||
|
((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_own_address1
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_clock_speed
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void I2C_DeInit(I2C_TypeDef* I2Cx);
|
||||||
|
void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
|
||||||
|
void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
|
||||||
|
void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||||
|
void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||||
|
void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||||
|
void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||||
|
void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||||
|
void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||||
|
void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);
|
||||||
|
void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||||
|
void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||||
|
void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);
|
||||||
|
void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
|
||||||
|
uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
|
||||||
|
void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
|
||||||
|
uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
|
||||||
|
void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||||
|
void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition);
|
||||||
|
void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert);
|
||||||
|
void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||||
|
void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition);
|
||||||
|
void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||||
|
uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
|
||||||
|
void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||||
|
void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||||
|
void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief
|
||||||
|
****************************************************************************************
|
||||||
|
*
|
||||||
|
* I2C State Monitoring Functions
|
||||||
|
*
|
||||||
|
****************************************************************************************
|
||||||
|
* This I2C driver provides three different ways for I2C state monitoring
|
||||||
|
* depending on the application requirements and constraints:
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* 1) Basic state monitoring:
|
||||||
|
* Using I2C_CheckEvent() function:
|
||||||
|
* It compares the status registers (SR1 and SR2) content to a given event
|
||||||
|
* (can be the combination of one or more flags).
|
||||||
|
* It returns SUCCESS if the current status includes the given flags
|
||||||
|
* and returns ERROR if one or more flags are missing in the current status.
|
||||||
|
* - When to use:
|
||||||
|
* - This function is suitable for most applications as well as for startup
|
||||||
|
* activity since the events are fully described in the product reference manual
|
||||||
|
* (RM0008).
|
||||||
|
* - It is also suitable for users who need to define their own events.
|
||||||
|
* - Limitations:
|
||||||
|
* - If an error occurs (ie. error flags are set besides to the monitored flags),
|
||||||
|
* the I2C_CheckEvent() function may return SUCCESS despite the communication
|
||||||
|
* hold or corrupted real state.
|
||||||
|
* In this case, it is advised to use error interrupts to monitor the error
|
||||||
|
* events and handle them in the interrupt IRQ handler.
|
||||||
|
*
|
||||||
|
* @note
|
||||||
|
* For error management, it is advised to use the following functions:
|
||||||
|
* - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).
|
||||||
|
* - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs.
|
||||||
|
* Where x is the peripheral instance (I2C1, I2C2 ...)
|
||||||
|
* - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into I2Cx_ER_IRQHandler()
|
||||||
|
* in order to determine which error occurred.
|
||||||
|
* - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd()
|
||||||
|
* and/or I2C_GenerateStop() in order to clear the error flag and source,
|
||||||
|
* and return to correct communication status.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* 2) Advanced state monitoring:
|
||||||
|
* Using the function I2C_GetLastEvent() which returns the image of both status
|
||||||
|
* registers in a single word (uint32_t) (Status Register 2 value is shifted left
|
||||||
|
* by 16 bits and concatenated to Status Register 1).
|
||||||
|
* - When to use:
|
||||||
|
* - This function is suitable for the same applications above but it allows to
|
||||||
|
* overcome the limitations of I2C_GetFlagStatus() function (see below).
|
||||||
|
* The returned value could be compared to events already defined in the
|
||||||
|
* library (stm32f10x_i2c.h) or to custom values defined by user.
|
||||||
|
* - This function is suitable when multiple flags are monitored at the same time.
|
||||||
|
* - At the opposite of I2C_CheckEvent() function, this function allows user to
|
||||||
|
* choose when an event is accepted (when all events flags are set and no
|
||||||
|
* other flags are set or just when the needed flags are set like
|
||||||
|
* I2C_CheckEvent() function).
|
||||||
|
* - Limitations:
|
||||||
|
* - User may need to define his own events.
|
||||||
|
* - Same remark concerning the error management is applicable for this
|
||||||
|
* function if user decides to check only regular communication flags (and
|
||||||
|
* ignores error flags).
|
||||||
|
*
|
||||||
|
*
|
||||||
|
* 3) Flag-based state monitoring:
|
||||||
|
* Using the function I2C_GetFlagStatus() which simply returns the status of
|
||||||
|
* one single flag (ie. I2C_FLAG_RXNE ...).
|
||||||
|
* - When to use:
|
||||||
|
* - This function could be used for specific applications or in debug phase.
|
||||||
|
* - It is suitable when only one flag checking is needed (most I2C events
|
||||||
|
* are monitored through multiple flags).
|
||||||
|
* - Limitations:
|
||||||
|
* - When calling this function, the Status register is accessed. Some flags are
|
||||||
|
* cleared when the status register is accessed. So checking the status
|
||||||
|
* of one Flag, may clear other ones.
|
||||||
|
* - Function may need to be called twice or more in order to monitor one
|
||||||
|
* single event.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
*
|
||||||
|
* 1) Basic state monitoring
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
|
||||||
|
/**
|
||||||
|
*
|
||||||
|
* 2) Advanced state monitoring
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
|
||||||
|
/**
|
||||||
|
*
|
||||||
|
* 3) Flag-based state monitoring
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
|
||||||
|
/**
|
||||||
|
*
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
|
||||||
|
ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
|
||||||
|
void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__STM32F10x_I2C_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,140 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_iwdg.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the IWDG
|
||||||
|
* firmware library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_IWDG_H
|
||||||
|
#define __STM32F10x_IWDG_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup IWDG
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_WriteAccess
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
|
||||||
|
#define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
|
||||||
|
#define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
|
||||||
|
((ACCESS) == IWDG_WriteAccess_Disable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_prescaler
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IWDG_Prescaler_4 ((uint8_t)0x00)
|
||||||
|
#define IWDG_Prescaler_8 ((uint8_t)0x01)
|
||||||
|
#define IWDG_Prescaler_16 ((uint8_t)0x02)
|
||||||
|
#define IWDG_Prescaler_32 ((uint8_t)0x03)
|
||||||
|
#define IWDG_Prescaler_64 ((uint8_t)0x04)
|
||||||
|
#define IWDG_Prescaler_128 ((uint8_t)0x05)
|
||||||
|
#define IWDG_Prescaler_256 ((uint8_t)0x06)
|
||||||
|
#define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
|
||||||
|
((PRESCALER) == IWDG_Prescaler_8) || \
|
||||||
|
((PRESCALER) == IWDG_Prescaler_16) || \
|
||||||
|
((PRESCALER) == IWDG_Prescaler_32) || \
|
||||||
|
((PRESCALER) == IWDG_Prescaler_64) || \
|
||||||
|
((PRESCALER) == IWDG_Prescaler_128)|| \
|
||||||
|
((PRESCALER) == IWDG_Prescaler_256))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_Flag
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IWDG_FLAG_PVU ((uint16_t)0x0001)
|
||||||
|
#define IWDG_FLAG_RVU ((uint16_t)0x0002)
|
||||||
|
#define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
|
||||||
|
#define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup IWDG_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
|
||||||
|
void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
|
||||||
|
void IWDG_SetReload(uint16_t Reload);
|
||||||
|
void IWDG_ReloadCounter(void);
|
||||||
|
void IWDG_Enable(void);
|
||||||
|
FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_IWDG_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,156 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_pwr.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the PWR firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_PWR_H
|
||||||
|
#define __STM32F10x_PWR_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup PWR
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup PWR_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup PWR_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup PVD_detection_level
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PWR_PVDLevel_2V2 ((uint32_t)0x00000000)
|
||||||
|
#define PWR_PVDLevel_2V3 ((uint32_t)0x00000020)
|
||||||
|
#define PWR_PVDLevel_2V4 ((uint32_t)0x00000040)
|
||||||
|
#define PWR_PVDLevel_2V5 ((uint32_t)0x00000060)
|
||||||
|
#define PWR_PVDLevel_2V6 ((uint32_t)0x00000080)
|
||||||
|
#define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0)
|
||||||
|
#define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0)
|
||||||
|
#define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0)
|
||||||
|
#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \
|
||||||
|
((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \
|
||||||
|
((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \
|
||||||
|
((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Regulator_state_is_STOP_mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PWR_Regulator_ON ((uint32_t)0x00000000)
|
||||||
|
#define PWR_Regulator_LowPower ((uint32_t)0x00000001)
|
||||||
|
#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
|
||||||
|
((REGULATOR) == PWR_Regulator_LowPower))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup STOP_mode_entry
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PWR_STOPEntry_WFI ((uint8_t)0x01)
|
||||||
|
#define PWR_STOPEntry_WFE ((uint8_t)0x02)
|
||||||
|
#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup PWR_Flag
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PWR_FLAG_WU ((uint32_t)0x00000001)
|
||||||
|
#define PWR_FLAG_SB ((uint32_t)0x00000002)
|
||||||
|
#define PWR_FLAG_PVDO ((uint32_t)0x00000004)
|
||||||
|
#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
|
||||||
|
((FLAG) == PWR_FLAG_PVDO))
|
||||||
|
|
||||||
|
#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup PWR_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup PWR_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void PWR_DeInit(void);
|
||||||
|
void PWR_BackupAccessCmd(FunctionalState NewState);
|
||||||
|
void PWR_PVDCmd(FunctionalState NewState);
|
||||||
|
void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
|
||||||
|
void PWR_WakeUpPinCmd(FunctionalState NewState);
|
||||||
|
void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
|
||||||
|
void PWR_EnterSTANDBYMode(void);
|
||||||
|
FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
|
||||||
|
void PWR_ClearFlag(uint32_t PWR_FLAG);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_PWR_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,727 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_rcc.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the RCC firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_RCC_H
|
||||||
|
#define __STM32F10x_RCC_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup RCC
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RCC_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t SYSCLK_Frequency; /*!< returns SYSCLK clock frequency expressed in Hz */
|
||||||
|
uint32_t HCLK_Frequency; /*!< returns HCLK clock frequency expressed in Hz */
|
||||||
|
uint32_t PCLK1_Frequency; /*!< returns PCLK1 clock frequency expressed in Hz */
|
||||||
|
uint32_t PCLK2_Frequency; /*!< returns PCLK2 clock frequency expressed in Hz */
|
||||||
|
uint32_t ADCCLK_Frequency; /*!< returns ADCCLK clock frequency expressed in Hz */
|
||||||
|
}RCC_ClocksTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RCC_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup HSE_configuration
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_HSE_OFF ((uint32_t)0x00000000)
|
||||||
|
#define RCC_HSE_ON ((uint32_t)0x00010000)
|
||||||
|
#define RCC_HSE_Bypass ((uint32_t)0x00040000)
|
||||||
|
#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \
|
||||||
|
((HSE) == RCC_HSE_Bypass))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup PLL_entry_clock_source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_PLLSource_HSI_Div2 ((uint32_t)0x00000000)
|
||||||
|
|
||||||
|
#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_CL)
|
||||||
|
#define RCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000)
|
||||||
|
#define RCC_PLLSource_HSE_Div2 ((uint32_t)0x00030000)
|
||||||
|
#define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \
|
||||||
|
((SOURCE) == RCC_PLLSource_HSE_Div1) || \
|
||||||
|
((SOURCE) == RCC_PLLSource_HSE_Div2))
|
||||||
|
#else
|
||||||
|
#define RCC_PLLSource_PREDIV1 ((uint32_t)0x00010000)
|
||||||
|
#define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \
|
||||||
|
((SOURCE) == RCC_PLLSource_PREDIV1))
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup PLL_multiplication_factor
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#ifndef STM32F10X_CL
|
||||||
|
#define RCC_PLLMul_2 ((uint32_t)0x00000000)
|
||||||
|
#define RCC_PLLMul_3 ((uint32_t)0x00040000)
|
||||||
|
#define RCC_PLLMul_4 ((uint32_t)0x00080000)
|
||||||
|
#define RCC_PLLMul_5 ((uint32_t)0x000C0000)
|
||||||
|
#define RCC_PLLMul_6 ((uint32_t)0x00100000)
|
||||||
|
#define RCC_PLLMul_7 ((uint32_t)0x00140000)
|
||||||
|
#define RCC_PLLMul_8 ((uint32_t)0x00180000)
|
||||||
|
#define RCC_PLLMul_9 ((uint32_t)0x001C0000)
|
||||||
|
#define RCC_PLLMul_10 ((uint32_t)0x00200000)
|
||||||
|
#define RCC_PLLMul_11 ((uint32_t)0x00240000)
|
||||||
|
#define RCC_PLLMul_12 ((uint32_t)0x00280000)
|
||||||
|
#define RCC_PLLMul_13 ((uint32_t)0x002C0000)
|
||||||
|
#define RCC_PLLMul_14 ((uint32_t)0x00300000)
|
||||||
|
#define RCC_PLLMul_15 ((uint32_t)0x00340000)
|
||||||
|
#define RCC_PLLMul_16 ((uint32_t)0x00380000)
|
||||||
|
#define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3) || \
|
||||||
|
((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \
|
||||||
|
((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \
|
||||||
|
((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \
|
||||||
|
((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || \
|
||||||
|
((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || \
|
||||||
|
((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || \
|
||||||
|
((MUL) == RCC_PLLMul_16))
|
||||||
|
|
||||||
|
#else
|
||||||
|
#define RCC_PLLMul_4 ((uint32_t)0x00080000)
|
||||||
|
#define RCC_PLLMul_5 ((uint32_t)0x000C0000)
|
||||||
|
#define RCC_PLLMul_6 ((uint32_t)0x00100000)
|
||||||
|
#define RCC_PLLMul_7 ((uint32_t)0x00140000)
|
||||||
|
#define RCC_PLLMul_8 ((uint32_t)0x00180000)
|
||||||
|
#define RCC_PLLMul_9 ((uint32_t)0x001C0000)
|
||||||
|
#define RCC_PLLMul_6_5 ((uint32_t)0x00340000)
|
||||||
|
|
||||||
|
#define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \
|
||||||
|
((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \
|
||||||
|
((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \
|
||||||
|
((MUL) == RCC_PLLMul_6_5))
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup PREDIV1_division_factor
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL)
|
||||||
|
#define RCC_PREDIV1_Div1 ((uint32_t)0x00000000)
|
||||||
|
#define RCC_PREDIV1_Div2 ((uint32_t)0x00000001)
|
||||||
|
#define RCC_PREDIV1_Div3 ((uint32_t)0x00000002)
|
||||||
|
#define RCC_PREDIV1_Div4 ((uint32_t)0x00000003)
|
||||||
|
#define RCC_PREDIV1_Div5 ((uint32_t)0x00000004)
|
||||||
|
#define RCC_PREDIV1_Div6 ((uint32_t)0x00000005)
|
||||||
|
#define RCC_PREDIV1_Div7 ((uint32_t)0x00000006)
|
||||||
|
#define RCC_PREDIV1_Div8 ((uint32_t)0x00000007)
|
||||||
|
#define RCC_PREDIV1_Div9 ((uint32_t)0x00000008)
|
||||||
|
#define RCC_PREDIV1_Div10 ((uint32_t)0x00000009)
|
||||||
|
#define RCC_PREDIV1_Div11 ((uint32_t)0x0000000A)
|
||||||
|
#define RCC_PREDIV1_Div12 ((uint32_t)0x0000000B)
|
||||||
|
#define RCC_PREDIV1_Div13 ((uint32_t)0x0000000C)
|
||||||
|
#define RCC_PREDIV1_Div14 ((uint32_t)0x0000000D)
|
||||||
|
#define RCC_PREDIV1_Div15 ((uint32_t)0x0000000E)
|
||||||
|
#define RCC_PREDIV1_Div16 ((uint32_t)0x0000000F)
|
||||||
|
|
||||||
|
#define IS_RCC_PREDIV1(PREDIV1) (((PREDIV1) == RCC_PREDIV1_Div1) || ((PREDIV1) == RCC_PREDIV1_Div2) || \
|
||||||
|
((PREDIV1) == RCC_PREDIV1_Div3) || ((PREDIV1) == RCC_PREDIV1_Div4) || \
|
||||||
|
((PREDIV1) == RCC_PREDIV1_Div5) || ((PREDIV1) == RCC_PREDIV1_Div6) || \
|
||||||
|
((PREDIV1) == RCC_PREDIV1_Div7) || ((PREDIV1) == RCC_PREDIV1_Div8) || \
|
||||||
|
((PREDIV1) == RCC_PREDIV1_Div9) || ((PREDIV1) == RCC_PREDIV1_Div10) || \
|
||||||
|
((PREDIV1) == RCC_PREDIV1_Div11) || ((PREDIV1) == RCC_PREDIV1_Div12) || \
|
||||||
|
((PREDIV1) == RCC_PREDIV1_Div13) || ((PREDIV1) == RCC_PREDIV1_Div14) || \
|
||||||
|
((PREDIV1) == RCC_PREDIV1_Div15) || ((PREDIV1) == RCC_PREDIV1_Div16))
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup PREDIV1_clock_source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#ifdef STM32F10X_CL
|
||||||
|
/* PREDIV1 clock source (for STM32 connectivity line devices) */
|
||||||
|
#define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000)
|
||||||
|
#define RCC_PREDIV1_Source_PLL2 ((uint32_t)0x00010000)
|
||||||
|
|
||||||
|
#define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE) || \
|
||||||
|
((SOURCE) == RCC_PREDIV1_Source_PLL2))
|
||||||
|
#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
|
||||||
|
/* PREDIV1 clock source (for STM32 Value line devices) */
|
||||||
|
#define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000)
|
||||||
|
|
||||||
|
#define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE))
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef STM32F10X_CL
|
||||||
|
/** @defgroup PREDIV2_division_factor
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_PREDIV2_Div1 ((uint32_t)0x00000000)
|
||||||
|
#define RCC_PREDIV2_Div2 ((uint32_t)0x00000010)
|
||||||
|
#define RCC_PREDIV2_Div3 ((uint32_t)0x00000020)
|
||||||
|
#define RCC_PREDIV2_Div4 ((uint32_t)0x00000030)
|
||||||
|
#define RCC_PREDIV2_Div5 ((uint32_t)0x00000040)
|
||||||
|
#define RCC_PREDIV2_Div6 ((uint32_t)0x00000050)
|
||||||
|
#define RCC_PREDIV2_Div7 ((uint32_t)0x00000060)
|
||||||
|
#define RCC_PREDIV2_Div8 ((uint32_t)0x00000070)
|
||||||
|
#define RCC_PREDIV2_Div9 ((uint32_t)0x00000080)
|
||||||
|
#define RCC_PREDIV2_Div10 ((uint32_t)0x00000090)
|
||||||
|
#define RCC_PREDIV2_Div11 ((uint32_t)0x000000A0)
|
||||||
|
#define RCC_PREDIV2_Div12 ((uint32_t)0x000000B0)
|
||||||
|
#define RCC_PREDIV2_Div13 ((uint32_t)0x000000C0)
|
||||||
|
#define RCC_PREDIV2_Div14 ((uint32_t)0x000000D0)
|
||||||
|
#define RCC_PREDIV2_Div15 ((uint32_t)0x000000E0)
|
||||||
|
#define RCC_PREDIV2_Div16 ((uint32_t)0x000000F0)
|
||||||
|
|
||||||
|
#define IS_RCC_PREDIV2(PREDIV2) (((PREDIV2) == RCC_PREDIV2_Div1) || ((PREDIV2) == RCC_PREDIV2_Div2) || \
|
||||||
|
((PREDIV2) == RCC_PREDIV2_Div3) || ((PREDIV2) == RCC_PREDIV2_Div4) || \
|
||||||
|
((PREDIV2) == RCC_PREDIV2_Div5) || ((PREDIV2) == RCC_PREDIV2_Div6) || \
|
||||||
|
((PREDIV2) == RCC_PREDIV2_Div7) || ((PREDIV2) == RCC_PREDIV2_Div8) || \
|
||||||
|
((PREDIV2) == RCC_PREDIV2_Div9) || ((PREDIV2) == RCC_PREDIV2_Div10) || \
|
||||||
|
((PREDIV2) == RCC_PREDIV2_Div11) || ((PREDIV2) == RCC_PREDIV2_Div12) || \
|
||||||
|
((PREDIV2) == RCC_PREDIV2_Div13) || ((PREDIV2) == RCC_PREDIV2_Div14) || \
|
||||||
|
((PREDIV2) == RCC_PREDIV2_Div15) || ((PREDIV2) == RCC_PREDIV2_Div16))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup PLL2_multiplication_factor
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_PLL2Mul_8 ((uint32_t)0x00000600)
|
||||||
|
#define RCC_PLL2Mul_9 ((uint32_t)0x00000700)
|
||||||
|
#define RCC_PLL2Mul_10 ((uint32_t)0x00000800)
|
||||||
|
#define RCC_PLL2Mul_11 ((uint32_t)0x00000900)
|
||||||
|
#define RCC_PLL2Mul_12 ((uint32_t)0x00000A00)
|
||||||
|
#define RCC_PLL2Mul_13 ((uint32_t)0x00000B00)
|
||||||
|
#define RCC_PLL2Mul_14 ((uint32_t)0x00000C00)
|
||||||
|
#define RCC_PLL2Mul_16 ((uint32_t)0x00000E00)
|
||||||
|
#define RCC_PLL2Mul_20 ((uint32_t)0x00000F00)
|
||||||
|
|
||||||
|
#define IS_RCC_PLL2_MUL(MUL) (((MUL) == RCC_PLL2Mul_8) || ((MUL) == RCC_PLL2Mul_9) || \
|
||||||
|
((MUL) == RCC_PLL2Mul_10) || ((MUL) == RCC_PLL2Mul_11) || \
|
||||||
|
((MUL) == RCC_PLL2Mul_12) || ((MUL) == RCC_PLL2Mul_13) || \
|
||||||
|
((MUL) == RCC_PLL2Mul_14) || ((MUL) == RCC_PLL2Mul_16) || \
|
||||||
|
((MUL) == RCC_PLL2Mul_20))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup PLL3_multiplication_factor
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_PLL3Mul_8 ((uint32_t)0x00006000)
|
||||||
|
#define RCC_PLL3Mul_9 ((uint32_t)0x00007000)
|
||||||
|
#define RCC_PLL3Mul_10 ((uint32_t)0x00008000)
|
||||||
|
#define RCC_PLL3Mul_11 ((uint32_t)0x00009000)
|
||||||
|
#define RCC_PLL3Mul_12 ((uint32_t)0x0000A000)
|
||||||
|
#define RCC_PLL3Mul_13 ((uint32_t)0x0000B000)
|
||||||
|
#define RCC_PLL3Mul_14 ((uint32_t)0x0000C000)
|
||||||
|
#define RCC_PLL3Mul_16 ((uint32_t)0x0000E000)
|
||||||
|
#define RCC_PLL3Mul_20 ((uint32_t)0x0000F000)
|
||||||
|
|
||||||
|
#define IS_RCC_PLL3_MUL(MUL) (((MUL) == RCC_PLL3Mul_8) || ((MUL) == RCC_PLL3Mul_9) || \
|
||||||
|
((MUL) == RCC_PLL3Mul_10) || ((MUL) == RCC_PLL3Mul_11) || \
|
||||||
|
((MUL) == RCC_PLL3Mul_12) || ((MUL) == RCC_PLL3Mul_13) || \
|
||||||
|
((MUL) == RCC_PLL3Mul_14) || ((MUL) == RCC_PLL3Mul_16) || \
|
||||||
|
((MUL) == RCC_PLL3Mul_20))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup System_clock_source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000)
|
||||||
|
#define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001)
|
||||||
|
#define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002)
|
||||||
|
#define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \
|
||||||
|
((SOURCE) == RCC_SYSCLKSource_HSE) || \
|
||||||
|
((SOURCE) == RCC_SYSCLKSource_PLLCLK))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup AHB_clock_source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_SYSCLK_Div1 ((uint32_t)0x00000000)
|
||||||
|
#define RCC_SYSCLK_Div2 ((uint32_t)0x00000080)
|
||||||
|
#define RCC_SYSCLK_Div4 ((uint32_t)0x00000090)
|
||||||
|
#define RCC_SYSCLK_Div8 ((uint32_t)0x000000A0)
|
||||||
|
#define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0)
|
||||||
|
#define RCC_SYSCLK_Div64 ((uint32_t)0x000000C0)
|
||||||
|
#define RCC_SYSCLK_Div128 ((uint32_t)0x000000D0)
|
||||||
|
#define RCC_SYSCLK_Div256 ((uint32_t)0x000000E0)
|
||||||
|
#define RCC_SYSCLK_Div512 ((uint32_t)0x000000F0)
|
||||||
|
#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \
|
||||||
|
((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \
|
||||||
|
((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \
|
||||||
|
((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \
|
||||||
|
((HCLK) == RCC_SYSCLK_Div512))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup APB1_APB2_clock_source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_HCLK_Div1 ((uint32_t)0x00000000)
|
||||||
|
#define RCC_HCLK_Div2 ((uint32_t)0x00000400)
|
||||||
|
#define RCC_HCLK_Div4 ((uint32_t)0x00000500)
|
||||||
|
#define RCC_HCLK_Div8 ((uint32_t)0x00000600)
|
||||||
|
#define RCC_HCLK_Div16 ((uint32_t)0x00000700)
|
||||||
|
#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \
|
||||||
|
((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \
|
||||||
|
((PCLK) == RCC_HCLK_Div16))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RCC_Interrupt_source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_IT_LSIRDY ((uint8_t)0x01)
|
||||||
|
#define RCC_IT_LSERDY ((uint8_t)0x02)
|
||||||
|
#define RCC_IT_HSIRDY ((uint8_t)0x04)
|
||||||
|
#define RCC_IT_HSERDY ((uint8_t)0x08)
|
||||||
|
#define RCC_IT_PLLRDY ((uint8_t)0x10)
|
||||||
|
#define RCC_IT_CSS ((uint8_t)0x80)
|
||||||
|
|
||||||
|
#ifndef STM32F10X_CL
|
||||||
|
#define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xE0) == 0x00) && ((IT) != 0x00))
|
||||||
|
#define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
|
||||||
|
((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
|
||||||
|
((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS))
|
||||||
|
#define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x60) == 0x00) && ((IT) != 0x00))
|
||||||
|
#else
|
||||||
|
#define RCC_IT_PLL2RDY ((uint8_t)0x20)
|
||||||
|
#define RCC_IT_PLL3RDY ((uint8_t)0x40)
|
||||||
|
#define IS_RCC_IT(IT) ((((IT) & (uint8_t)0x80) == 0x00) && ((IT) != 0x00))
|
||||||
|
#define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \
|
||||||
|
((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \
|
||||||
|
((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS) || \
|
||||||
|
((IT) == RCC_IT_PLL2RDY) || ((IT) == RCC_IT_PLL3RDY))
|
||||||
|
#define IS_RCC_CLEAR_IT(IT) ((IT) != 0x00)
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef STM32F10X_CL
|
||||||
|
/** @defgroup USB_Device_clock_source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_USBCLKSource_PLLCLK_1Div5 ((uint8_t)0x00)
|
||||||
|
#define RCC_USBCLKSource_PLLCLK_Div1 ((uint8_t)0x01)
|
||||||
|
|
||||||
|
#define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || \
|
||||||
|
((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
#else
|
||||||
|
/** @defgroup USB_OTG_FS_clock_source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define RCC_OTGFSCLKSource_PLLVCO_Div3 ((uint8_t)0x00)
|
||||||
|
#define RCC_OTGFSCLKSource_PLLVCO_Div2 ((uint8_t)0x01)
|
||||||
|
|
||||||
|
#define IS_RCC_OTGFSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div3) || \
|
||||||
|
((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div2))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef STM32F10X_CL
|
||||||
|
/** @defgroup I2S2_clock_source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define RCC_I2S2CLKSource_SYSCLK ((uint8_t)0x00)
|
||||||
|
#define RCC_I2S2CLKSource_PLL3_VCO ((uint8_t)0x01)
|
||||||
|
|
||||||
|
#define IS_RCC_I2S2CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_SYSCLK) || \
|
||||||
|
((SOURCE) == RCC_I2S2CLKSource_PLL3_VCO))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2S3_clock_source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define RCC_I2S3CLKSource_SYSCLK ((uint8_t)0x00)
|
||||||
|
#define RCC_I2S3CLKSource_PLL3_VCO ((uint8_t)0x01)
|
||||||
|
|
||||||
|
#define IS_RCC_I2S3CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S3CLKSource_SYSCLK) || \
|
||||||
|
((SOURCE) == RCC_I2S3CLKSource_PLL3_VCO))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup ADC_clock_source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_PCLK2_Div2 ((uint32_t)0x00000000)
|
||||||
|
#define RCC_PCLK2_Div4 ((uint32_t)0x00004000)
|
||||||
|
#define RCC_PCLK2_Div6 ((uint32_t)0x00008000)
|
||||||
|
#define RCC_PCLK2_Div8 ((uint32_t)0x0000C000)
|
||||||
|
#define IS_RCC_ADCCLK(ADCCLK) (((ADCCLK) == RCC_PCLK2_Div2) || ((ADCCLK) == RCC_PCLK2_Div4) || \
|
||||||
|
((ADCCLK) == RCC_PCLK2_Div6) || ((ADCCLK) == RCC_PCLK2_Div8))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup LSE_configuration
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_LSE_OFF ((uint8_t)0x00)
|
||||||
|
#define RCC_LSE_ON ((uint8_t)0x01)
|
||||||
|
#define RCC_LSE_Bypass ((uint8_t)0x04)
|
||||||
|
#define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \
|
||||||
|
((LSE) == RCC_LSE_Bypass))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RTC_clock_source
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_RTCCLKSource_LSE ((uint32_t)0x00000100)
|
||||||
|
#define RCC_RTCCLKSource_LSI ((uint32_t)0x00000200)
|
||||||
|
#define RCC_RTCCLKSource_HSE_Div128 ((uint32_t)0x00000300)
|
||||||
|
#define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \
|
||||||
|
((SOURCE) == RCC_RTCCLKSource_LSI) || \
|
||||||
|
((SOURCE) == RCC_RTCCLKSource_HSE_Div128))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup AHB_peripheral
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)
|
||||||
|
#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002)
|
||||||
|
#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004)
|
||||||
|
#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010)
|
||||||
|
#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040)
|
||||||
|
|
||||||
|
#ifndef STM32F10X_CL
|
||||||
|
#define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100)
|
||||||
|
#define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400)
|
||||||
|
#define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFAA8) == 0x00) && ((PERIPH) != 0x00))
|
||||||
|
#else
|
||||||
|
#define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000)
|
||||||
|
#define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000)
|
||||||
|
#define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000)
|
||||||
|
#define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000)
|
||||||
|
|
||||||
|
#define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFE2FA8) == 0x00) && ((PERIPH) != 0x00))
|
||||||
|
#define IS_RCC_AHB_PERIPH_RESET(PERIPH) ((((PERIPH) & 0xFFFFAFFF) == 0x00) && ((PERIPH) != 0x00))
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup APB2_peripheral
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001)
|
||||||
|
#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)
|
||||||
|
#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008)
|
||||||
|
#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)
|
||||||
|
#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)
|
||||||
|
#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040)
|
||||||
|
#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080)
|
||||||
|
#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100)
|
||||||
|
#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)
|
||||||
|
#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400)
|
||||||
|
#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)
|
||||||
|
#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
|
||||||
|
#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000)
|
||||||
|
#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000)
|
||||||
|
#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000)
|
||||||
|
#define RCC_APB2Periph_TIM15 ((uint32_t)0x00010000)
|
||||||
|
#define RCC_APB2Periph_TIM16 ((uint32_t)0x00020000)
|
||||||
|
#define RCC_APB2Periph_TIM17 ((uint32_t)0x00040000)
|
||||||
|
#define RCC_APB2Periph_TIM9 ((uint32_t)0x00080000)
|
||||||
|
#define RCC_APB2Periph_TIM10 ((uint32_t)0x00100000)
|
||||||
|
#define RCC_APB2Periph_TIM11 ((uint32_t)0x00200000)
|
||||||
|
|
||||||
|
#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFC00002) == 0x00) && ((PERIPH) != 0x00))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup APB1_peripheral
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
|
||||||
|
#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
|
||||||
|
#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
|
||||||
|
#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)
|
||||||
|
#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
|
||||||
|
#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
|
||||||
|
#define RCC_APB1Periph_TIM12 ((uint32_t)0x00000040)
|
||||||
|
#define RCC_APB1Periph_TIM13 ((uint32_t)0x00000080)
|
||||||
|
#define RCC_APB1Periph_TIM14 ((uint32_t)0x00000100)
|
||||||
|
#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
|
||||||
|
#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
|
||||||
|
#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
|
||||||
|
#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
|
||||||
|
#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
|
||||||
|
#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
|
||||||
|
#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
|
||||||
|
#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
|
||||||
|
#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
|
||||||
|
#define RCC_APB1Periph_USB ((uint32_t)0x00800000)
|
||||||
|
#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
|
||||||
|
#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
|
||||||
|
#define RCC_APB1Periph_BKP ((uint32_t)0x08000000)
|
||||||
|
#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
|
||||||
|
#define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
|
||||||
|
#define RCC_APB1Periph_CEC ((uint32_t)0x40000000)
|
||||||
|
|
||||||
|
#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0x81013600) == 0x00) && ((PERIPH) != 0x00))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup Clock_source_to_output_on_MCO_pin
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_MCO_NoClock ((uint8_t)0x00)
|
||||||
|
#define RCC_MCO_SYSCLK ((uint8_t)0x04)
|
||||||
|
#define RCC_MCO_HSI ((uint8_t)0x05)
|
||||||
|
#define RCC_MCO_HSE ((uint8_t)0x06)
|
||||||
|
#define RCC_MCO_PLLCLK_Div2 ((uint8_t)0x07)
|
||||||
|
|
||||||
|
#ifndef STM32F10X_CL
|
||||||
|
#define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
|
||||||
|
((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \
|
||||||
|
((MCO) == RCC_MCO_PLLCLK_Div2))
|
||||||
|
#else
|
||||||
|
#define RCC_MCO_PLL2CLK ((uint8_t)0x08)
|
||||||
|
#define RCC_MCO_PLL3CLK_Div2 ((uint8_t)0x09)
|
||||||
|
#define RCC_MCO_XT1 ((uint8_t)0x0A)
|
||||||
|
#define RCC_MCO_PLL3CLK ((uint8_t)0x0B)
|
||||||
|
|
||||||
|
#define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \
|
||||||
|
((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \
|
||||||
|
((MCO) == RCC_MCO_PLLCLK_Div2) || ((MCO) == RCC_MCO_PLL2CLK) || \
|
||||||
|
((MCO) == RCC_MCO_PLL3CLK_Div2) || ((MCO) == RCC_MCO_XT1) || \
|
||||||
|
((MCO) == RCC_MCO_PLL3CLK))
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RCC_Flag
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RCC_FLAG_HSIRDY ((uint8_t)0x21)
|
||||||
|
#define RCC_FLAG_HSERDY ((uint8_t)0x31)
|
||||||
|
#define RCC_FLAG_PLLRDY ((uint8_t)0x39)
|
||||||
|
#define RCC_FLAG_LSERDY ((uint8_t)0x41)
|
||||||
|
#define RCC_FLAG_LSIRDY ((uint8_t)0x61)
|
||||||
|
#define RCC_FLAG_PINRST ((uint8_t)0x7A)
|
||||||
|
#define RCC_FLAG_PORRST ((uint8_t)0x7B)
|
||||||
|
#define RCC_FLAG_SFTRST ((uint8_t)0x7C)
|
||||||
|
#define RCC_FLAG_IWDGRST ((uint8_t)0x7D)
|
||||||
|
#define RCC_FLAG_WWDGRST ((uint8_t)0x7E)
|
||||||
|
#define RCC_FLAG_LPWRRST ((uint8_t)0x7F)
|
||||||
|
|
||||||
|
#ifndef STM32F10X_CL
|
||||||
|
#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
|
||||||
|
((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
|
||||||
|
((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
|
||||||
|
((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
|
||||||
|
((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \
|
||||||
|
((FLAG) == RCC_FLAG_LPWRRST))
|
||||||
|
#else
|
||||||
|
#define RCC_FLAG_PLL2RDY ((uint8_t)0x3B)
|
||||||
|
#define RCC_FLAG_PLL3RDY ((uint8_t)0x3D)
|
||||||
|
#define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \
|
||||||
|
((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \
|
||||||
|
((FLAG) == RCC_FLAG_PLL2RDY) || ((FLAG) == RCC_FLAG_PLL3RDY) || \
|
||||||
|
((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \
|
||||||
|
((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \
|
||||||
|
((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \
|
||||||
|
((FLAG) == RCC_FLAG_LPWRRST))
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
|
||||||
|
#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RCC_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RCC_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void RCC_DeInit(void);
|
||||||
|
void RCC_HSEConfig(uint32_t RCC_HSE);
|
||||||
|
ErrorStatus RCC_WaitForHSEStartUp(void);
|
||||||
|
void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue);
|
||||||
|
void RCC_HSICmd(FunctionalState NewState);
|
||||||
|
void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul);
|
||||||
|
void RCC_PLLCmd(FunctionalState NewState);
|
||||||
|
|
||||||
|
#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL)
|
||||||
|
void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef STM32F10X_CL
|
||||||
|
void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div);
|
||||||
|
void RCC_PLL2Config(uint32_t RCC_PLL2Mul);
|
||||||
|
void RCC_PLL2Cmd(FunctionalState NewState);
|
||||||
|
void RCC_PLL3Config(uint32_t RCC_PLL3Mul);
|
||||||
|
void RCC_PLL3Cmd(FunctionalState NewState);
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
|
||||||
|
void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
|
||||||
|
uint8_t RCC_GetSYSCLKSource(void);
|
||||||
|
void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
|
||||||
|
void RCC_PCLK1Config(uint32_t RCC_HCLK);
|
||||||
|
void RCC_PCLK2Config(uint32_t RCC_HCLK);
|
||||||
|
void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState);
|
||||||
|
|
||||||
|
#ifndef STM32F10X_CL
|
||||||
|
void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource);
|
||||||
|
#else
|
||||||
|
void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource);
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
|
||||||
|
void RCC_ADCCLKConfig(uint32_t RCC_PCLK2);
|
||||||
|
|
||||||
|
#ifdef STM32F10X_CL
|
||||||
|
void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource);
|
||||||
|
void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource);
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
|
||||||
|
void RCC_LSEConfig(uint8_t RCC_LSE);
|
||||||
|
void RCC_LSICmd(FunctionalState NewState);
|
||||||
|
void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource);
|
||||||
|
void RCC_RTCCLKCmd(FunctionalState NewState);
|
||||||
|
void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
|
||||||
|
void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
|
||||||
|
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
||||||
|
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
||||||
|
|
||||||
|
#ifdef STM32F10X_CL
|
||||||
|
void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
|
||||||
|
#endif /* STM32F10X_CL */
|
||||||
|
|
||||||
|
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
||||||
|
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
||||||
|
void RCC_BackupResetCmd(FunctionalState NewState);
|
||||||
|
void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
|
||||||
|
void RCC_MCOConfig(uint8_t RCC_MCO);
|
||||||
|
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
|
||||||
|
void RCC_ClearFlag(void);
|
||||||
|
ITStatus RCC_GetITStatus(uint8_t RCC_IT);
|
||||||
|
void RCC_ClearITPendingBit(uint8_t RCC_IT);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_RCC_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,135 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_rtc.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the RTC firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_RTC_H
|
||||||
|
#define __STM32F10x_RTC_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup RTC
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RTC_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RTC_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RTC_interrupts_define
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RTC_IT_OW ((uint16_t)0x0004) /*!< Overflow interrupt */
|
||||||
|
#define RTC_IT_ALR ((uint16_t)0x0002) /*!< Alarm interrupt */
|
||||||
|
#define RTC_IT_SEC ((uint16_t)0x0001) /*!< Second interrupt */
|
||||||
|
#define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00))
|
||||||
|
#define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \
|
||||||
|
((IT) == RTC_IT_SEC))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RTC_interrupts_flags
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RTC_FLAG_RTOFF ((uint16_t)0x0020) /*!< RTC Operation OFF flag */
|
||||||
|
#define RTC_FLAG_RSF ((uint16_t)0x0008) /*!< Registers Synchronized flag */
|
||||||
|
#define RTC_FLAG_OW ((uint16_t)0x0004) /*!< Overflow flag */
|
||||||
|
#define RTC_FLAG_ALR ((uint16_t)0x0002) /*!< Alarm flag */
|
||||||
|
#define RTC_FLAG_SEC ((uint16_t)0x0001) /*!< Second flag */
|
||||||
|
#define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00))
|
||||||
|
#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \
|
||||||
|
((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \
|
||||||
|
((FLAG) == RTC_FLAG_SEC))
|
||||||
|
#define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RTC_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup RTC_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState);
|
||||||
|
void RTC_EnterConfigMode(void);
|
||||||
|
void RTC_ExitConfigMode(void);
|
||||||
|
uint32_t RTC_GetCounter(void);
|
||||||
|
void RTC_SetCounter(uint32_t CounterValue);
|
||||||
|
void RTC_SetPrescaler(uint32_t PrescalerValue);
|
||||||
|
void RTC_SetAlarm(uint32_t AlarmValue);
|
||||||
|
uint32_t RTC_GetDivider(void);
|
||||||
|
void RTC_WaitForLastTask(void);
|
||||||
|
void RTC_WaitForSynchro(void);
|
||||||
|
FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG);
|
||||||
|
void RTC_ClearFlag(uint16_t RTC_FLAG);
|
||||||
|
ITStatus RTC_GetITStatus(uint16_t RTC_IT);
|
||||||
|
void RTC_ClearITPendingBit(uint16_t RTC_IT);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_RTC_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,531 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_sdio.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the SDIO firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_SDIO_H
|
||||||
|
#define __STM32F10x_SDIO_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup SDIO
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made.
|
||||||
|
This parameter can be a value of @ref SDIO_Clock_Edge */
|
||||||
|
|
||||||
|
uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is
|
||||||
|
enabled or disabled.
|
||||||
|
This parameter can be a value of @ref SDIO_Clock_Bypass */
|
||||||
|
|
||||||
|
uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or
|
||||||
|
disabled when the bus is idle.
|
||||||
|
This parameter can be a value of @ref SDIO_Clock_Power_Save */
|
||||||
|
|
||||||
|
uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width.
|
||||||
|
This parameter can be a value of @ref SDIO_Bus_Wide */
|
||||||
|
|
||||||
|
uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
|
||||||
|
This parameter can be a value of @ref SDIO_Hardware_Flow_Control */
|
||||||
|
|
||||||
|
uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller.
|
||||||
|
This parameter can be a value between 0x00 and 0xFF. */
|
||||||
|
|
||||||
|
} SDIO_InitTypeDef;
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent
|
||||||
|
to a card as part of a command message. If a command
|
||||||
|
contains an argument, it must be loaded into this register
|
||||||
|
before writing the command to the command register */
|
||||||
|
|
||||||
|
uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */
|
||||||
|
|
||||||
|
uint32_t SDIO_Response; /*!< Specifies the SDIO response type.
|
||||||
|
This parameter can be a value of @ref SDIO_Response_Type */
|
||||||
|
|
||||||
|
uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled.
|
||||||
|
This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
|
||||||
|
|
||||||
|
uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM)
|
||||||
|
is enabled or disabled.
|
||||||
|
This parameter can be a value of @ref SDIO_CPSM_State */
|
||||||
|
} SDIO_CmdInitTypeDef;
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */
|
||||||
|
|
||||||
|
uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */
|
||||||
|
|
||||||
|
uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer.
|
||||||
|
This parameter can be a value of @ref SDIO_Data_Block_Size */
|
||||||
|
|
||||||
|
uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer
|
||||||
|
is a read or write.
|
||||||
|
This parameter can be a value of @ref SDIO_Transfer_Direction */
|
||||||
|
|
||||||
|
uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
|
||||||
|
This parameter can be a value of @ref SDIO_Transfer_Type */
|
||||||
|
|
||||||
|
uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM)
|
||||||
|
is enabled or disabled.
|
||||||
|
This parameter can be a value of @ref SDIO_DPSM_State */
|
||||||
|
} SDIO_DataInitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Clock_Edge
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_ClockEdge_Rising ((uint32_t)0x00000000)
|
||||||
|
#define SDIO_ClockEdge_Falling ((uint32_t)0x00002000)
|
||||||
|
#define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \
|
||||||
|
((EDGE) == SDIO_ClockEdge_Falling))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Clock_Bypass
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_ClockBypass_Disable ((uint32_t)0x00000000)
|
||||||
|
#define SDIO_ClockBypass_Enable ((uint32_t)0x00000400)
|
||||||
|
#define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \
|
||||||
|
((BYPASS) == SDIO_ClockBypass_Enable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Clock_Power_Save
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000)
|
||||||
|
#define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200)
|
||||||
|
#define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \
|
||||||
|
((SAVE) == SDIO_ClockPowerSave_Enable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Bus_Wide
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_BusWide_1b ((uint32_t)0x00000000)
|
||||||
|
#define SDIO_BusWide_4b ((uint32_t)0x00000800)
|
||||||
|
#define SDIO_BusWide_8b ((uint32_t)0x00001000)
|
||||||
|
#define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \
|
||||||
|
((WIDE) == SDIO_BusWide_8b))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Hardware_Flow_Control
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000)
|
||||||
|
#define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000)
|
||||||
|
#define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \
|
||||||
|
((CONTROL) == SDIO_HardwareFlowControl_Enable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Power_State
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_PowerState_OFF ((uint32_t)0x00000000)
|
||||||
|
#define SDIO_PowerState_ON ((uint32_t)0x00000003)
|
||||||
|
#define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Interrupt_sources
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001)
|
||||||
|
#define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002)
|
||||||
|
#define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004)
|
||||||
|
#define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008)
|
||||||
|
#define SDIO_IT_TXUNDERR ((uint32_t)0x00000010)
|
||||||
|
#define SDIO_IT_RXOVERR ((uint32_t)0x00000020)
|
||||||
|
#define SDIO_IT_CMDREND ((uint32_t)0x00000040)
|
||||||
|
#define SDIO_IT_CMDSENT ((uint32_t)0x00000080)
|
||||||
|
#define SDIO_IT_DATAEND ((uint32_t)0x00000100)
|
||||||
|
#define SDIO_IT_STBITERR ((uint32_t)0x00000200)
|
||||||
|
#define SDIO_IT_DBCKEND ((uint32_t)0x00000400)
|
||||||
|
#define SDIO_IT_CMDACT ((uint32_t)0x00000800)
|
||||||
|
#define SDIO_IT_TXACT ((uint32_t)0x00001000)
|
||||||
|
#define SDIO_IT_RXACT ((uint32_t)0x00002000)
|
||||||
|
#define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000)
|
||||||
|
#define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000)
|
||||||
|
#define SDIO_IT_TXFIFOF ((uint32_t)0x00010000)
|
||||||
|
#define SDIO_IT_RXFIFOF ((uint32_t)0x00020000)
|
||||||
|
#define SDIO_IT_TXFIFOE ((uint32_t)0x00040000)
|
||||||
|
#define SDIO_IT_RXFIFOE ((uint32_t)0x00080000)
|
||||||
|
#define SDIO_IT_TXDAVL ((uint32_t)0x00100000)
|
||||||
|
#define SDIO_IT_RXDAVL ((uint32_t)0x00200000)
|
||||||
|
#define SDIO_IT_SDIOIT ((uint32_t)0x00400000)
|
||||||
|
#define SDIO_IT_CEATAEND ((uint32_t)0x00800000)
|
||||||
|
#define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Command_Index
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Response_Type
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_Response_No ((uint32_t)0x00000000)
|
||||||
|
#define SDIO_Response_Short ((uint32_t)0x00000040)
|
||||||
|
#define SDIO_Response_Long ((uint32_t)0x000000C0)
|
||||||
|
#define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \
|
||||||
|
((RESPONSE) == SDIO_Response_Short) || \
|
||||||
|
((RESPONSE) == SDIO_Response_Long))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Wait_Interrupt_State
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */
|
||||||
|
#define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */
|
||||||
|
#define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */
|
||||||
|
#define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \
|
||||||
|
((WAIT) == SDIO_Wait_Pend))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_CPSM_State
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_CPSM_Disable ((uint32_t)0x00000000)
|
||||||
|
#define SDIO_CPSM_Enable ((uint32_t)0x00000400)
|
||||||
|
#define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Response_Registers
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_RESP1 ((uint32_t)0x00000000)
|
||||||
|
#define SDIO_RESP2 ((uint32_t)0x00000004)
|
||||||
|
#define SDIO_RESP3 ((uint32_t)0x00000008)
|
||||||
|
#define SDIO_RESP4 ((uint32_t)0x0000000C)
|
||||||
|
#define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \
|
||||||
|
((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Data_Length
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Data_Block_Size
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_DataBlockSize_1b ((uint32_t)0x00000000)
|
||||||
|
#define SDIO_DataBlockSize_2b ((uint32_t)0x00000010)
|
||||||
|
#define SDIO_DataBlockSize_4b ((uint32_t)0x00000020)
|
||||||
|
#define SDIO_DataBlockSize_8b ((uint32_t)0x00000030)
|
||||||
|
#define SDIO_DataBlockSize_16b ((uint32_t)0x00000040)
|
||||||
|
#define SDIO_DataBlockSize_32b ((uint32_t)0x00000050)
|
||||||
|
#define SDIO_DataBlockSize_64b ((uint32_t)0x00000060)
|
||||||
|
#define SDIO_DataBlockSize_128b ((uint32_t)0x00000070)
|
||||||
|
#define SDIO_DataBlockSize_256b ((uint32_t)0x00000080)
|
||||||
|
#define SDIO_DataBlockSize_512b ((uint32_t)0x00000090)
|
||||||
|
#define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0)
|
||||||
|
#define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0)
|
||||||
|
#define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0)
|
||||||
|
#define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0)
|
||||||
|
#define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0)
|
||||||
|
#define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_2b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_4b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_8b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_16b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_32b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_64b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_128b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_256b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_512b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_1024b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_2048b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_4096b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_8192b) || \
|
||||||
|
((SIZE) == SDIO_DataBlockSize_16384b))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Transfer_Direction
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_TransferDir_ToCard ((uint32_t)0x00000000)
|
||||||
|
#define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002)
|
||||||
|
#define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \
|
||||||
|
((DIR) == SDIO_TransferDir_ToSDIO))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Transfer_Type
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_TransferMode_Block ((uint32_t)0x00000000)
|
||||||
|
#define SDIO_TransferMode_Stream ((uint32_t)0x00000004)
|
||||||
|
#define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \
|
||||||
|
((MODE) == SDIO_TransferMode_Block))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_DPSM_State
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_DPSM_Disable ((uint32_t)0x00000000)
|
||||||
|
#define SDIO_DPSM_Enable ((uint32_t)0x00000001)
|
||||||
|
#define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Flags
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001)
|
||||||
|
#define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002)
|
||||||
|
#define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004)
|
||||||
|
#define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008)
|
||||||
|
#define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010)
|
||||||
|
#define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020)
|
||||||
|
#define SDIO_FLAG_CMDREND ((uint32_t)0x00000040)
|
||||||
|
#define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080)
|
||||||
|
#define SDIO_FLAG_DATAEND ((uint32_t)0x00000100)
|
||||||
|
#define SDIO_FLAG_STBITERR ((uint32_t)0x00000200)
|
||||||
|
#define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400)
|
||||||
|
#define SDIO_FLAG_CMDACT ((uint32_t)0x00000800)
|
||||||
|
#define SDIO_FLAG_TXACT ((uint32_t)0x00001000)
|
||||||
|
#define SDIO_FLAG_RXACT ((uint32_t)0x00002000)
|
||||||
|
#define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000)
|
||||||
|
#define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000)
|
||||||
|
#define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000)
|
||||||
|
#define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000)
|
||||||
|
#define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000)
|
||||||
|
#define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000)
|
||||||
|
#define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000)
|
||||||
|
#define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000)
|
||||||
|
#define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000)
|
||||||
|
#define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000)
|
||||||
|
#define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \
|
||||||
|
((FLAG) == SDIO_FLAG_DCRCFAIL) || \
|
||||||
|
((FLAG) == SDIO_FLAG_CTIMEOUT) || \
|
||||||
|
((FLAG) == SDIO_FLAG_DTIMEOUT) || \
|
||||||
|
((FLAG) == SDIO_FLAG_TXUNDERR) || \
|
||||||
|
((FLAG) == SDIO_FLAG_RXOVERR) || \
|
||||||
|
((FLAG) == SDIO_FLAG_CMDREND) || \
|
||||||
|
((FLAG) == SDIO_FLAG_CMDSENT) || \
|
||||||
|
((FLAG) == SDIO_FLAG_DATAEND) || \
|
||||||
|
((FLAG) == SDIO_FLAG_STBITERR) || \
|
||||||
|
((FLAG) == SDIO_FLAG_DBCKEND) || \
|
||||||
|
((FLAG) == SDIO_FLAG_CMDACT) || \
|
||||||
|
((FLAG) == SDIO_FLAG_TXACT) || \
|
||||||
|
((FLAG) == SDIO_FLAG_RXACT) || \
|
||||||
|
((FLAG) == SDIO_FLAG_TXFIFOHE) || \
|
||||||
|
((FLAG) == SDIO_FLAG_RXFIFOHF) || \
|
||||||
|
((FLAG) == SDIO_FLAG_TXFIFOF) || \
|
||||||
|
((FLAG) == SDIO_FLAG_RXFIFOF) || \
|
||||||
|
((FLAG) == SDIO_FLAG_TXFIFOE) || \
|
||||||
|
((FLAG) == SDIO_FLAG_RXFIFOE) || \
|
||||||
|
((FLAG) == SDIO_FLAG_TXDAVL) || \
|
||||||
|
((FLAG) == SDIO_FLAG_RXDAVL) || \
|
||||||
|
((FLAG) == SDIO_FLAG_SDIOIT) || \
|
||||||
|
((FLAG) == SDIO_FLAG_CEATAEND))
|
||||||
|
|
||||||
|
#define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00))
|
||||||
|
|
||||||
|
#define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \
|
||||||
|
((IT) == SDIO_IT_DCRCFAIL) || \
|
||||||
|
((IT) == SDIO_IT_CTIMEOUT) || \
|
||||||
|
((IT) == SDIO_IT_DTIMEOUT) || \
|
||||||
|
((IT) == SDIO_IT_TXUNDERR) || \
|
||||||
|
((IT) == SDIO_IT_RXOVERR) || \
|
||||||
|
((IT) == SDIO_IT_CMDREND) || \
|
||||||
|
((IT) == SDIO_IT_CMDSENT) || \
|
||||||
|
((IT) == SDIO_IT_DATAEND) || \
|
||||||
|
((IT) == SDIO_IT_STBITERR) || \
|
||||||
|
((IT) == SDIO_IT_DBCKEND) || \
|
||||||
|
((IT) == SDIO_IT_CMDACT) || \
|
||||||
|
((IT) == SDIO_IT_TXACT) || \
|
||||||
|
((IT) == SDIO_IT_RXACT) || \
|
||||||
|
((IT) == SDIO_IT_TXFIFOHE) || \
|
||||||
|
((IT) == SDIO_IT_RXFIFOHF) || \
|
||||||
|
((IT) == SDIO_IT_TXFIFOF) || \
|
||||||
|
((IT) == SDIO_IT_RXFIFOF) || \
|
||||||
|
((IT) == SDIO_IT_TXFIFOE) || \
|
||||||
|
((IT) == SDIO_IT_RXFIFOE) || \
|
||||||
|
((IT) == SDIO_IT_TXDAVL) || \
|
||||||
|
((IT) == SDIO_IT_RXDAVL) || \
|
||||||
|
((IT) == SDIO_IT_SDIOIT) || \
|
||||||
|
((IT) == SDIO_IT_CEATAEND))
|
||||||
|
|
||||||
|
#define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Read_Wait_Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001)
|
||||||
|
#define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000)
|
||||||
|
#define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \
|
||||||
|
((MODE) == SDIO_ReadWaitMode_DATA2))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SDIO_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void SDIO_DeInit(void);
|
||||||
|
void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct);
|
||||||
|
void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct);
|
||||||
|
void SDIO_ClockCmd(FunctionalState NewState);
|
||||||
|
void SDIO_SetPowerState(uint32_t SDIO_PowerState);
|
||||||
|
uint32_t SDIO_GetPowerState(void);
|
||||||
|
void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState);
|
||||||
|
void SDIO_DMACmd(FunctionalState NewState);
|
||||||
|
void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
|
||||||
|
void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct);
|
||||||
|
uint8_t SDIO_GetCommandResponse(void);
|
||||||
|
uint32_t SDIO_GetResponse(uint32_t SDIO_RESP);
|
||||||
|
void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
|
||||||
|
void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
|
||||||
|
uint32_t SDIO_GetDataCounter(void);
|
||||||
|
uint32_t SDIO_ReadData(void);
|
||||||
|
void SDIO_WriteData(uint32_t Data);
|
||||||
|
uint32_t SDIO_GetFIFOCount(void);
|
||||||
|
void SDIO_StartSDIOReadWait(FunctionalState NewState);
|
||||||
|
void SDIO_StopSDIOReadWait(FunctionalState NewState);
|
||||||
|
void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode);
|
||||||
|
void SDIO_SetSDIOOperation(FunctionalState NewState);
|
||||||
|
void SDIO_SendSDIOSuspendCmd(FunctionalState NewState);
|
||||||
|
void SDIO_CommandCompletionCmd(FunctionalState NewState);
|
||||||
|
void SDIO_CEATAITCmd(FunctionalState NewState);
|
||||||
|
void SDIO_SendCEATACmd(FunctionalState NewState);
|
||||||
|
FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG);
|
||||||
|
void SDIO_ClearFlag(uint32_t SDIO_FLAG);
|
||||||
|
ITStatus SDIO_GetITStatus(uint32_t SDIO_IT);
|
||||||
|
void SDIO_ClearITPendingBit(uint32_t SDIO_IT);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_SDIO_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,487 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_spi.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the SPI firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_SPI_H
|
||||||
|
#define __STM32F10x_SPI_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup SPI
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief SPI Init structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
|
||||||
|
This parameter can be a value of @ref SPI_data_direction */
|
||||||
|
|
||||||
|
uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
|
||||||
|
This parameter can be a value of @ref SPI_mode */
|
||||||
|
|
||||||
|
uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
|
||||||
|
This parameter can be a value of @ref SPI_data_size */
|
||||||
|
|
||||||
|
uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
|
||||||
|
This parameter can be a value of @ref SPI_Clock_Polarity */
|
||||||
|
|
||||||
|
uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
|
||||||
|
This parameter can be a value of @ref SPI_Clock_Phase */
|
||||||
|
|
||||||
|
uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
|
||||||
|
hardware (NSS pin) or by software using the SSI bit.
|
||||||
|
This parameter can be a value of @ref SPI_Slave_Select_management */
|
||||||
|
|
||||||
|
uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
|
||||||
|
used to configure the transmit and receive SCK clock.
|
||||||
|
This parameter can be a value of @ref SPI_BaudRate_Prescaler.
|
||||||
|
@note The communication clock is derived from the master
|
||||||
|
clock. The slave clock does not need to be set. */
|
||||||
|
|
||||||
|
uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
|
||||||
|
This parameter can be a value of @ref SPI_MSB_LSB_transmission */
|
||||||
|
|
||||||
|
uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
|
||||||
|
}SPI_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief I2S Init structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
|
||||||
|
uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
|
||||||
|
This parameter can be a value of @ref I2S_Mode */
|
||||||
|
|
||||||
|
uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
|
||||||
|
This parameter can be a value of @ref I2S_Standard */
|
||||||
|
|
||||||
|
uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
|
||||||
|
This parameter can be a value of @ref I2S_Data_Format */
|
||||||
|
|
||||||
|
uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
|
||||||
|
This parameter can be a value of @ref I2S_MCLK_Output */
|
||||||
|
|
||||||
|
uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
|
||||||
|
This parameter can be a value of @ref I2S_Audio_Frequency */
|
||||||
|
|
||||||
|
uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
|
||||||
|
This parameter can be a value of @ref I2S_Clock_Polarity */
|
||||||
|
}I2S_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
|
||||||
|
((PERIPH) == SPI2) || \
|
||||||
|
((PERIPH) == SPI3))
|
||||||
|
|
||||||
|
#define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
|
||||||
|
((PERIPH) == SPI3))
|
||||||
|
|
||||||
|
/** @defgroup SPI_data_direction
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
|
||||||
|
#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
|
||||||
|
#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
|
||||||
|
#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
|
||||||
|
#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
|
||||||
|
((MODE) == SPI_Direction_2Lines_RxOnly) || \
|
||||||
|
((MODE) == SPI_Direction_1Line_Rx) || \
|
||||||
|
((MODE) == SPI_Direction_1Line_Tx))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_Mode_Master ((uint16_t)0x0104)
|
||||||
|
#define SPI_Mode_Slave ((uint16_t)0x0000)
|
||||||
|
#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
|
||||||
|
((MODE) == SPI_Mode_Slave))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_data_size
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_DataSize_16b ((uint16_t)0x0800)
|
||||||
|
#define SPI_DataSize_8b ((uint16_t)0x0000)
|
||||||
|
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
|
||||||
|
((DATASIZE) == SPI_DataSize_8b))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_Clock_Polarity
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_CPOL_Low ((uint16_t)0x0000)
|
||||||
|
#define SPI_CPOL_High ((uint16_t)0x0002)
|
||||||
|
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
|
||||||
|
((CPOL) == SPI_CPOL_High))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_Clock_Phase
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_CPHA_1Edge ((uint16_t)0x0000)
|
||||||
|
#define SPI_CPHA_2Edge ((uint16_t)0x0001)
|
||||||
|
#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
|
||||||
|
((CPHA) == SPI_CPHA_2Edge))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_Slave_Select_management
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_NSS_Soft ((uint16_t)0x0200)
|
||||||
|
#define SPI_NSS_Hard ((uint16_t)0x0000)
|
||||||
|
#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
|
||||||
|
((NSS) == SPI_NSS_Hard))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_BaudRate_Prescaler
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
|
||||||
|
#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
|
||||||
|
#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
|
||||||
|
#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
|
||||||
|
#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
|
||||||
|
#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
|
||||||
|
#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
|
||||||
|
#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
|
||||||
|
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
|
||||||
|
((PRESCALER) == SPI_BaudRatePrescaler_4) || \
|
||||||
|
((PRESCALER) == SPI_BaudRatePrescaler_8) || \
|
||||||
|
((PRESCALER) == SPI_BaudRatePrescaler_16) || \
|
||||||
|
((PRESCALER) == SPI_BaudRatePrescaler_32) || \
|
||||||
|
((PRESCALER) == SPI_BaudRatePrescaler_64) || \
|
||||||
|
((PRESCALER) == SPI_BaudRatePrescaler_128) || \
|
||||||
|
((PRESCALER) == SPI_BaudRatePrescaler_256))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_MSB_LSB_transmission
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_FirstBit_MSB ((uint16_t)0x0000)
|
||||||
|
#define SPI_FirstBit_LSB ((uint16_t)0x0080)
|
||||||
|
#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
|
||||||
|
((BIT) == SPI_FirstBit_LSB))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2S_Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2S_Mode_SlaveTx ((uint16_t)0x0000)
|
||||||
|
#define I2S_Mode_SlaveRx ((uint16_t)0x0100)
|
||||||
|
#define I2S_Mode_MasterTx ((uint16_t)0x0200)
|
||||||
|
#define I2S_Mode_MasterRx ((uint16_t)0x0300)
|
||||||
|
#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
|
||||||
|
((MODE) == I2S_Mode_SlaveRx) || \
|
||||||
|
((MODE) == I2S_Mode_MasterTx) || \
|
||||||
|
((MODE) == I2S_Mode_MasterRx) )
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2S_Standard
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2S_Standard_Phillips ((uint16_t)0x0000)
|
||||||
|
#define I2S_Standard_MSB ((uint16_t)0x0010)
|
||||||
|
#define I2S_Standard_LSB ((uint16_t)0x0020)
|
||||||
|
#define I2S_Standard_PCMShort ((uint16_t)0x0030)
|
||||||
|
#define I2S_Standard_PCMLong ((uint16_t)0x00B0)
|
||||||
|
#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
|
||||||
|
((STANDARD) == I2S_Standard_MSB) || \
|
||||||
|
((STANDARD) == I2S_Standard_LSB) || \
|
||||||
|
((STANDARD) == I2S_Standard_PCMShort) || \
|
||||||
|
((STANDARD) == I2S_Standard_PCMLong))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2S_Data_Format
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2S_DataFormat_16b ((uint16_t)0x0000)
|
||||||
|
#define I2S_DataFormat_16bextended ((uint16_t)0x0001)
|
||||||
|
#define I2S_DataFormat_24b ((uint16_t)0x0003)
|
||||||
|
#define I2S_DataFormat_32b ((uint16_t)0x0005)
|
||||||
|
#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
|
||||||
|
((FORMAT) == I2S_DataFormat_16bextended) || \
|
||||||
|
((FORMAT) == I2S_DataFormat_24b) || \
|
||||||
|
((FORMAT) == I2S_DataFormat_32b))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2S_MCLK_Output
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
|
||||||
|
#define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
|
||||||
|
#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
|
||||||
|
((OUTPUT) == I2S_MCLKOutput_Disable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2S_Audio_Frequency
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2S_AudioFreq_192k ((uint32_t)192000)
|
||||||
|
#define I2S_AudioFreq_96k ((uint32_t)96000)
|
||||||
|
#define I2S_AudioFreq_48k ((uint32_t)48000)
|
||||||
|
#define I2S_AudioFreq_44k ((uint32_t)44100)
|
||||||
|
#define I2S_AudioFreq_32k ((uint32_t)32000)
|
||||||
|
#define I2S_AudioFreq_22k ((uint32_t)22050)
|
||||||
|
#define I2S_AudioFreq_16k ((uint32_t)16000)
|
||||||
|
#define I2S_AudioFreq_11k ((uint32_t)11025)
|
||||||
|
#define I2S_AudioFreq_8k ((uint32_t)8000)
|
||||||
|
#define I2S_AudioFreq_Default ((uint32_t)2)
|
||||||
|
|
||||||
|
#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
|
||||||
|
((FREQ) <= I2S_AudioFreq_192k)) || \
|
||||||
|
((FREQ) == I2S_AudioFreq_Default))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2S_Clock_Polarity
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define I2S_CPOL_Low ((uint16_t)0x0000)
|
||||||
|
#define I2S_CPOL_High ((uint16_t)0x0008)
|
||||||
|
#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
|
||||||
|
((CPOL) == I2S_CPOL_High))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_I2S_DMA_transfer_requests
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
|
||||||
|
#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
|
||||||
|
#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_NSS_internal_software_management
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
|
||||||
|
#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
|
||||||
|
#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
|
||||||
|
((INTERNAL) == SPI_NSSInternalSoft_Reset))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_CRC_Transmit_Receive
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_CRC_Tx ((uint8_t)0x00)
|
||||||
|
#define SPI_CRC_Rx ((uint8_t)0x01)
|
||||||
|
#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_direction_transmit_receive
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_Direction_Rx ((uint16_t)0xBFFF)
|
||||||
|
#define SPI_Direction_Tx ((uint16_t)0x4000)
|
||||||
|
#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
|
||||||
|
((DIRECTION) == SPI_Direction_Tx))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_I2S_interrupts_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_I2S_IT_TXE ((uint8_t)0x71)
|
||||||
|
#define SPI_I2S_IT_RXNE ((uint8_t)0x60)
|
||||||
|
#define SPI_I2S_IT_ERR ((uint8_t)0x50)
|
||||||
|
#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
|
||||||
|
((IT) == SPI_I2S_IT_RXNE) || \
|
||||||
|
((IT) == SPI_I2S_IT_ERR))
|
||||||
|
#define SPI_I2S_IT_OVR ((uint8_t)0x56)
|
||||||
|
#define SPI_IT_MODF ((uint8_t)0x55)
|
||||||
|
#define SPI_IT_CRCERR ((uint8_t)0x54)
|
||||||
|
#define I2S_IT_UDR ((uint8_t)0x53)
|
||||||
|
#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
|
||||||
|
#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
|
||||||
|
((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
|
||||||
|
((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_I2S_flags_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
|
||||||
|
#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
|
||||||
|
#define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
|
||||||
|
#define I2S_FLAG_UDR ((uint16_t)0x0008)
|
||||||
|
#define SPI_FLAG_CRCERR ((uint16_t)0x0010)
|
||||||
|
#define SPI_FLAG_MODF ((uint16_t)0x0020)
|
||||||
|
#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
|
||||||
|
#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
|
||||||
|
#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
|
||||||
|
#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
|
||||||
|
((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
|
||||||
|
((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
|
||||||
|
((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_CRC_polynomial
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SPI_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
|
||||||
|
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
|
||||||
|
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
|
||||||
|
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
|
||||||
|
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
|
||||||
|
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||||
|
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||||
|
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
|
||||||
|
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
|
||||||
|
void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
|
||||||
|
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
|
||||||
|
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
|
||||||
|
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||||
|
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
|
||||||
|
void SPI_TransmitCRC(SPI_TypeDef* SPIx);
|
||||||
|
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
|
||||||
|
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
|
||||||
|
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
|
||||||
|
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
|
||||||
|
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
|
||||||
|
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
|
||||||
|
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
|
||||||
|
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__STM32F10x_SPI_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,412 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_usart.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the USART
|
||||||
|
* firmware library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_USART_H
|
||||||
|
#define __STM32F10x_USART_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup USART
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief USART Init Structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate.
|
||||||
|
The baud rate is computed using the following formula:
|
||||||
|
- IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate)))
|
||||||
|
- FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */
|
||||||
|
|
||||||
|
uint16_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
|
||||||
|
This parameter can be a value of @ref USART_Word_Length */
|
||||||
|
|
||||||
|
uint16_t USART_StopBits; /*!< Specifies the number of stop bits transmitted.
|
||||||
|
This parameter can be a value of @ref USART_Stop_Bits */
|
||||||
|
|
||||||
|
uint16_t USART_Parity; /*!< Specifies the parity mode.
|
||||||
|
This parameter can be a value of @ref USART_Parity
|
||||||
|
@note When parity is enabled, the computed parity is inserted
|
||||||
|
at the MSB position of the transmitted data (9th bit when
|
||||||
|
the word length is set to 9 data bits; 8th bit when the
|
||||||
|
word length is set to 8 data bits). */
|
||||||
|
|
||||||
|
uint16_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
|
||||||
|
This parameter can be a value of @ref USART_Mode */
|
||||||
|
|
||||||
|
uint16_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled
|
||||||
|
or disabled.
|
||||||
|
This parameter can be a value of @ref USART_Hardware_Flow_Control */
|
||||||
|
} USART_InitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief USART Clock Init Structure definition
|
||||||
|
*/
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
|
||||||
|
uint16_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled.
|
||||||
|
This parameter can be a value of @ref USART_Clock */
|
||||||
|
|
||||||
|
uint16_t USART_CPOL; /*!< Specifies the steady state value of the serial clock.
|
||||||
|
This parameter can be a value of @ref USART_Clock_Polarity */
|
||||||
|
|
||||||
|
uint16_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made.
|
||||||
|
This parameter can be a value of @ref USART_Clock_Phase */
|
||||||
|
|
||||||
|
uint16_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
|
||||||
|
data bit (MSB) has to be output on the SCLK pin in synchronous mode.
|
||||||
|
This parameter can be a value of @ref USART_Last_Bit */
|
||||||
|
} USART_ClockInitTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
||||||
|
((PERIPH) == USART2) || \
|
||||||
|
((PERIPH) == USART3) || \
|
||||||
|
((PERIPH) == UART4) || \
|
||||||
|
((PERIPH) == UART5))
|
||||||
|
|
||||||
|
#define IS_USART_123_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
||||||
|
((PERIPH) == USART2) || \
|
||||||
|
((PERIPH) == USART3))
|
||||||
|
|
||||||
|
#define IS_USART_1234_PERIPH(PERIPH) (((PERIPH) == USART1) || \
|
||||||
|
((PERIPH) == USART2) || \
|
||||||
|
((PERIPH) == USART3) || \
|
||||||
|
((PERIPH) == UART4))
|
||||||
|
/** @defgroup USART_Word_Length
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USART_WordLength_8b ((uint16_t)0x0000)
|
||||||
|
#define USART_WordLength_9b ((uint16_t)0x1000)
|
||||||
|
|
||||||
|
#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \
|
||||||
|
((LENGTH) == USART_WordLength_9b))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Stop_Bits
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USART_StopBits_1 ((uint16_t)0x0000)
|
||||||
|
#define USART_StopBits_0_5 ((uint16_t)0x1000)
|
||||||
|
#define USART_StopBits_2 ((uint16_t)0x2000)
|
||||||
|
#define USART_StopBits_1_5 ((uint16_t)0x3000)
|
||||||
|
#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \
|
||||||
|
((STOPBITS) == USART_StopBits_0_5) || \
|
||||||
|
((STOPBITS) == USART_StopBits_2) || \
|
||||||
|
((STOPBITS) == USART_StopBits_1_5))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Parity
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USART_Parity_No ((uint16_t)0x0000)
|
||||||
|
#define USART_Parity_Even ((uint16_t)0x0400)
|
||||||
|
#define USART_Parity_Odd ((uint16_t)0x0600)
|
||||||
|
#define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \
|
||||||
|
((PARITY) == USART_Parity_Even) || \
|
||||||
|
((PARITY) == USART_Parity_Odd))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USART_Mode_Rx ((uint16_t)0x0004)
|
||||||
|
#define USART_Mode_Tx ((uint16_t)0x0008)
|
||||||
|
#define IS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Hardware_Flow_Control
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define USART_HardwareFlowControl_None ((uint16_t)0x0000)
|
||||||
|
#define USART_HardwareFlowControl_RTS ((uint16_t)0x0100)
|
||||||
|
#define USART_HardwareFlowControl_CTS ((uint16_t)0x0200)
|
||||||
|
#define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300)
|
||||||
|
#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\
|
||||||
|
(((CONTROL) == USART_HardwareFlowControl_None) || \
|
||||||
|
((CONTROL) == USART_HardwareFlowControl_RTS) || \
|
||||||
|
((CONTROL) == USART_HardwareFlowControl_CTS) || \
|
||||||
|
((CONTROL) == USART_HardwareFlowControl_RTS_CTS))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Clock
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define USART_Clock_Disable ((uint16_t)0x0000)
|
||||||
|
#define USART_Clock_Enable ((uint16_t)0x0800)
|
||||||
|
#define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \
|
||||||
|
((CLOCK) == USART_Clock_Enable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Clock_Polarity
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USART_CPOL_Low ((uint16_t)0x0000)
|
||||||
|
#define USART_CPOL_High ((uint16_t)0x0400)
|
||||||
|
#define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Clock_Phase
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USART_CPHA_1Edge ((uint16_t)0x0000)
|
||||||
|
#define USART_CPHA_2Edge ((uint16_t)0x0200)
|
||||||
|
#define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Last_Bit
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USART_LastBit_Disable ((uint16_t)0x0000)
|
||||||
|
#define USART_LastBit_Enable ((uint16_t)0x0100)
|
||||||
|
#define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \
|
||||||
|
((LASTBIT) == USART_LastBit_Enable))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Interrupt_definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USART_IT_PE ((uint16_t)0x0028)
|
||||||
|
#define USART_IT_TXE ((uint16_t)0x0727)
|
||||||
|
#define USART_IT_TC ((uint16_t)0x0626)
|
||||||
|
#define USART_IT_RXNE ((uint16_t)0x0525)
|
||||||
|
#define USART_IT_IDLE ((uint16_t)0x0424)
|
||||||
|
#define USART_IT_LBD ((uint16_t)0x0846)
|
||||||
|
#define USART_IT_CTS ((uint16_t)0x096A)
|
||||||
|
#define USART_IT_ERR ((uint16_t)0x0060)
|
||||||
|
#define USART_IT_ORE ((uint16_t)0x0360)
|
||||||
|
#define USART_IT_NE ((uint16_t)0x0260)
|
||||||
|
#define USART_IT_FE ((uint16_t)0x0160)
|
||||||
|
#define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
|
||||||
|
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||||
|
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
|
||||||
|
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR))
|
||||||
|
#define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \
|
||||||
|
((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||||
|
((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \
|
||||||
|
((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \
|
||||||
|
((IT) == USART_IT_NE) || ((IT) == USART_IT_FE))
|
||||||
|
#define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \
|
||||||
|
((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_DMA_Requests
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USART_DMAReq_Tx ((uint16_t)0x0080)
|
||||||
|
#define USART_DMAReq_Rx ((uint16_t)0x0040)
|
||||||
|
#define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_WakeUp_methods
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USART_WakeUp_IdleLine ((uint16_t)0x0000)
|
||||||
|
#define USART_WakeUp_AddressMark ((uint16_t)0x0800)
|
||||||
|
#define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \
|
||||||
|
((WAKEUP) == USART_WakeUp_AddressMark))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_LIN_Break_Detection_Length
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USART_LINBreakDetectLength_10b ((uint16_t)0x0000)
|
||||||
|
#define USART_LINBreakDetectLength_11b ((uint16_t)0x0020)
|
||||||
|
#define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \
|
||||||
|
(((LENGTH) == USART_LINBreakDetectLength_10b) || \
|
||||||
|
((LENGTH) == USART_LINBreakDetectLength_11b))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_IrDA_Low_Power
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USART_IrDAMode_LowPower ((uint16_t)0x0004)
|
||||||
|
#define USART_IrDAMode_Normal ((uint16_t)0x0000)
|
||||||
|
#define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \
|
||||||
|
((MODE) == USART_IrDAMode_Normal))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Flags
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USART_FLAG_CTS ((uint16_t)0x0200)
|
||||||
|
#define USART_FLAG_LBD ((uint16_t)0x0100)
|
||||||
|
#define USART_FLAG_TXE ((uint16_t)0x0080)
|
||||||
|
#define USART_FLAG_TC ((uint16_t)0x0040)
|
||||||
|
#define USART_FLAG_RXNE ((uint16_t)0x0020)
|
||||||
|
#define USART_FLAG_IDLE ((uint16_t)0x0010)
|
||||||
|
#define USART_FLAG_ORE ((uint16_t)0x0008)
|
||||||
|
#define USART_FLAG_NE ((uint16_t)0x0004)
|
||||||
|
#define USART_FLAG_FE ((uint16_t)0x0002)
|
||||||
|
#define USART_FLAG_PE ((uint16_t)0x0001)
|
||||||
|
#define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \
|
||||||
|
((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \
|
||||||
|
((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \
|
||||||
|
((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \
|
||||||
|
((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE))
|
||||||
|
|
||||||
|
#define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00))
|
||||||
|
#define IS_USART_PERIPH_FLAG(PERIPH, USART_FLAG) ((((*(uint32_t*)&(PERIPH)) != UART4_BASE) &&\
|
||||||
|
((*(uint32_t*)&(PERIPH)) != UART5_BASE)) \
|
||||||
|
|| ((USART_FLAG) != USART_FLAG_CTS))
|
||||||
|
#define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21))
|
||||||
|
#define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF)
|
||||||
|
#define IS_USART_DATA(DATA) ((DATA) <= 0x1FF)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup USART_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void USART_DeInit(USART_TypeDef* USARTx);
|
||||||
|
void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct);
|
||||||
|
void USART_StructInit(USART_InitTypeDef* USART_InitStruct);
|
||||||
|
void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct);
|
||||||
|
void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct);
|
||||||
|
void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||||
|
void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState);
|
||||||
|
void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState);
|
||||||
|
void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address);
|
||||||
|
void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp);
|
||||||
|
void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||||
|
void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength);
|
||||||
|
void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||||
|
void USART_SendData(USART_TypeDef* USARTx, uint16_t Data);
|
||||||
|
uint16_t USART_ReceiveData(USART_TypeDef* USARTx);
|
||||||
|
void USART_SendBreak(USART_TypeDef* USARTx);
|
||||||
|
void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime);
|
||||||
|
void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler);
|
||||||
|
void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||||
|
void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||||
|
void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||||
|
void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||||
|
void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||||
|
void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode);
|
||||||
|
void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState);
|
||||||
|
FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG);
|
||||||
|
void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG);
|
||||||
|
ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT);
|
||||||
|
void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_USART_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,115 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_wwdg.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file contains all the functions prototypes for the WWDG firmware
|
||||||
|
* library.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F10x_WWDG_H
|
||||||
|
#define __STM32F10x_WWDG_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup WWDG
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Exported_Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Prescaler
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define WWDG_Prescaler_1 ((uint32_t)0x00000000)
|
||||||
|
#define WWDG_Prescaler_2 ((uint32_t)0x00000080)
|
||||||
|
#define WWDG_Prescaler_4 ((uint32_t)0x00000100)
|
||||||
|
#define WWDG_Prescaler_8 ((uint32_t)0x00000180)
|
||||||
|
#define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
|
||||||
|
((PRESCALER) == WWDG_Prescaler_2) || \
|
||||||
|
((PRESCALER) == WWDG_Prescaler_4) || \
|
||||||
|
((PRESCALER) == WWDG_Prescaler_8))
|
||||||
|
#define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
|
||||||
|
#define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup WWDG_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
void WWDG_DeInit(void);
|
||||||
|
void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
|
||||||
|
void WWDG_SetWindowValue(uint8_t WindowValue);
|
||||||
|
void WWDG_EnableIT(void);
|
||||||
|
void WWDG_SetCounter(uint8_t Counter);
|
||||||
|
void WWDG_Enable(uint8_t Counter);
|
||||||
|
FlagStatus WWDG_GetFlagStatus(void);
|
||||||
|
void WWDG_ClearFlag(void);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F10x_WWDG_H */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,225 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file misc.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file provides all the miscellaneous firmware functions (add-on
|
||||||
|
* to CMSIS functions).
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "misc.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup MISC
|
||||||
|
* @brief MISC driver modules
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup MISC_Private_TypesDefinitions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup MISC_Private_Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup MISC_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup MISC_Private_Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup MISC_Private_FunctionPrototypes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup MISC_Private_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configures the priority grouping: pre-emption priority and subpriority.
|
||||||
|
* @param NVIC_PriorityGroup: specifies the priority grouping bits length.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
|
||||||
|
* 4 bits for subpriority
|
||||||
|
* @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
|
||||||
|
* 3 bits for subpriority
|
||||||
|
* @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
|
||||||
|
* 2 bits for subpriority
|
||||||
|
* @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
|
||||||
|
* 1 bits for subpriority
|
||||||
|
* @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
|
||||||
|
* 0 bits for subpriority
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
|
||||||
|
|
||||||
|
/* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
|
||||||
|
SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initializes the NVIC peripheral according to the specified
|
||||||
|
* parameters in the NVIC_InitStruct.
|
||||||
|
* @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
|
||||||
|
* the configuration information for the specified NVIC peripheral.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
|
||||||
|
{
|
||||||
|
uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
|
||||||
|
assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
|
||||||
|
assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
|
||||||
|
|
||||||
|
if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
|
||||||
|
{
|
||||||
|
/* Compute the Corresponding IRQ Priority --------------------------------*/
|
||||||
|
tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
|
||||||
|
tmppre = (0x4 - tmppriority);
|
||||||
|
tmpsub = tmpsub >> tmppriority;
|
||||||
|
|
||||||
|
tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
|
||||||
|
tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
|
||||||
|
tmppriority = tmppriority << 0x04;
|
||||||
|
|
||||||
|
NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
|
||||||
|
|
||||||
|
/* Enable the Selected IRQ Channels --------------------------------------*/
|
||||||
|
NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
|
||||||
|
(uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Disable the Selected IRQ Channels -------------------------------------*/
|
||||||
|
NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
|
||||||
|
(uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Sets the vector table location and Offset.
|
||||||
|
* @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg NVIC_VectTab_RAM
|
||||||
|
* @arg NVIC_VectTab_FLASH
|
||||||
|
* @param Offset: Vector Table base offset field. This value must be a multiple
|
||||||
|
* of 0x200.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
|
||||||
|
assert_param(IS_NVIC_OFFSET(Offset));
|
||||||
|
|
||||||
|
SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Selects the condition for the system to enter low power mode.
|
||||||
|
* @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg NVIC_LP_SEVONPEND
|
||||||
|
* @arg NVIC_LP_SLEEPDEEP
|
||||||
|
* @arg NVIC_LP_SLEEPONEXIT
|
||||||
|
* @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_NVIC_LP(LowPowerMode));
|
||||||
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||||
|
|
||||||
|
if (NewState != DISABLE)
|
||||||
|
{
|
||||||
|
SCB->SCR |= LowPowerMode;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configures the SysTick clock source.
|
||||||
|
* @param SysTick_CLKSource: specifies the SysTick clock source.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
|
||||||
|
* @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
|
||||||
|
if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
|
||||||
|
{
|
||||||
|
SysTick->CTRL |= SysTick_CLKSource_HCLK;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,308 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_bkp.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file provides all the BKP firmware functions.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x_bkp.h"
|
||||||
|
#include "stm32f10x_rcc.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup BKP
|
||||||
|
* @brief BKP driver modules
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup BKP_Private_TypesDefinitions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup BKP_Private_Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* ------------ BKP registers bit address in the alias region --------------- */
|
||||||
|
#define BKP_OFFSET (BKP_BASE - PERIPH_BASE)
|
||||||
|
|
||||||
|
/* --- CR Register ----*/
|
||||||
|
|
||||||
|
/* Alias word address of TPAL bit */
|
||||||
|
#define CR_OFFSET (BKP_OFFSET + 0x30)
|
||||||
|
#define TPAL_BitNumber 0x01
|
||||||
|
#define CR_TPAL_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPAL_BitNumber * 4))
|
||||||
|
|
||||||
|
/* Alias word address of TPE bit */
|
||||||
|
#define TPE_BitNumber 0x00
|
||||||
|
#define CR_TPE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPE_BitNumber * 4))
|
||||||
|
|
||||||
|
/* --- CSR Register ---*/
|
||||||
|
|
||||||
|
/* Alias word address of TPIE bit */
|
||||||
|
#define CSR_OFFSET (BKP_OFFSET + 0x34)
|
||||||
|
#define TPIE_BitNumber 0x02
|
||||||
|
#define CSR_TPIE_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TPIE_BitNumber * 4))
|
||||||
|
|
||||||
|
/* Alias word address of TIF bit */
|
||||||
|
#define TIF_BitNumber 0x09
|
||||||
|
#define CSR_TIF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TIF_BitNumber * 4))
|
||||||
|
|
||||||
|
/* Alias word address of TEF bit */
|
||||||
|
#define TEF_BitNumber 0x08
|
||||||
|
#define CSR_TEF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEF_BitNumber * 4))
|
||||||
|
|
||||||
|
/* ---------------------- BKP registers bit mask ------------------------ */
|
||||||
|
|
||||||
|
/* RTCCR register bit mask */
|
||||||
|
#define RTCCR_CAL_MASK ((uint16_t)0xFF80)
|
||||||
|
#define RTCCR_MASK ((uint16_t)0xFC7F)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup BKP_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup BKP_Private_Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup BKP_Private_FunctionPrototypes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup BKP_Private_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Deinitializes the BKP peripheral registers to their default reset values.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void BKP_DeInit(void)
|
||||||
|
{
|
||||||
|
RCC_BackupResetCmd(ENABLE);
|
||||||
|
RCC_BackupResetCmd(DISABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configures the Tamper Pin active level.
|
||||||
|
* @param BKP_TamperPinLevel: specifies the Tamper Pin active level.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg BKP_TamperPinLevel_High: Tamper pin active on high level
|
||||||
|
* @arg BKP_TamperPinLevel_Low: Tamper pin active on low level
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_BKP_TAMPER_PIN_LEVEL(BKP_TamperPinLevel));
|
||||||
|
*(__IO uint32_t *) CR_TPAL_BB = BKP_TamperPinLevel;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables or disables the Tamper Pin activation.
|
||||||
|
* @param NewState: new state of the Tamper Pin activation.
|
||||||
|
* This parameter can be: ENABLE or DISABLE.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void BKP_TamperPinCmd(FunctionalState NewState)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||||
|
*(__IO uint32_t *) CR_TPE_BB = (uint32_t)NewState;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables or disables the Tamper Pin Interrupt.
|
||||||
|
* @param NewState: new state of the Tamper Pin Interrupt.
|
||||||
|
* This parameter can be: ENABLE or DISABLE.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void BKP_ITConfig(FunctionalState NewState)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||||
|
*(__IO uint32_t *) CSR_TPIE_BB = (uint32_t)NewState;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Select the RTC output source to output on the Tamper pin.
|
||||||
|
* @param BKP_RTCOutputSource: specifies the RTC output source.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg BKP_RTCOutputSource_None: no RTC output on the Tamper pin.
|
||||||
|
* @arg BKP_RTCOutputSource_CalibClock: output the RTC clock with frequency
|
||||||
|
* divided by 64 on the Tamper pin.
|
||||||
|
* @arg BKP_RTCOutputSource_Alarm: output the RTC Alarm pulse signal on
|
||||||
|
* the Tamper pin.
|
||||||
|
* @arg BKP_RTCOutputSource_Second: output the RTC Second pulse signal on
|
||||||
|
* the Tamper pin.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource)
|
||||||
|
{
|
||||||
|
uint16_t tmpreg = 0;
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_BKP_RTC_OUTPUT_SOURCE(BKP_RTCOutputSource));
|
||||||
|
tmpreg = BKP->RTCCR;
|
||||||
|
/* Clear CCO, ASOE and ASOS bits */
|
||||||
|
tmpreg &= RTCCR_MASK;
|
||||||
|
|
||||||
|
/* Set CCO, ASOE and ASOS bits according to BKP_RTCOutputSource value */
|
||||||
|
tmpreg |= BKP_RTCOutputSource;
|
||||||
|
/* Store the new value */
|
||||||
|
BKP->RTCCR = tmpreg;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Sets RTC Clock Calibration value.
|
||||||
|
* @param CalibrationValue: specifies the RTC Clock Calibration value.
|
||||||
|
* This parameter must be a number between 0 and 0x7F.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue)
|
||||||
|
{
|
||||||
|
uint16_t tmpreg = 0;
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_BKP_CALIBRATION_VALUE(CalibrationValue));
|
||||||
|
tmpreg = BKP->RTCCR;
|
||||||
|
/* Clear CAL[6:0] bits */
|
||||||
|
tmpreg &= RTCCR_CAL_MASK;
|
||||||
|
/* Set CAL[6:0] bits according to CalibrationValue value */
|
||||||
|
tmpreg |= CalibrationValue;
|
||||||
|
/* Store the new value */
|
||||||
|
BKP->RTCCR = tmpreg;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Writes user data to the specified Data Backup Register.
|
||||||
|
* @param BKP_DR: specifies the Data Backup Register.
|
||||||
|
* This parameter can be BKP_DRx where x:[1, 42]
|
||||||
|
* @param Data: data to write
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data)
|
||||||
|
{
|
||||||
|
__IO uint32_t tmp = 0;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_BKP_DR(BKP_DR));
|
||||||
|
|
||||||
|
tmp = (uint32_t)BKP_BASE;
|
||||||
|
tmp += BKP_DR;
|
||||||
|
|
||||||
|
*(__IO uint32_t *) tmp = Data;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reads data from the specified Data Backup Register.
|
||||||
|
* @param BKP_DR: specifies the Data Backup Register.
|
||||||
|
* This parameter can be BKP_DRx where x:[1, 42]
|
||||||
|
* @retval The content of the specified Data Backup Register
|
||||||
|
*/
|
||||||
|
uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR)
|
||||||
|
{
|
||||||
|
__IO uint32_t tmp = 0;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_BKP_DR(BKP_DR));
|
||||||
|
|
||||||
|
tmp = (uint32_t)BKP_BASE;
|
||||||
|
tmp += BKP_DR;
|
||||||
|
|
||||||
|
return (*(__IO uint16_t *) tmp);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Checks whether the Tamper Pin Event flag is set or not.
|
||||||
|
* @param None
|
||||||
|
* @retval The new state of the Tamper Pin Event flag (SET or RESET).
|
||||||
|
*/
|
||||||
|
FlagStatus BKP_GetFlagStatus(void)
|
||||||
|
{
|
||||||
|
return (FlagStatus)(*(__IO uint32_t *) CSR_TEF_BB);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Clears Tamper Pin Event pending flag.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void BKP_ClearFlag(void)
|
||||||
|
{
|
||||||
|
/* Set CTE bit to clear Tamper Pin Event flag */
|
||||||
|
BKP->CSR |= BKP_CSR_CTE;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Checks whether the Tamper Pin Interrupt has occurred or not.
|
||||||
|
* @param None
|
||||||
|
* @retval The new state of the Tamper Pin Interrupt (SET or RESET).
|
||||||
|
*/
|
||||||
|
ITStatus BKP_GetITStatus(void)
|
||||||
|
{
|
||||||
|
return (ITStatus)(*(__IO uint32_t *) CSR_TIF_BB);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Clears Tamper Pin Interrupt pending bit.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void BKP_ClearITPendingBit(void)
|
||||||
|
{
|
||||||
|
/* Set CTI bit to clear Tamper Pin Interrupt pending bit */
|
||||||
|
BKP->CSR |= BKP_CSR_CTI;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,433 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_cec.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file provides all the CEC firmware functions.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x_cec.h"
|
||||||
|
#include "stm32f10x_rcc.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CEC
|
||||||
|
* @brief CEC driver modules
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CEC_Private_TypesDefinitions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup CEC_Private_Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* ------------ CEC registers bit address in the alias region ----------- */
|
||||||
|
#define CEC_OFFSET (CEC_BASE - PERIPH_BASE)
|
||||||
|
|
||||||
|
/* --- CFGR Register ---*/
|
||||||
|
|
||||||
|
/* Alias word address of PE bit */
|
||||||
|
#define CFGR_OFFSET (CEC_OFFSET + 0x00)
|
||||||
|
#define PE_BitNumber 0x00
|
||||||
|
#define CFGR_PE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (PE_BitNumber * 4))
|
||||||
|
|
||||||
|
/* Alias word address of IE bit */
|
||||||
|
#define IE_BitNumber 0x01
|
||||||
|
#define CFGR_IE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (IE_BitNumber * 4))
|
||||||
|
|
||||||
|
/* --- CSR Register ---*/
|
||||||
|
|
||||||
|
/* Alias word address of TSOM bit */
|
||||||
|
#define CSR_OFFSET (CEC_OFFSET + 0x10)
|
||||||
|
#define TSOM_BitNumber 0x00
|
||||||
|
#define CSR_TSOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TSOM_BitNumber * 4))
|
||||||
|
|
||||||
|
/* Alias word address of TEOM bit */
|
||||||
|
#define TEOM_BitNumber 0x01
|
||||||
|
#define CSR_TEOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEOM_BitNumber * 4))
|
||||||
|
|
||||||
|
#define CFGR_CLEAR_Mask (uint8_t)(0xF3) /* CFGR register Mask */
|
||||||
|
#define FLAG_Mask ((uint32_t)0x00FFFFFF) /* CEC FLAG mask */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup CEC_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup CEC_Private_Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup CEC_Private_FunctionPrototypes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @defgroup CEC_Private_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Deinitializes the CEC peripheral registers to their default reset
|
||||||
|
* values.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void CEC_DeInit(void)
|
||||||
|
{
|
||||||
|
/* Enable CEC reset state */
|
||||||
|
RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, ENABLE);
|
||||||
|
/* Release CEC from reset state */
|
||||||
|
RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, DISABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initializes the CEC peripheral according to the specified
|
||||||
|
* parameters in the CEC_InitStruct.
|
||||||
|
* @param CEC_InitStruct: pointer to an CEC_InitTypeDef structure that
|
||||||
|
* contains the configuration information for the specified
|
||||||
|
* CEC peripheral.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void CEC_Init(CEC_InitTypeDef* CEC_InitStruct)
|
||||||
|
{
|
||||||
|
uint16_t tmpreg = 0;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_CEC_BIT_TIMING_ERROR_MODE(CEC_InitStruct->CEC_BitTimingMode));
|
||||||
|
assert_param(IS_CEC_BIT_PERIOD_ERROR_MODE(CEC_InitStruct->CEC_BitPeriodMode));
|
||||||
|
|
||||||
|
/*---------------------------- CEC CFGR Configuration -----------------*/
|
||||||
|
/* Get the CEC CFGR value */
|
||||||
|
tmpreg = CEC->CFGR;
|
||||||
|
|
||||||
|
/* Clear BTEM and BPEM bits */
|
||||||
|
tmpreg &= CFGR_CLEAR_Mask;
|
||||||
|
|
||||||
|
/* Configure CEC: Bit Timing Error and Bit Period Error */
|
||||||
|
tmpreg |= (uint16_t)(CEC_InitStruct->CEC_BitTimingMode | CEC_InitStruct->CEC_BitPeriodMode);
|
||||||
|
|
||||||
|
/* Write to CEC CFGR register*/
|
||||||
|
CEC->CFGR = tmpreg;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables or disables the specified CEC peripheral.
|
||||||
|
* @param NewState: new state of the CEC peripheral.
|
||||||
|
* This parameter can be: ENABLE or DISABLE.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void CEC_Cmd(FunctionalState NewState)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||||
|
|
||||||
|
*(__IO uint32_t *) CFGR_PE_BB = (uint32_t)NewState;
|
||||||
|
|
||||||
|
if(NewState == DISABLE)
|
||||||
|
{
|
||||||
|
/* Wait until the PE bit is cleared by hardware (Idle Line detected) */
|
||||||
|
while((CEC->CFGR & CEC_CFGR_PE) != (uint32_t)RESET)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables or disables the CEC interrupt.
|
||||||
|
* @param NewState: new state of the CEC interrupt.
|
||||||
|
* This parameter can be: ENABLE or DISABLE.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void CEC_ITConfig(FunctionalState NewState)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||||
|
|
||||||
|
*(__IO uint32_t *) CFGR_IE_BB = (uint32_t)NewState;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Defines the Own Address of the CEC device.
|
||||||
|
* @param CEC_OwnAddress: The CEC own address
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_CEC_ADDRESS(CEC_OwnAddress));
|
||||||
|
|
||||||
|
/* Set the CEC own address */
|
||||||
|
CEC->OAR = CEC_OwnAddress;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Sets the CEC prescaler value.
|
||||||
|
* @param CEC_Prescaler: CEC prescaler new value
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void CEC_SetPrescaler(uint16_t CEC_Prescaler)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_CEC_PRESCALER(CEC_Prescaler));
|
||||||
|
|
||||||
|
/* Set the Prescaler value*/
|
||||||
|
CEC->PRES = CEC_Prescaler;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Transmits single data through the CEC peripheral.
|
||||||
|
* @param Data: the data to transmit.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void CEC_SendDataByte(uint8_t Data)
|
||||||
|
{
|
||||||
|
/* Transmit Data */
|
||||||
|
CEC->TXD = Data ;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Returns the most recent received data by the CEC peripheral.
|
||||||
|
* @param None
|
||||||
|
* @retval The received data.
|
||||||
|
*/
|
||||||
|
uint8_t CEC_ReceiveDataByte(void)
|
||||||
|
{
|
||||||
|
/* Receive Data */
|
||||||
|
return (uint8_t)(CEC->RXD);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Starts a new message.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void CEC_StartOfMessage(void)
|
||||||
|
{
|
||||||
|
/* Starts of new message */
|
||||||
|
*(__IO uint32_t *) CSR_TSOM_BB = (uint32_t)0x1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Transmits message with or without an EOM bit.
|
||||||
|
* @param NewState: new state of the CEC Tx End Of Message.
|
||||||
|
* This parameter can be: ENABLE or DISABLE.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void CEC_EndOfMessageCmd(FunctionalState NewState)
|
||||||
|
{
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||||
|
|
||||||
|
/* The data byte will be transmitted with or without an EOM bit*/
|
||||||
|
*(__IO uint32_t *) CSR_TEOM_BB = (uint32_t)NewState;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Gets the CEC flag status
|
||||||
|
* @param CEC_FLAG: specifies the CEC flag to check.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg CEC_FLAG_BTE: Bit Timing Error
|
||||||
|
* @arg CEC_FLAG_BPE: Bit Period Error
|
||||||
|
* @arg CEC_FLAG_RBTFE: Rx Block Transfer Finished Error
|
||||||
|
* @arg CEC_FLAG_SBE: Start Bit Error
|
||||||
|
* @arg CEC_FLAG_ACKE: Block Acknowledge Error
|
||||||
|
* @arg CEC_FLAG_LINE: Line Error
|
||||||
|
* @arg CEC_FLAG_TBTFE: Tx Block Transfer Finished Error
|
||||||
|
* @arg CEC_FLAG_TEOM: Tx End Of Message
|
||||||
|
* @arg CEC_FLAG_TERR: Tx Error
|
||||||
|
* @arg CEC_FLAG_TBTRF: Tx Byte Transfer Request or Block Transfer Finished
|
||||||
|
* @arg CEC_FLAG_RSOM: Rx Start Of Message
|
||||||
|
* @arg CEC_FLAG_REOM: Rx End Of Message
|
||||||
|
* @arg CEC_FLAG_RERR: Rx Error
|
||||||
|
* @arg CEC_FLAG_RBTF: Rx Byte/Block Transfer Finished
|
||||||
|
* @retval The new state of CEC_FLAG (SET or RESET)
|
||||||
|
*/
|
||||||
|
FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG)
|
||||||
|
{
|
||||||
|
FlagStatus bitstatus = RESET;
|
||||||
|
uint32_t cecreg = 0, cecbase = 0;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_CEC_GET_FLAG(CEC_FLAG));
|
||||||
|
|
||||||
|
/* Get the CEC peripheral base address */
|
||||||
|
cecbase = (uint32_t)(CEC_BASE);
|
||||||
|
|
||||||
|
/* Read flag register index */
|
||||||
|
cecreg = CEC_FLAG >> 28;
|
||||||
|
|
||||||
|
/* Get bit[23:0] of the flag */
|
||||||
|
CEC_FLAG &= FLAG_Mask;
|
||||||
|
|
||||||
|
if(cecreg != 0)
|
||||||
|
{
|
||||||
|
/* Flag in CEC ESR Register */
|
||||||
|
CEC_FLAG = (uint32_t)(CEC_FLAG >> 16);
|
||||||
|
|
||||||
|
/* Get the CEC ESR register address */
|
||||||
|
cecbase += 0xC;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* Get the CEC CSR register address */
|
||||||
|
cecbase += 0x10;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(((*(__IO uint32_t *)cecbase) & CEC_FLAG) != (uint32_t)RESET)
|
||||||
|
{
|
||||||
|
/* CEC_FLAG is set */
|
||||||
|
bitstatus = SET;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* CEC_FLAG is reset */
|
||||||
|
bitstatus = RESET;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Return the CEC_FLAG status */
|
||||||
|
return bitstatus;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Clears the CEC's pending flags.
|
||||||
|
* @param CEC_FLAG: specifies the flag to clear.
|
||||||
|
* This parameter can be any combination of the following values:
|
||||||
|
* @arg CEC_FLAG_TERR: Tx Error
|
||||||
|
* @arg CEC_FLAG_TBTRF: Tx Byte Transfer Request or Block Transfer Finished
|
||||||
|
* @arg CEC_FLAG_RSOM: Rx Start Of Message
|
||||||
|
* @arg CEC_FLAG_REOM: Rx End Of Message
|
||||||
|
* @arg CEC_FLAG_RERR: Rx Error
|
||||||
|
* @arg CEC_FLAG_RBTF: Rx Byte/Block Transfer Finished
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void CEC_ClearFlag(uint32_t CEC_FLAG)
|
||||||
|
{
|
||||||
|
uint32_t tmp = 0x0;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_CEC_CLEAR_FLAG(CEC_FLAG));
|
||||||
|
|
||||||
|
tmp = CEC->CSR & 0x2;
|
||||||
|
|
||||||
|
/* Clear the selected CEC flags */
|
||||||
|
CEC->CSR &= (uint32_t)(((~(uint32_t)CEC_FLAG) & 0xFFFFFFFC) | tmp);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Checks whether the specified CEC interrupt has occurred or not.
|
||||||
|
* @param CEC_IT: specifies the CEC interrupt source to check.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg CEC_IT_TERR: Tx Error
|
||||||
|
* @arg CEC_IT_TBTF: Tx Block Transfer Finished
|
||||||
|
* @arg CEC_IT_RERR: Rx Error
|
||||||
|
* @arg CEC_IT_RBTF: Rx Block Transfer Finished
|
||||||
|
* @retval The new state of CEC_IT (SET or RESET).
|
||||||
|
*/
|
||||||
|
ITStatus CEC_GetITStatus(uint8_t CEC_IT)
|
||||||
|
{
|
||||||
|
ITStatus bitstatus = RESET;
|
||||||
|
uint32_t enablestatus = 0;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_CEC_GET_IT(CEC_IT));
|
||||||
|
|
||||||
|
/* Get the CEC IT enable bit status */
|
||||||
|
enablestatus = (CEC->CFGR & (uint8_t)CEC_CFGR_IE) ;
|
||||||
|
|
||||||
|
/* Check the status of the specified CEC interrupt */
|
||||||
|
if (((CEC->CSR & CEC_IT) != (uint32_t)RESET) && enablestatus)
|
||||||
|
{
|
||||||
|
/* CEC_IT is set */
|
||||||
|
bitstatus = SET;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* CEC_IT is reset */
|
||||||
|
bitstatus = RESET;
|
||||||
|
}
|
||||||
|
/* Return the CEC_IT status */
|
||||||
|
return bitstatus;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Clears the CEC's interrupt pending bits.
|
||||||
|
* @param CEC_IT: specifies the CEC interrupt pending bit to clear.
|
||||||
|
* This parameter can be any combination of the following values:
|
||||||
|
* @arg CEC_IT_TERR: Tx Error
|
||||||
|
* @arg CEC_IT_TBTF: Tx Block Transfer Finished
|
||||||
|
* @arg CEC_IT_RERR: Rx Error
|
||||||
|
* @arg CEC_IT_RBTF: Rx Block Transfer Finished
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void CEC_ClearITPendingBit(uint16_t CEC_IT)
|
||||||
|
{
|
||||||
|
uint32_t tmp = 0x0;
|
||||||
|
|
||||||
|
/* Check the parameters */
|
||||||
|
assert_param(IS_CEC_GET_IT(CEC_IT));
|
||||||
|
|
||||||
|
tmp = CEC->CSR & 0x2;
|
||||||
|
|
||||||
|
/* Clear the selected CEC interrupt pending bits */
|
||||||
|
CEC->CSR &= (uint32_t)(((~(uint32_t)CEC_IT) & 0xFFFFFFFC) | tmp);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,160 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f10x_crc.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V3.5.0
|
||||||
|
* @date 11-March-2011
|
||||||
|
* @brief This file provides all the CRC firmware functions.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||||
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||||
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||||
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||||
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||||
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f10x_crc.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F10x_StdPeriph_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC
|
||||||
|
* @brief CRC driver modules
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_Private_TypesDefinitions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_Private_Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_Private_Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_Private_FunctionPrototypes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup CRC_Private_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Resets the CRC Data register (DR).
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void CRC_ResetDR(void)
|
||||||
|
{
|
||||||
|
/* Reset CRC generator */
|
||||||
|
CRC->CR = CRC_CR_RESET;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Computes the 32-bit CRC of a given data word(32-bit).
|
||||||
|
* @param Data: data word(32-bit) to compute its CRC
|
||||||
|
* @retval 32-bit CRC
|
||||||
|
*/
|
||||||
|
uint32_t CRC_CalcCRC(uint32_t Data)
|
||||||
|
{
|
||||||
|
CRC->DR = Data;
|
||||||
|
|
||||||
|
return (CRC->DR);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Computes the 32-bit CRC of a given buffer of data word(32-bit).
|
||||||
|
* @param pBuffer: pointer to the buffer containing the data to be computed
|
||||||
|
* @param BufferLength: length of the buffer to be computed
|
||||||
|
* @retval 32-bit CRC
|
||||||
|
*/
|
||||||
|
uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength)
|
||||||
|
{
|
||||||
|
uint32_t index = 0;
|
||||||
|
|
||||||
|
for(index = 0; index < BufferLength; index++)
|
||||||
|
{
|
||||||
|
CRC->DR = pBuffer[index];
|
||||||
|
}
|
||||||
|
return (CRC->DR);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Returns the current CRC value.
|
||||||
|
* @param None
|
||||||
|
* @retval 32-bit CRC
|
||||||
|
*/
|
||||||
|
uint32_t CRC_GetCRC(void)
|
||||||
|
{
|
||||||
|
return (CRC->DR);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Stores a 8-bit data in the Independent Data(ID) register.
|
||||||
|
* @param IDValue: 8-bit value to be stored in the ID register
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void CRC_SetIDRegister(uint8_t IDValue)
|
||||||
|
{
|
||||||
|
CRC->IDR = IDValue;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Returns the 8-bit data stored in the Independent Data(ID) register
|
||||||
|
* @param None
|
||||||
|
* @retval 8-bit value of the ID register
|
||||||
|
*/
|
||||||
|
uint8_t CRC_GetIDRegister(void)
|
||||||
|
{
|
||||||
|
return (CRC->IDR);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
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