sysmo-bts
/
barebox
9
0
Fork 0
Code Releases Activity

Initial GSMK OWHW v1 board support

This commit is contained in:
Harald Welte 2015-10-31 10:13:25 +01:00
parent 95e1a85cb2
commit 7b346a04b7
17 changed files with 366 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boards/phytec-som-am335x/Makefile
View File

@ -2,3 +2,4 @@ lwl-y += lowlevel.o
obj-y += board.o
bbenv-y += defaultenv-physom-am335x
bbenv-y += defaultenv-sysmocom-odu
bbenv-y += defaultenv-gsmk-owhw

4
arch/arm/boards/phytec-som-am335x/board.c
View File

@ -80,7 +80,9 @@ static int physom_devices_init(void)
omap_set_barebox_part(&physom_barebox_part);
if (of_machine_is_compatible("sysmocom,odu")) {
if (of_machine_is_compatible("gsmk,owhw")) {
defaultenv_append_directory(defaultenv_gsmk_owhw);
} else if (of_machine_is_compatible("sysmocom,odu")) {
defaultenv_append_directory(defaultenv_sysmocom_odu);
} else {
defaultenv_append_directory(defaultenv_physom_am335x);

14
arch/arm/boards/phytec-som-am335x/defaultenv-gsmk-owhw/bin/prepare-ubi Normal file
View File

@ -0,0 +1,14 @@
#!/bin/sh
if test -e /dev/nand0.root.ubi; then
exit 0
fi
# Linux 3.2.x needs VID header offset 2048
ubiattach -d 0 -O 2048 /dev/nand0.root
if [ $? != 0 ]; then
echo "failed to run ubiattach"
exit 1
fi
exit 0

3
arch/arm/boards/phytec-som-am335x/defaultenv-gsmk-owhw/boot/chooser Normal file
View File

@ -0,0 +1,3 @@
#!/bin/sh
bootchooser -d -w 60

11
arch/arm/boards/phytec-som-am335x/defaultenv-gsmk-owhw/boot/rescue Normal file
View File

@ -0,0 +1,11 @@
#!/bin/sh
global bootm.image=/mnt/rescue/kernel
global bootm.image.loadaddr=0x81000000
if [ -e /mnt/rescue/devicetree ]; then
global bootm.oftree=/mnt/rescue/devicetree
fi
global bootm.initrd=/mnt/rescue/initramfs
global linux.bootargs.dyn.root="rdinit=/sbin/init rauc.slot=rescue"
global linux.bootargs.dyn.mtd="mtdparts=omap2-nand.0:${nand0.partitions} ubi.mtd=root,2048"

11
arch/arm/boards/phytec-som-am335x/defaultenv-gsmk-owhw/boot/rescue-net Normal file
View File

@ -0,0 +1,11 @@
#!/bin/sh
global bootm.image=/mnt/tftp/linux/arch/arm/boot/zImage
global bootm.image.loadaddr=0x81000000
if [ -e /mnt/rescue/devicetree ]; then
global bootm.oftree=/mnt/rescue/devicetree
fi
global bootm.initrd=/mnt/rescue/initramfs
global linux.bootargs.dyn.root="rdinit=/sbin/init rauc.slot=rescue"
global linux.bootargs.dyn.mtd="mtdparts=omap2-nand.0:${nand0.partitions} ubi.mtd=root,2048"

11
arch/arm/boards/phytec-som-am335x/defaultenv-gsmk-owhw/boot/system0 Normal file
View File

@ -0,0 +1,11 @@
#!/bin/sh
global bootm.image=/mnt/system0/kernel
global bootm.image.loadaddr=0x81000000
if [ -e /mnt/system0/devicetree ]; then
global bootm.oftree=/mnt/system0/devicetree
fi
global bootm.initrd=/mnt/system0/initramfs
global linux.bootargs.dyn.root="root=ubi0:system0 rootfstype=ubifs ro rauc.slot=system0"
global linux.bootargs.dyn.mtd="mtdparts=omap2-nand.0:${nand0.partitions} ubi.mtd=root,2048"

11
arch/arm/boards/phytec-som-am335x/defaultenv-gsmk-owhw/boot/system1 Normal file
View File

@ -0,0 +1,11 @@
#!/bin/sh
global bootm.image=/mnt/system1/kernel
global bootm.image.loadaddr=0x81000000
if [ -e /mnt/system1/devicetree ]; then
global bootm.oftree=/mnt/system1/devicetree
fi
global bootm.initrd=/mnt/system1/initramfs
global linux.bootargs.dyn.root="root=ubi0:system1 rootfstype=ubifs ro rauc.slot=system1"
global linux.bootargs.dyn.mtd="mtdparts=omap2-nand.0:${nand0.partitions} ubi.mtd=root,2048"

10
arch/arm/boards/phytec-som-am335x/defaultenv-gsmk-owhw/init/automount-nand Normal file
View File

@ -0,0 +1,10 @@
#!/bin/sh
mkdir /mnt/system0
automount -d /mnt/system0 'prepare-ubi && mount /dev/nand0.root.ubi.system0 /mnt/system0'
mkdir /mnt/system1
automount -d /mnt/system1 'prepare-ubi && mount /dev/nand0.root.ubi.system1 /mnt/system1'
mkdir /mnt/rescue
automount -d /mnt/rescue 'prepare-ubi && mount /dev/nand0.root.ubi.rescue /mnt/rescue'

7
arch/arm/boards/phytec-som-am335x/defaultenv-gsmk-owhw/init/lldp Normal file
View File

@ -0,0 +1,7 @@
#!/bin/sh
#
echo "Going to send LLDP probe in 2s"
# Activate the ethernet and wait... 2s has been tried with a Phytec devboard
lldp
sleep 2s
lldp

1
arch/arm/boards/phytec-som-am335x/defaultenv-gsmk-owhw/nv/boot.default Normal file
View File

@ -0,0 +1 @@
chooser rescue

1
arch/arm/boards/phytec-som-am335x/defaultenv-gsmk-owhw/nv/hostname Normal file
View File

@ -0,0 +1 @@
gsmk-owhw

1
arch/arm/boards/phytec-som-am335x/defaultenv-gsmk-owhw/nv/linux.bootargs.console Normal file
View File

@ -0,0 +1 @@
console=ttyO0,115200 panic=30

4
arch/arm/boards/phytec-som-am335x/lowlevel.c
View File

@ -139,3 +139,7 @@ PHYTEC_ENTRY(start_am33xx_phytec_phycard_sdram, am335x_phytec_phycard_som);
/* sysmocom-odu */
PHYTEC_ENTRY_MLO(start_am33xx_sysmocom_odu_sram, am335x_sysmocom_odu, PHYCARD_NT5CB128M16BP_256MB);
PHYTEC_ENTRY(start_am33xx_sysmocom_odu_sdram, am335x_sysmocom_odu);
/* gsmk-owhw */
PHYTEC_ENTRY_MLO(start_am33xx_gsmk_owhw_sram, am335x_gsmk_owhw, PHYCARD_NT5CB128M16BP_256MB);
PHYTEC_ENTRY(start_am33xx_gsmk_owhw_sdram, am335x_gsmk_owhw);

3
arch/arm/dts/Makefile
View File

@ -33,7 +33,8 @@ pbl-dtb-$(CONFIG_MACH_PCAAXL3) += imx6q-phytec-pbaa03.dtb.o
pbl-dtb-$(CONFIG_MACH_PCM038) += imx27-phytec-phycore-rdk.dtb.o
pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am335x-phytec-phyflex-som-mlo.dtb.o \
am335x-phytec-phycore-som.dtb.o am335x-phytec-phycore-som-no-spi.dtb.o am335x-phytec-phycore-som-mlo.dtb.o \
am335x-phytec-phycard-som.dtb.o am335x-phytec-phycard-som-mlo.dtb.o am335x-sysmocom-odu.dtb.o
am335x-phytec-phycard-som.dtb.o am335x-phytec-phycard-som-mlo.dtb.o am335x-sysmocom-odu.dtb.o \
am335x-gsmk-owhw.dtb.o
pbl-dtb-$(CONFIG_MACH_PHYTEC_PFLA02) += imx6s-phytec-pbab01.dtb.o imx6dl-phytec-pbab01.dtb.o imx6q-phytec-pbab01.dtb.o imx6q-phytec-phyboard-alcor.dtb.o imx6dl-phytec-phyboard-subra.dtb.o
pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += armada-xp-openblocks-ax3-4-bb.dtb.o
pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += kirkwood-openblocks_a6-bb.dtb.o

267
arch/arm/dts/am335x-gsmk-owhw.dts Normal file
View File

@ -0,0 +1,267 @@
/*
* Copyright (C) 2015 Harald Welte <laforge@gnumonks.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "am33xx.dtsi"
#include "am335x-phytec-phycore-som.dtsi"
/ {
model = "GSMK OWHW";
compatible = "gsmk,owhw", "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx";
buttons: user_buttons {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&user_buttons_pins>;
button@0 {
label = "rest";
linux,code = <KEY_HOME>; /* KEY_F6 */
gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
};
};
leds: user_leds {
pinctrl-names = "default";
pinctrl-0 = <&user_leds_pins>;
compatible = "gpio-leds";
led@0 {
label = "owhw:amber:status";
gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
};
state: state {
compatible = "barebox,state";
magic = <0x6c15c8df>;
backend-type = "raw";
backend = &eeprom_baseboard, "partname:state";
bootstate {
system0 {
#address-cells = <1>;
#size-cells = <1>;
remaining_attempts {
reg = <0x0 0x1>;
type = "uint8";
};
priority {
reg = <0x1 0x1>;
type = "uint8";
};
ok {
reg = <0x2 0x1>;
type = "uint8";
};
};
system1 {
#address-cells = <1>;
#size-cells = <1>;
remaining_attempts {
reg = <0x3 0x1>;
type = "uint8";
};
priority {
reg = <0x4 0x1>;
type = "uint8";
};
ok {
reg = <0x5 0x1>;
type = "uint8";
};
};
rescue {
#address-cells = <1>;
#size-cells = <1>;
remaining_attempts {
reg = <0x6 0x1>;
type = "uint8";
};
priority {
reg = <0x7 0x1>;
type = "uint8";
};
ok {
reg = <0x8 0x1>;
type = "uint8";
};
};
};
};
bootstate: bootstate {
compatible = "barebox,bootstate";
backend-type = "state";
backend = <&state>;
system0 {
default_attempts = <3>;
};
system1 {
default_attempts = <3>;
};
rescue {
default_attempts = <3>;
};
};
};
&nand {
partition@5 {
label = "bareboxenv";
reg = <0x100000 0x20000>;
};
partition@6 {
label = "root";
reg = <0x120000 0x0>;
};
};
&i2c0_pins {
pinctrl-single,pins = <
/* EEPROM_WP */
0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a3.gpio1_19 */
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
&i2c1 {
status = "okay";
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&hub_pins &mdm_pins &simtrace_pins &pse_pins &switch_pins>;
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
0x168 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_ctsn.i2c1_sda */
0x16c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rtsn.i2c1_scl */
>;
};
mdm_pins: pinmux_mdm_pins {
pinctrl-single,pins = <
/* MDM1_RST */
0x28 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] */
/* MDM1_ON */
0x6c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (V17) gpmc_a11.gpio1[27] */
/* MDM_LDO_EN */
0x68 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* (T16) gpmc_a10.gpio1[26] */
/* MDM2_RST */
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] */
/* MDM2_ON */
0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (U14) gpmc_a2.gpio1[18] */
>;
};
acc_pins: pinmux_acc_pins {
pinctrl-single,pins = <
/* ACC_INT1 */
0x1e8 (PIN_INPUT_PULLUP | MUX_MODE7) /* (B14) EMU1.gpio3[8] */
>;
};
hub_pins: pinmux_hub_pins {
pinctrl-single,pins = <
/* !HUB_RESET */
0x80 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* (U9) gpmc_csn1.gpio1[30] */
>;
};
simtrace_pins: pinmux_simtrace_pins {
pinctrl-single,pins = <
/* _SIMTRACE_ERASE: 3_17 */
0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (C12) mcasp0_ahclkr.gpio3[17] */
/* _SIMTRACE_BOOTLOADER: 3_19 */
0x1a4 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (C13) mcasp0_fsr.gpio3[19] */
/* _SIMTRACE_RESET: 3_18 */
0x1a0 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (B12) mcasp0_aclkr.gpio3[18] */
/* !CONNECT_ST_USIM1: 0_27 */
0x2c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] */
/* !CONNECT_ST_USIM2: 0_23 */
0x24 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (T10) gpmc_ad9.gpio0[23] */
>;
};
pse_pins: pinmux_pse_pins {
pinctrl-single,pins = <
/* PSE_I2C_BUF_EN: 1_16 */
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (R13) gpmc_a0.gpio1[16] */
/* !PSE_INT: 1_20 */
0x50 (PIN_INPUT | MUX_MODE7) /* (R14) gpmc_a4.gpio1[20] */
>;
};
switch_pins: pinmux_pse_pins {
pinctrl-single,pins = <
/* SWITCH_RESET: 1_24 */
0x60 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] */
>;
};
user_leds_pins: pinmux_user_leds {
pinctrl-single,pins = <
/* STATUS_LED: 1_22 */
0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* (V15) gpmc_a6.gpio1[22] */
>;
};
user_buttons_pins: pinmux_user_buttons {
pinctrl-single,pins = <
/* BUTTON: 1_25 */
0x64 (PIN_INPUT_PULLUP | MUX_MODE7) /* (U16) gpmc_a9.gpio1[25] */
>;
};
};
&i2c0 {
eeprom_baseboard: 24cm02@50 {
status = "okay";
compatible = "atmel,24c1024";
pagesize = <8>;
reg = <0x50>;
wp-gpios = <&gpio1 19 0>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "state";
reg = <0xc0 0x40>; /* last 0x40 bytes for eeprom */
};
};
};
&usb0 {
dr_mode = "peripheral";
status = "okay";
};
&usb0_phy {
status = "okay";
};

8
images/Makefile.am33xx
View File

@ -23,6 +23,14 @@ pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_sysmocom_odu_sram
FILE_barebox-am33xx-sysmocom-odu-mlo.img = start_am33xx_sysmocom_odu_sram.pblx.mlo
am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-sysmocom-odu-mlo.img
pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_gsmk_owhw_sdram
FILE_barebox-am33xx-gsmk-owhw.img = start_am33xx_gsmk_owhw_sdram.pblx
am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-gsmk-owhw.img
pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_gsmk_owhw_sram
FILE_barebox-am33xx-gsmk-owhw-mlo.img = start_am33xx_gsmk_owhw_sram.pblx.mlo
am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-gsmk-owhw-mlo.img
pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sdram
FILE_barebox-am33xx-phytec-phycore.img = start_am33xx_phytec_phycore_sdram.pblx
am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore.img