Initial GSMK OWHW v1 board support
This commit is contained in:
parent
95e1a85cb2
commit
7b346a04b7
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@ -2,3 +2,4 @@ lwl-y += lowlevel.o
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obj-y += board.o
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obj-y += board.o
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bbenv-y += defaultenv-physom-am335x
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bbenv-y += defaultenv-physom-am335x
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bbenv-y += defaultenv-sysmocom-odu
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bbenv-y += defaultenv-sysmocom-odu
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bbenv-y += defaultenv-gsmk-owhw
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@ -80,7 +80,9 @@ static int physom_devices_init(void)
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omap_set_barebox_part(&physom_barebox_part);
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omap_set_barebox_part(&physom_barebox_part);
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if (of_machine_is_compatible("sysmocom,odu")) {
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if (of_machine_is_compatible("gsmk,owhw")) {
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defaultenv_append_directory(defaultenv_gsmk_owhw);
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} else if (of_machine_is_compatible("sysmocom,odu")) {
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defaultenv_append_directory(defaultenv_sysmocom_odu);
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defaultenv_append_directory(defaultenv_sysmocom_odu);
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} else {
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} else {
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defaultenv_append_directory(defaultenv_physom_am335x);
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defaultenv_append_directory(defaultenv_physom_am335x);
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@ -0,0 +1,14 @@
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#!/bin/sh
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if test -e /dev/nand0.root.ubi; then
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exit 0
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fi
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# Linux 3.2.x needs VID header offset 2048
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ubiattach -d 0 -O 2048 /dev/nand0.root
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if [ $? != 0 ]; then
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echo "failed to run ubiattach"
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exit 1
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fi
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exit 0
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@ -0,0 +1,3 @@
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#!/bin/sh
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bootchooser -d -w 60
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@ -0,0 +1,11 @@
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#!/bin/sh
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global bootm.image=/mnt/rescue/kernel
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global bootm.image.loadaddr=0x81000000
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if [ -e /mnt/rescue/devicetree ]; then
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global bootm.oftree=/mnt/rescue/devicetree
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fi
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global bootm.initrd=/mnt/rescue/initramfs
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global linux.bootargs.dyn.root="rdinit=/sbin/init rauc.slot=rescue"
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global linux.bootargs.dyn.mtd="mtdparts=omap2-nand.0:${nand0.partitions} ubi.mtd=root,2048"
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@ -0,0 +1,11 @@
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#!/bin/sh
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global bootm.image=/mnt/tftp/linux/arch/arm/boot/zImage
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global bootm.image.loadaddr=0x81000000
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if [ -e /mnt/rescue/devicetree ]; then
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global bootm.oftree=/mnt/rescue/devicetree
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fi
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global bootm.initrd=/mnt/rescue/initramfs
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global linux.bootargs.dyn.root="rdinit=/sbin/init rauc.slot=rescue"
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global linux.bootargs.dyn.mtd="mtdparts=omap2-nand.0:${nand0.partitions} ubi.mtd=root,2048"
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@ -0,0 +1,11 @@
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#!/bin/sh
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global bootm.image=/mnt/system0/kernel
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global bootm.image.loadaddr=0x81000000
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if [ -e /mnt/system0/devicetree ]; then
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global bootm.oftree=/mnt/system0/devicetree
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fi
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global bootm.initrd=/mnt/system0/initramfs
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global linux.bootargs.dyn.root="root=ubi0:system0 rootfstype=ubifs ro rauc.slot=system0"
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global linux.bootargs.dyn.mtd="mtdparts=omap2-nand.0:${nand0.partitions} ubi.mtd=root,2048"
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@ -0,0 +1,11 @@
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#!/bin/sh
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global bootm.image=/mnt/system1/kernel
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global bootm.image.loadaddr=0x81000000
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if [ -e /mnt/system1/devicetree ]; then
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global bootm.oftree=/mnt/system1/devicetree
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fi
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global bootm.initrd=/mnt/system1/initramfs
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global linux.bootargs.dyn.root="root=ubi0:system1 rootfstype=ubifs ro rauc.slot=system1"
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global linux.bootargs.dyn.mtd="mtdparts=omap2-nand.0:${nand0.partitions} ubi.mtd=root,2048"
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@ -0,0 +1,10 @@
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#!/bin/sh
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mkdir /mnt/system0
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automount -d /mnt/system0 'prepare-ubi && mount /dev/nand0.root.ubi.system0 /mnt/system0'
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mkdir /mnt/system1
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automount -d /mnt/system1 'prepare-ubi && mount /dev/nand0.root.ubi.system1 /mnt/system1'
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mkdir /mnt/rescue
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automount -d /mnt/rescue 'prepare-ubi && mount /dev/nand0.root.ubi.rescue /mnt/rescue'
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@ -0,0 +1,7 @@
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#!/bin/sh
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#
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echo "Going to send LLDP probe in 2s"
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# Activate the ethernet and wait... 2s has been tried with a Phytec devboard
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lldp
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sleep 2s
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lldp
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@ -0,0 +1 @@
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chooser rescue
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@ -0,0 +1 @@
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gsmk-owhw
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@ -0,0 +1 @@
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console=ttyO0,115200 panic=30
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@ -139,3 +139,7 @@ PHYTEC_ENTRY(start_am33xx_phytec_phycard_sdram, am335x_phytec_phycard_som);
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/* sysmocom-odu */
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/* sysmocom-odu */
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PHYTEC_ENTRY_MLO(start_am33xx_sysmocom_odu_sram, am335x_sysmocom_odu, PHYCARD_NT5CB128M16BP_256MB);
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PHYTEC_ENTRY_MLO(start_am33xx_sysmocom_odu_sram, am335x_sysmocom_odu, PHYCARD_NT5CB128M16BP_256MB);
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PHYTEC_ENTRY(start_am33xx_sysmocom_odu_sdram, am335x_sysmocom_odu);
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PHYTEC_ENTRY(start_am33xx_sysmocom_odu_sdram, am335x_sysmocom_odu);
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/* gsmk-owhw */
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PHYTEC_ENTRY_MLO(start_am33xx_gsmk_owhw_sram, am335x_gsmk_owhw, PHYCARD_NT5CB128M16BP_256MB);
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PHYTEC_ENTRY(start_am33xx_gsmk_owhw_sdram, am335x_gsmk_owhw);
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@ -33,7 +33,8 @@ pbl-dtb-$(CONFIG_MACH_PCAAXL3) += imx6q-phytec-pbaa03.dtb.o
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pbl-dtb-$(CONFIG_MACH_PCM038) += imx27-phytec-phycore-rdk.dtb.o
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pbl-dtb-$(CONFIG_MACH_PCM038) += imx27-phytec-phycore-rdk.dtb.o
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pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am335x-phytec-phyflex-som-mlo.dtb.o \
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pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am335x-phytec-phyflex-som-mlo.dtb.o \
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am335x-phytec-phycore-som.dtb.o am335x-phytec-phycore-som-no-spi.dtb.o am335x-phytec-phycore-som-mlo.dtb.o \
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am335x-phytec-phycore-som.dtb.o am335x-phytec-phycore-som-no-spi.dtb.o am335x-phytec-phycore-som-mlo.dtb.o \
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am335x-phytec-phycard-som.dtb.o am335x-phytec-phycard-som-mlo.dtb.o am335x-sysmocom-odu.dtb.o
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am335x-phytec-phycard-som.dtb.o am335x-phytec-phycard-som-mlo.dtb.o am335x-sysmocom-odu.dtb.o \
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am335x-gsmk-owhw.dtb.o
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pbl-dtb-$(CONFIG_MACH_PHYTEC_PFLA02) += imx6s-phytec-pbab01.dtb.o imx6dl-phytec-pbab01.dtb.o imx6q-phytec-pbab01.dtb.o imx6q-phytec-phyboard-alcor.dtb.o imx6dl-phytec-phyboard-subra.dtb.o
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pbl-dtb-$(CONFIG_MACH_PHYTEC_PFLA02) += imx6s-phytec-pbab01.dtb.o imx6dl-phytec-pbab01.dtb.o imx6q-phytec-pbab01.dtb.o imx6q-phytec-phyboard-alcor.dtb.o imx6dl-phytec-phyboard-subra.dtb.o
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pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += armada-xp-openblocks-ax3-4-bb.dtb.o
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pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += armada-xp-openblocks-ax3-4-bb.dtb.o
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pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += kirkwood-openblocks_a6-bb.dtb.o
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pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += kirkwood-openblocks_a6-bb.dtb.o
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@ -0,0 +1,267 @@
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/*
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* Copyright (C) 2015 Harald Welte <laforge@gnumonks.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include "am33xx.dtsi"
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#include "am335x-phytec-phycore-som.dtsi"
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/ {
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model = "GSMK OWHW";
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compatible = "gsmk,owhw", "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx";
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buttons: user_buttons {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&user_buttons_pins>;
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button@0 {
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label = "rest";
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linux,code = <KEY_HOME>; /* KEY_F6 */
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gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
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};
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};
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leds: user_leds {
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pinctrl-names = "default";
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pinctrl-0 = <&user_leds_pins>;
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compatible = "gpio-leds";
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led@0 {
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label = "owhw:amber:status";
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gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "heartbeat";
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default-state = "off";
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};
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};
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state: state {
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compatible = "barebox,state";
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magic = <0x6c15c8df>;
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backend-type = "raw";
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backend = &eeprom_baseboard, "partname:state";
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bootstate {
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system0 {
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#address-cells = <1>;
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#size-cells = <1>;
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remaining_attempts {
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reg = <0x0 0x1>;
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type = "uint8";
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};
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priority {
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reg = <0x1 0x1>;
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type = "uint8";
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};
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ok {
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reg = <0x2 0x1>;
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type = "uint8";
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};
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};
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system1 {
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#address-cells = <1>;
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#size-cells = <1>;
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remaining_attempts {
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reg = <0x3 0x1>;
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type = "uint8";
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};
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priority {
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reg = <0x4 0x1>;
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type = "uint8";
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};
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ok {
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reg = <0x5 0x1>;
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type = "uint8";
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};
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};
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rescue {
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#address-cells = <1>;
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#size-cells = <1>;
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remaining_attempts {
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reg = <0x6 0x1>;
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type = "uint8";
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};
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priority {
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reg = <0x7 0x1>;
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type = "uint8";
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};
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ok {
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reg = <0x8 0x1>;
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type = "uint8";
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};
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};
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};
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};
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bootstate: bootstate {
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compatible = "barebox,bootstate";
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backend-type = "state";
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backend = <&state>;
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system0 {
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default_attempts = <3>;
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};
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system1 {
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default_attempts = <3>;
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};
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rescue {
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default_attempts = <3>;
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};
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};
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};
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&nand {
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partition@5 {
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label = "bareboxenv";
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reg = <0x100000 0x20000>;
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};
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partition@6 {
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label = "root";
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reg = <0x120000 0x0>;
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};
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};
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&i2c0_pins {
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pinctrl-single,pins = <
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/* EEPROM_WP */
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0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a3.gpio1_19 */
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0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
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0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
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>;
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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};
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&am33xx_pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&hub_pins &mdm_pins &simtrace_pins &pse_pins &switch_pins>;
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i2c1_pins: pinmux_i2c1_pins {
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pinctrl-single,pins = <
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0x168 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_ctsn.i2c1_sda */
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0x16c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rtsn.i2c1_scl */
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>;
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};
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mdm_pins: pinmux_mdm_pins {
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pinctrl-single,pins = <
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/* MDM1_RST */
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0x28 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] */
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/* MDM1_ON */
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0x6c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (V17) gpmc_a11.gpio1[27] */
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/* MDM_LDO_EN */
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0x68 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* (T16) gpmc_a10.gpio1[26] */
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/* MDM2_RST */
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0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] */
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/* MDM2_ON */
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0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (U14) gpmc_a2.gpio1[18] */
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>;
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};
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acc_pins: pinmux_acc_pins {
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pinctrl-single,pins = <
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/* ACC_INT1 */
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0x1e8 (PIN_INPUT_PULLUP | MUX_MODE7) /* (B14) EMU1.gpio3[8] */
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>;
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};
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hub_pins: pinmux_hub_pins {
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pinctrl-single,pins = <
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/* !HUB_RESET */
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0x80 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* (U9) gpmc_csn1.gpio1[30] */
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>;
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};
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simtrace_pins: pinmux_simtrace_pins {
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pinctrl-single,pins = <
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/* _SIMTRACE_ERASE: 3_17 */
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||||||
|
0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (C12) mcasp0_ahclkr.gpio3[17] */
|
||||||
|
/* _SIMTRACE_BOOTLOADER: 3_19 */
|
||||||
|
0x1a4 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (C13) mcasp0_fsr.gpio3[19] */
|
||||||
|
/* _SIMTRACE_RESET: 3_18 */
|
||||||
|
0x1a0 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (B12) mcasp0_aclkr.gpio3[18] */
|
||||||
|
/* !CONNECT_ST_USIM1: 0_27 */
|
||||||
|
0x2c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] */
|
||||||
|
/* !CONNECT_ST_USIM2: 0_23 */
|
||||||
|
0x24 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (T10) gpmc_ad9.gpio0[23] */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pse_pins: pinmux_pse_pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
/* PSE_I2C_BUF_EN: 1_16 */
|
||||||
|
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (R13) gpmc_a0.gpio1[16] */
|
||||||
|
/* !PSE_INT: 1_20 */
|
||||||
|
0x50 (PIN_INPUT | MUX_MODE7) /* (R14) gpmc_a4.gpio1[20] */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
switch_pins: pinmux_pse_pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
/* SWITCH_RESET: 1_24 */
|
||||||
|
0x60 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
user_leds_pins: pinmux_user_leds {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
/* STATUS_LED: 1_22 */
|
||||||
|
0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* (V15) gpmc_a6.gpio1[22] */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
user_buttons_pins: pinmux_user_buttons {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
/* BUTTON: 1_25 */
|
||||||
|
0x64 (PIN_INPUT_PULLUP | MUX_MODE7) /* (U16) gpmc_a9.gpio1[25] */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c0 {
|
||||||
|
eeprom_baseboard: 24cm02@50 {
|
||||||
|
status = "okay";
|
||||||
|
compatible = "atmel,24c1024";
|
||||||
|
pagesize = <8>;
|
||||||
|
reg = <0x50>;
|
||||||
|
wp-gpios = <&gpio1 19 0>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
partition@0 {
|
||||||
|
label = "state";
|
||||||
|
reg = <0xc0 0x40>; /* last 0x40 bytes for eeprom */
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&usb0 {
|
||||||
|
dr_mode = "peripheral";
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&usb0_phy {
|
||||||
|
status = "okay";
|
||||||
|
};
|
|
@ -23,6 +23,14 @@ pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_sysmocom_odu_sram
|
||||||
FILE_barebox-am33xx-sysmocom-odu-mlo.img = start_am33xx_sysmocom_odu_sram.pblx.mlo
|
FILE_barebox-am33xx-sysmocom-odu-mlo.img = start_am33xx_sysmocom_odu_sram.pblx.mlo
|
||||||
am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-sysmocom-odu-mlo.img
|
am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-sysmocom-odu-mlo.img
|
||||||
|
|
||||||
|
pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_gsmk_owhw_sdram
|
||||||
|
FILE_barebox-am33xx-gsmk-owhw.img = start_am33xx_gsmk_owhw_sdram.pblx
|
||||||
|
am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-gsmk-owhw.img
|
||||||
|
|
||||||
|
pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_gsmk_owhw_sram
|
||||||
|
FILE_barebox-am33xx-gsmk-owhw-mlo.img = start_am33xx_gsmk_owhw_sram.pblx.mlo
|
||||||
|
am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-gsmk-owhw-mlo.img
|
||||||
|
|
||||||
pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sdram
|
pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sdram
|
||||||
FILE_barebox-am33xx-phytec-phycore.img = start_am33xx_phytec_phycore_sdram.pblx
|
FILE_barebox-am33xx-phytec-phycore.img = start_am33xx_phytec_phycore_sdram.pblx
|
||||||
am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore.img
|
am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore.img
|
||||||
|
|
Loading…
Reference in New Issue