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dts: update to v4.0-rc6 

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2015-04-13 10:37:58 +02:00
parent 1c1bf62c58
commit f698ac0aa1
11 changed files with 59 additions and 14 deletions
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19
dts/src/arm/dm8168-evm.dts
View File

@ -36,6 +36,20 @@
>; >;
}; };
mmc_pins: pinmux_mmc_pins {
pinctrl-single,pins = <
DM816X_IOPAD(0x0a70, MUX_MODE0) /* SD_POW */
DM816X_IOPAD(0x0a74, MUX_MODE0) /* SD_CLK */
DM816X_IOPAD(0x0a78, MUX_MODE0) /* SD_CMD */
DM816X_IOPAD(0x0a7C, MUX_MODE0) /* SD_DAT0 */
DM816X_IOPAD(0x0a80, MUX_MODE0) /* SD_DAT1 */
DM816X_IOPAD(0x0a84, MUX_MODE0) /* SD_DAT2 */
DM816X_IOPAD(0x0a88, MUX_MODE0) /* SD_DAT2 */
DM816X_IOPAD(0x0a8c, MUX_MODE2) /* GP1[7] */
DM816X_IOPAD(0x0a90, MUX_MODE2) /* GP1[8] */
>;
};
usb0_pins: pinmux_usb0_pins { usb0_pins: pinmux_usb0_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
DM816X_IOPAD(0x0d00, MUX_MODE0) /* USB0_DRVVBUS */ DM816X_IOPAD(0x0d00, MUX_MODE0) /* USB0_DRVVBUS */
@ -137,7 +151,12 @@
}; };
&mmc1 { &mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc_pins>;
vmmc-supply = <&vmmcsd_fixed>; vmmc-supply = <&vmmcsd_fixed>;
bus-width = <4>;
cd-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
}; };
/* At least dm8168-evm rev c won't support multipoint, later may */ /* At least dm8168-evm rev c won't support multipoint, later may */

18
dts/src/arm/dm816x.dtsi
View File

@ -150,17 +150,27 @@
}; };
gpio1: gpio@48032000 { gpio1: gpio@48032000 {
compatible = "ti,omap3-gpio"; compatible = "ti,omap4-gpio";
ti,hwmods = "gpio1"; ti,hwmods = "gpio1";
ti,gpio-always-on;
reg = <0x48032000 0x1000>; reg = <0x48032000 0x1000>;
interrupts = <97>; interrupts = <96>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
}; };
gpio2: gpio@4804c000 { gpio2: gpio@4804c000 {
compatible = "ti,omap3-gpio"; compatible = "ti,omap4-gpio";
ti,hwmods = "gpio2"; ti,hwmods = "gpio2";
ti,gpio-always-on;
reg = <0x4804c000 0x1000>; reg = <0x4804c000 0x1000>;
interrupts = <99>; interrupts = <98>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
}; };
gpmc: gpmc@50000000 { gpmc: gpmc@50000000 {

2
dts/src/arm/dra7.dtsi
View File

@ -1111,7 +1111,6 @@
"wkupclk", "refclk", "wkupclk", "refclk",
"div-clk", "phy-div"; "div-clk", "phy-div";
#phy-cells = <0>; #phy-cells = <0>;
ti,hwmods = "pcie1-phy";
}; };
pcie2_phy: pciephy@4a095000 { pcie2_phy: pciephy@4a095000 {
@ -1130,7 +1129,6 @@
"wkupclk", "refclk", "wkupclk", "refclk",
"div-clk", "phy-div"; "div-clk", "phy-div";
#phy-cells = <0>; #phy-cells = <0>;
ti,hwmods = "pcie2-phy";
status = "disabled"; status = "disabled";
}; };
}; };

4
dts/src/arm/omap3.dtsi
View File

@ -92,6 +92,8 @@
ti,hwmods = "aes"; ti,hwmods = "aes";
reg = <0x480c5000 0x50>; reg = <0x480c5000 0x50>;
interrupts = <0>; interrupts = <0>;
dmas = <&sdma 65 &sdma 66>;
dma-names = "tx", "rx";
}; };
prm: prm@48306000 { prm: prm@48306000 {
@ -550,6 +552,8 @@
ti,hwmods = "sham"; ti,hwmods = "sham";
reg = <0x480c3000 0x64>; reg = <0x480c3000 0x64>;
interrupts = <49>; interrupts = <49>;
dmas = <&sdma 69>;
dma-names = "rx";
}; };
smartreflex_core: smartreflex@480cb000 { smartreflex_core: smartreflex@480cb000 {

1
dts/src/arm/rk3288.dtsi
View File

@ -411,6 +411,7 @@
"mac_clk_rx", "mac_clk_tx", "mac_clk_rx", "mac_clk_tx",
"clk_mac_ref", "clk_mac_refout", "clk_mac_ref", "clk_mac_refout",
"aclk_mac", "pclk_mac"; "aclk_mac", "pclk_mac";
status = "disabled";
}; };
usb_host0_ehci: usb@ff500000 { usb_host0_ehci: usb@ff500000 {

2
dts/src/arm/socfpga.dtsi
View File

@ -660,7 +660,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0xfff01000 0x1000>; reg = <0xfff01000 0x1000>;
interrupts = <0 156 4>; interrupts = <0 155 4>;
num-cs = <4>; num-cs = <4>;
clocks = <&spi_m_clk>; clocks = <&spi_m_clk>;
status = "disabled"; status = "disabled";

16
dts/src/arm/sun4i-a10-olinuxino-lime.dts
View File

@ -56,6 +56,22 @@
model = "Olimex A10-OLinuXino-LIME"; model = "Olimex A10-OLinuXino-LIME";
compatible = "olimex,a10-olinuxino-lime", "allwinner,sun4i-a10"; compatible = "olimex,a10-olinuxino-lime", "allwinner,sun4i-a10";
cpus {
cpu0: cpu@0 {
/*
* The A10-Lime is known to be unstable
* when running at 1008 MHz
*/
operating-points = <
/* kHz uV */
912000 1350000
864000 1300000
624000 1250000
>;
cooling-max-level = <2>;
};
};
soc@01c00000 { soc@01c00000 {
emac: ethernet@01c0b000 { emac: ethernet@01c0b000 {
pinctrl-names = "default"; pinctrl-names = "default";

3
dts/src/arm/sun4i-a10.dtsi
View File

@ -75,7 +75,6 @@
clock-latency = <244144>; /* 8 32k periods */ clock-latency = <244144>; /* 8 32k periods */
operating-points = < operating-points = <
/* kHz uV */ /* kHz uV */
1056000 1500000
1008000 1400000 1008000 1400000
912000 1350000 912000 1350000
864000 1300000 864000 1300000
@ -83,7 +82,7 @@
>; >;
#cooling-cells = <2>; #cooling-cells = <2>;
cooling-min-level = <0>; cooling-min-level = <0>;
cooling-max-level = <4>; cooling-max-level = <3>;
}; };
}; };

3
dts/src/arm/sun5i-a13.dtsi
View File

@ -47,7 +47,6 @@
clock-latency = <244144>; /* 8 32k periods */ clock-latency = <244144>; /* 8 32k periods */
operating-points = < operating-points = <
/* kHz uV */ /* kHz uV */
1104000 1500000
1008000 1400000 1008000 1400000
912000 1350000 912000 1350000
864000 1300000 864000 1300000
@ -57,7 +56,7 @@
>; >;
#cooling-cells = <2>; #cooling-cells = <2>;
cooling-min-level = <0>; cooling-min-level = <0>;
cooling-max-level = <6>; cooling-max-level = <5>;
}; };
}; };

3
dts/src/arm/sun7i-a20.dtsi
View File

@ -105,7 +105,6 @@
clock-latency = <244144>; /* 8 32k periods */ clock-latency = <244144>; /* 8 32k periods */
operating-points = < operating-points = <
/* kHz uV */ /* kHz uV */
1008000 1450000
960000 1400000 960000 1400000
912000 1400000 912000 1400000
864000 1300000 864000 1300000
@ -116,7 +115,7 @@
>; >;
#cooling-cells = <2>; #cooling-cells = <2>;
cooling-min-level = <0>; cooling-min-level = <0>;
cooling-max-level = <7>; cooling-max-level = <6>;
}; };
cpu@1 { cpu@1 {

2
dts/src/arm64/arm/juno-clocks.dtsi
View File

@ -8,7 +8,7 @@
*/ */
/* SoC fixed clocks */ /* SoC fixed clocks */
soc_uartclk: refclk72738khz { soc_uartclk: refclk7273800hz {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
clock-frequency = <7273800>; clock-frequency = <7273800>;