This fixes: 80264a8 driver: Call bus->remove instead of driver->remove
On mvebu it happens that:
Upon device shutdown, when iterating through the active device list,
the phy0 device is removed before mdio-mvebu. Then, when the mdio bus
device is removed, the phy0 device is removed again, here:
mdio_bus_remove(on mdio-mvebu)
mvebu_mdio_remove
mdiobus_unregister
unregister_device
mdio_bus_remove(on phy0)
Fix this by setting the mdio busses phy_map[phy->addr] to NULL when
unregistering the phy device, so that mdiobus_unregister no longer
finds a valid phy_device when iterating over the busses device list.
Reported-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
RGMII-ID just defines transmitter internal delays. Otherwise it is the
same as RGMII. As the differences only influence the behaviour of the
phy, the fec driver should handle it the same way as RGMII.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since 2011 barebox' of_device_id struct uses unsigned long type for data field:
struct of_device_id {
char *compatible;
unsigned long data;
};
Almost always struct of_device_id.data field are used as pointer
and need 'unsigned long' casting.
E.g. see 'git grep -A 4 of_device_id drivers/' output:
drivers/ata/sata-imx.c:static __maybe_unused struct of_device_id imx_sata_dt_ids[] = {
drivers/ata/sata-imx.c- {
drivers/ata/sata-imx.c- .compatible = "fsl,imx6q-ahci",
drivers/ata/sata-imx.c- .data = (unsigned long)&data_imx6,
drivers/ata/sata-imx.c- }, {
Here is of_device_id struct in linux kernel v4.0:
struct of_device_id {
char name[32];
char type[32];
char compatible[128];
const void *data;
};
Changing of_device_id.data type to 'const void *data' will increase
barebox' linux kernel compatibility and decrease number of 'unsigned
long' casts.
Part of the patch was done using the 'coccinelle' tool with the
following semantic patch:
@rule1@
identifier dev;
identifier type;
identifier func;
@@
func(...) {
<...
- dev_get_drvdata(dev, (unsigned long *)&type)
+ dev_get_drvdata(dev, (const void **)&type)
...>
}
@rule2@
identifier dev;
identifier type;
identifier func;
identifier data;
@@
func(...) {
<...
- dev_get_drvdata(dev, (unsigned long *)&type->data)
+ dev_get_drvdata(dev, (const void **)&type->data)
...>
}
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The e1000 driver uses the dma coherent functions
and thus can only be build for architectures implementing them.
Here is mips malta build error log:
drivers/built-in.o: In function `e1000_transmit':
drivers/net/e1000.c:(.text.e1000_transmit+0x80): undefined reference to
`dma_sync_single_for_device'
drivers/built-in.o: In function `e1000_poll':
drivers/net/e1000.c:(.text.e1000_poll+0x60): undefined reference to
`dma_sync_single_for_cpu'
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The CPSW uses DMA, so we should quiesce the device before leaving
barebox. This patch unregisters the CPSW properly on the device
remove callback. To do this we have to fix the error path in
cpsw_slave_setup, since this function can fail and we need a
known slave status in the remove function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Hello!
This patch adds support for USB ethernet adapter D-Link DUB-E100 H/W Rev C1. I tested this on
Beagleboneblack Rev A6A and our custom h/w based on i.mx6 Phytec phycore module. More
information about the adapter is here:
http://us.dlink.com/products/connect/high-speed-usb-2-0-fast-ethernet-adapter/
Signed-off-by: Mayur Nande <mayur.nande@medel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds support for the Marvell 88E1318S Gigabit Ethernet PHY.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As hinted in the linux kernel driver, pxa platforms such as mainstone,
stargate and idp have a broken design, where half-word writes not
aligned to a word address are not working.
This patch is a taking back the half-word write accessor for this
specific case from the linux kernel.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The configuration and control setup introduced in commit "extend the
driver for 91c94 and 91c96 support" suffers from a typo defect, which
makes the commit broken.
The typo happens to be in barebox tree, while it's not in the tested
patches I had, and there was a mismatch in my former submission, which
is fixed by this patch.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Marvell Neta's transmit descriptor (txdesc) is allocated by dma_alloc_coherent()
but not zeroed before calling mvneta_send the first time. This can cause spurious
transmit errors due to improperly set bits in txdesc's cmd_sts field.
Fix initial transmit errors by always writing whole cmd_sts field instead of ORing
the bits.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the Intel e1000 driver from U-Boot. The driver looks in parts
quite similar to the kernel driver, I don't know whether one is derived
from the other or if they both just have the same origin.
Many coding style related issues are fixed, the code is simplified in
several places. All features of the original driver should still be there,
only fiber support is disabled since it's quite unlikely that this is
used in barebox.
The driver has been tested with the i.MX6 PCIe driver and a I210 e1000
device (0x8086:0x1533)
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This better separates the DMA from the MMU functionality.
Also move all drivers that only depends on asm/mmu.h for the alloc
functions over to the common header.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As a lot drivers currently rely on the 1:1 virt->phys mapping on ARM
we define DMA_ADDRESS_BROKEN to mark them. In order to use them on
other architectures with a different mapping they need proper fixing.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows to consolidate the prototype of this function across
architectures. Also guard against calles that pass in NULL as the
dma handle pointer.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The cache should be invalidated when transfering ownership of a buffer
to the device. Otherwise the writeback of dirty cache lines can
corrupt the hardware written data.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver is written in a way that is should also work without
DT, but it had a compile time dependency on CONFIG_OFTREE.
Fixes:
drivers/built-in.o: In function `dwc_probe_dt':
drivers/net/designware.c:413: undefined reference to `of_get_phy_mode'
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Silence warning about cast from volatile to normal pointer,
as this is the intended bhavior here.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Improve smc1111 driver debug messages by printing the register accessed,
the current bank, and the values.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All the smcs family chips 91c94, 91c96, 91c100, 91c111 share almost the
same behavior and register sets. The noticeable exceptions are coped
with in this patch, ie :
- 91c94 and 91c96 only have an internal 10 Mbps phy
The registers used for phy discovery on later chips will corrupt the
91c96 state.
- 91c94 and 91c96 have a control and config register quite different
from their 91c1xx conterparts
A platform data user defined couple of registers is introduced. If
these values are 0, 91c1xx legacy behavior is assumed.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Smc network IPs can be wired up in different funny ways. For example the
lubbock pxa25x development platform wires all address lines shifted by
2, ie. bus A2 is smc91c96 A0, bus A3 is smc91c96 A1 etc ...
In order to cope with the different possible combination, add a shift
parameter for addresses.
By default, the old behaviour using the 32 bit accesses is kept.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This file originates in Linux. Linux has it under include/linux/
directory since commit dccd2304cc90.
Let's move it to the same place as well in barebox.
This commit was generated by the following commands:
find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:'
git mv include/sizes.h include/linux/
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The CPSW has two slaves. When one of them fails to setup continue
anyway with the other one. This fixes a crash in the beaglebone black
which only has one slave connected. The code doesn't find a phy on
the second slave and bails out, but the error path is broken: It frees
the private data structures which contains used resources.
Reported-by: Philippe Leduc <ledphilippe@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As the SMC1111 has a shared pool of 2k memory buckets for both
transmission and reception, and as there are variants which have as few
as 4 buckets in total, the memory pool can be hogged by unclaimed
receptions, and impeed any further transmission.
This happens on the zylonite pxa board, where 4 packets, most probably
icmp and arp, fill the 4 buckets, preventing any further ethernet
transmission, and stalling the driver.
The fix is rather rough : whenever all the buckets are filled by
reception packets, and if a transmission is required, the transmission
code path will empty up all received packets.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix for a compiler complaint, because print_packet is needed by a
function before it is declared.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The buffer descriptors are allocated from coherent memory, so there
is no cache maintenance needed. Only tell the compiler that the descriptors
can be modified by the hardware.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Jan Luebbe
Sascha Hauer
Markus Pargmann
Antony Pavlov
Mayur Nande
Sebastian Hesselbarth
Robert Jarzmik
Lucas Stach
Andrey Panov
Lucas Stach
Masahiro Yamada