Poll for a well defined time in musb_init. The current counting loop
takes too short for some devices. Tested on OMAP3 with a rather slowish
memory stick.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To make updating barebox to nand easy. To bootstrap from a SD
card:
barebox_update -t nand-xload /boot/MLO
barebox_update -t nand /boot/barebox.bin
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds a barrier after setup_c(). This is necessary because otherwise
some global variable assignments may be reordered by the compiler to be
executed before setup_c which cannot work.
This was observed when doing other unrelated changes to the start function,
it seems in current mainline state the compiler does not actually reorder
the code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The AM335x SPI NOR barebox update handlers only writes a file to a device,
so use the generic handler for this purpose.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The most standard update handler will simply copy a file to a device.
This can be shared across several users, so add a standard handler for
this operation.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix the DDR init sequence the same way as done by aee0013e53b339a5
from U-boot in order to prevent the boot hang under reboot stress test.
Quoting this commit log:
"Currently by running the following test:
=> setenv bootcmd reset
=> save
=> reset
, we observe a hang after approximately 20-30 minutes of stress reboot test.
Investigation of this issue revealed that when a single DDR chip select is used,
the hang does not happen. It only happens when the two chip selects are active.
MX53 reference manual states at "28.6.2 Memory ZQ calibration sequence":
"The controller must keep the memory lines quiet (except for CK) for the ZQ
calibration time as defined in the Jedec (512 cycles for ZQCL after reset, 256
for other ZQCL and 64 for ZQCS)."
According to the SDE_0 and SDE_1 bit descriptions from register ESDCTL_ESDCTL:
"Writing 1 to SDE0 or SDE1 will initiate power up delays as JEDEC defines.
Power up delays are a function of the configured memory type (DDR2/DDR3/LPDDR2)"
So make sure to activate one chip select at time (CS0 first and then CS1 later),
so that the required JEDEC delay is respected for each chip select.
With this change applied the board has gone through three days of reboot stress
test without any hang."
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The m25p80 driver now depends on MTD_SPI_NOR which is disabled in all
defconfigs, so this effectively disables the m25p80 driver in all
defconfigs. Fix this by selecting MTD_SPI_NOR which is library code
without further dependencies. Also let m25p80 depend on SPI because
it needs the SPI code and won't link without it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are still some nodes not used in barebox. Removed them.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Apparently this was here to fix issues with some QEMU version,
but hasn't worked in the intended way for a long time. The probe
code should be mature enough by now, so this workaround isn't
needed anymore.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The probe code now does a much better job at detecting bad BARs.
Also make sure to preserve any previous content of the BAR
registers if we don't relocate them.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The mtd concat layer supports concatenating several MTD devices
into a single one. This is nearly as-is from the corresponding
Kernel code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
devinfo on a non existing device prints:
no such device: blah
devinfo: Operation not permitted
The second message comes because devinfo returns -1 which is -EPERM.
Just return -ENODEV which will print:
devinfo: No such device
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- use consistent variable types (drop uchar, ushort and friends)
- remove whitespace between functions and opening brace
- Add some blank lines to rectify code
- drop 'rc' and 'retcode' and use 'ret' consistently
- Do not put variable assignment into if()
- drop unncessary braces
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some members in struct cfi_qry are unaligned. Use get_unaligned_*
to access them. Fixes unaligned aborts on busses which don't support
unaligned accesses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some messages produce a lot of log spam. Turn them into
dev_vdbg to make some more important messages more visible.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use variables instead of long defines to get the loops into a single
line. Also use goto to move the deeply indented code more to the left.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
TO get rid of some ifdefs. While at it add the vendor code of
the unsupported vendor to the error message.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It was possible to login with ctrl-c or an empty password. This bug was
introduced by the recent digest changes in common/password.c (e49a47fb).
The function check_passwd returns now also negative error codes which were
not correctly handled in do_login.
Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When blspec_scan_cdev finds an UBI device then attach it. This
allows us to boot blspec entries found on the UBIFS images inside
UBI volumes by pointing to the corresponding mtd partition.
With this we can do 'boot nand0.root' or even 'boot=nand0' on the
commandline.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It's "uint32" not "u32" and we use integers for the "enum32" defaults.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The size field in the GP header has to include its own size.
This can be easily misread in the TRM.
Sometimes, when the gp_header size is not included, the ROM code
will not copy the complete MLO into the SRAM. This happens when the MLO file
size is 98823 bytes (and the value of GP header size field is 98303 bytes).
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This change enables Sphinx to resolve the reference.
Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If the size between memory regions is smaller than one page, the
size is rounded down to 0. This results in a region request failure.
This commit skips the memory region whose size is smaller than a page.
Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We used to collect all sections beginning with __clk_of_table_ in a single
section in the linker using KEEP(*(.__clk_of_table_*)). That the sentinel
entry ended up as the last entry was pure luck, but not always the case.
Instead of putting all entries in different sections we now put all entries
in the same section. Only the sentinel entry gets its own section and is
collected by the linker separately.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reported-by: Andreas Willig <andreas.willig@rafi.de>
Tested-by: Andreas Willig <andreas.willig@rafi.de>
Sascha Hauer
Fabio Estevam
Teresa Remmet
Lucas Stach
Hubert Feurstein
Marc Kleine-Budde
Wadim Egorov
Juergen Borleis
Renaud Barbier