this will avoid __bswapsi2 issue see with gcc 4.5.1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch removes the inclusion of libgcc functions into Barebox on the ARM
architecture. Only the really needed functions are provided in the lib_arm
directory. Those implementations are copied from Linux where they are well
proven related to reliably, performance.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
from linux kernel v2.6.37
This patch adds various C and assembler macros that help with using
the unified assembler syntax for compiling files to either ARM or
Thumb-2 modes.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The idea is to panic() when there is no memory available for normal
operation. Exception: code which can consume arbitrary amount of RAM
(example: files allocated in ramfs) must report error instead of panic().
This patch also fixes code which didn't check for NULL from malloc() etc.
Usage: malloc(), memalign() return NULL when out of RAM.
xmalloc(), xmemalign() always return non-NULL or panic().
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch updates the clock dividers for the graphics
processor.
It is based on commit:
c4e1d9b718b65436e30422506f43fa4eb21069d3
at http://arago-project.org/git/projects/?p=u-boot-omap3.git
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In function get_osc_clk_speed(), the SYS_CLK divider
was being changed 'suddenly'.
This change has cascading effect on the derived clocks,
leading to inconsistent behavior - often a crash.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds the basic clock initizlization for OMAP36XX.
Portion of this patch is based on commit:
29587220909e639cda4fb5a35cb5bf33aba242b9
at http://arago-project.org/git/projects/?p=x-load-omap3.git
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch defines functions that contain steps to configure
DPLL for each clock domain.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds the DPLL tables for OMAP36XX and the
necessary functions to access these tables.
Both definitions follow the conventions used for
OMAP34XX.
All tables, currently, correspond to SYSCLK at 26MHz.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The PER domain dpll significantly differs from 34x.
This patch defines struct to collate related info.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds support to detect the different
OMAP36XX silicon revisions.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds the support to detect OMAP3630.
It also re-organizes the CPU_xxxx definitions in sys_info.h
to ascending order so that newer silicons can be added at
bottom.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This (re)enables boards to have multiple boot headers so that the one
image can be used for booting from multiple boot sources.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds suffix 34x to DPLL tables and related functions to
indicate that they are applicable to OMAP34XX only.
The suffix was required to prepare for support of OMAP36XX in the
subsequent patch series.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch updates the DPLL functions to return correct
DPLL table based on the cpu revision.
The DPLL table for PER domain is same across all revisions,
but the function signature has been updated to maintain
consistency in the API definition.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Content from monolith implementation in prcm_init() has been
moved into separate functions - per clock domain. This makes
code easy to adapt for silicon revisions and families.
Few cosmetic changes may have been done during this movement.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds DPLL tables for OMAP34xx ES1.0 and ES2.0.
When more than one table is added, the get_xxx_dpll_param()
was updated to use the tables corresponding to ES2.0 to
ensure that current functionality doesn't break.
In addition, the tables have been reformatted for better
readability.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch ensures that all silicon revisions
are detected. (Current implementation cannot
detect ES1.0).
In the process, the 'seemingly' hardcoded macros
identifying cpu revision (e.g. CPU_ES1P1) have
been updated to include the CPU name as well.
(The mapping of IDCODE value to silicon revision
may not be same across different OMAP families).
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch sets the cpu type based on the hawkeye value
read from the IDCODE register. So far, cpu type was
hardcoded.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds macros to extract the hawkeye
and version number from IDCODE value.
Updated function get_cpu_rev() to use new macro.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There is no really need for restricted variable types for the parameters.
Replace them by standard C types with the same behaviour.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In order to support video graphics output on i.MX23/i.MX28 based platforms,
a calculation routine for the pixel clock is required.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With the change to Hz as the main clock unit on the STM architecture the
Chumby must also use this unit.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
