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Author SHA1 Message Date
Jean-Christophe PLAGNIOL-VILLARD 0d8ce86780 switch boards to lwl-y
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-02-21 14:42:51 +01:00
Sascha Hauer 168b2630e2 ARM AT91: switch at91sam9 to barebox_arm_entry part1
This switches the at91sam926x, 9g10 and 9g20 over to barebox_arm_entry.
For these SoCs we currently support reading back the memory size from
the SDRAM controller, so all of these can have a common reset() function.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2013-02-04 15:52:39 +01:00
Jean-Christophe PLAGNIOL-VILLARD 2754a114ba at91sam9261ek: add boostrap support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2013-01-31 19:13:58 +01:00
Jean-Christophe PLAGNIOL-VILLARD d923f0dedb at91: Introduction of at91sam9261 SOC.
AT91sam9261 series is an ARM 926ej-s SOC family clocked at 190/100MHz.

The first board that embeds at91sam9261 chip is the AT91SAM9261-EK.
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2010-11-10 19:45:15 +08:00