Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Move to the common streaming DMA ops in order to get rid of
the direct usage of the ARM MMU functions for the cache
maintenance.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This better separates the DMA from the MMU functionality.
Also move all drivers that only depends on asm/mmu.h for the alloc
functions over to the common header.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As a lot drivers currently rely on the 1:1 virt->phys mapping on ARM
we define DMA_ADDRESS_BROKEN to mark them. In order to use them on
other architectures with a different mapping they need proper fixing.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This allows to consolidate the prototype of this function across
architectures. Also guard against calles that pass in NULL as the
dma handle pointer.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The cache should be invalidated when transfering ownership of a buffer
to the device. Otherwise the writeback of dirty cache lines can
corrupt the hardware written data.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver is written in a way that is should also work without
DT, but it had a compile time dependency on CONFIG_OFTREE.
Fixes:
drivers/built-in.o: In function `dwc_probe_dt':
drivers/net/designware.c:413: undefined reference to `of_get_phy_mode'
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Silence warning about cast from volatile to normal pointer,
as this is the intended bhavior here.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Improve smc1111 driver debug messages by printing the register accessed,
the current bank, and the values.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All the smcs family chips 91c94, 91c96, 91c100, 91c111 share almost the
same behavior and register sets. The noticeable exceptions are coped
with in this patch, ie :
- 91c94 and 91c96 only have an internal 10 Mbps phy
The registers used for phy discovery on later chips will corrupt the
91c96 state.
- 91c94 and 91c96 have a control and config register quite different
from their 91c1xx conterparts
A platform data user defined couple of registers is introduced. If
these values are 0, 91c1xx legacy behavior is assumed.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Smc network IPs can be wired up in different funny ways. For example the
lubbock pxa25x development platform wires all address lines shifted by
2, ie. bus A2 is smc91c96 A0, bus A3 is smc91c96 A1 etc ...
In order to cope with the different possible combination, add a shift
parameter for addresses.
By default, the old behaviour using the 32 bit accesses is kept.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This file originates in Linux. Linux has it under include/linux/
directory since commit dccd2304cc90.
Let's move it to the same place as well in barebox.
This commit was generated by the following commands:
find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:'
git mv include/sizes.h include/linux/
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The CPSW has two slaves. When one of them fails to setup continue
anyway with the other one. This fixes a crash in the beaglebone black
which only has one slave connected. The code doesn't find a phy on
the second slave and bails out, but the error path is broken: It frees
the private data structures which contains used resources.
Reported-by: Philippe Leduc <ledphilippe@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As the SMC1111 has a shared pool of 2k memory buckets for both
transmission and reception, and as there are variants which have as few
as 4 buckets in total, the memory pool can be hogged by unclaimed
receptions, and impeed any further transmission.
This happens on the zylonite pxa board, where 4 packets, most probably
icmp and arp, fill the 4 buckets, preventing any further ethernet
transmission, and stalling the driver.
The fix is rather rough : whenever all the buckets are filled by
reception packets, and if a transmission is required, the transmission
code path will empty up all received packets.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix for a compiler complaint, because print_packet is needed by a
function before it is declared.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The buffer descriptors are allocated from coherent memory, so there
is no cache maintenance needed. Only tell the compiler that the descriptors
can be modified by the hardware.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This driver currently only works on OpenRISC, as it uses
the cache flush/invalidate functions of this arch.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch introduces the mvneta driver to support the network controller
found in Armada 370/XP SoCs.
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit adds support for Marvell's 88E1543 PHY chip. This chip is
almost identical to the 88EE1545, except the 88E1545 supports QSGMII
and the 88EE1543 supports SGMII.
Therefore, the same configuration function is used for both PHYs. For now,
the only initialization provided for the 88EE1543 is the LED setup.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit adds support for Marvell's 88E1545 PHY chip. In particular, this
allows to support QSGMII interfaces.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Just a cosmetic clean-up to fix the indentation of the entries
in the phys array.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The processing of the buffer might change some data, which
will eventually trigger a cache writeback later on, corrupting
data written by the network chip. Clean the cache range
to make sure there is no writeback pending.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Set the phy device_node pointer to the equivalent cpsw slave node.
We need this, because phy drivers using this pointer for their configuration.
Create and register the phy device in cpsw_probe(), so that this phy device
can be found later by phy_device_connect() in cpsw_open().
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Adds support for ksz9031 PAD skew configuration over devicetree.
Based on a patch from the linux kernel.
Author: Hubert Chaumette <hchaumette@adeneo-embedded.com>
Original commit: 6e4b82730c7525504fc485b370c7f09e594e2e96
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
If only one port is pinned out, probe fails
as the second port phy_id is not found.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Lucas Stach
Sascha Hauer
Andrey Panov
Lucas Stach
Robert Jarzmik
Masahiro Yamada
Ezequiel Garcia
Wadim Egorov
Teresa Gámez
Jan Weitzel