Switch to new environment and add the bootscripts needed for mmc. Also,
update defconfig for new environment.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Needed so that the linker can throw it away when unused. This is needed
at least on current master for being able to enable pbl support for omap3
boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- increased the region size for OMAP3, as it was not correct
- decrease region size for OMAP4 to prevent overlapping.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
As the gpio functions are not available at this point, set the gpio manually.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Booting from SPI on an AM35xx (and possibly other TI SOCs) requires
a special format:
- 32 bit image size in big-endian
- 32 bit load address in big-endian
- binary image converted from little- to big-endian
The mk-am35xx-spi-image tool converts barebox.bin to
this format.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On some SoCs (for example AM35xx), the ROM bootloader passes useful
information in r0 when jumping to barebox.
To avoid overwriting this in the generic reset code, we introduce
common_reset as a C function and as an assembler macro. This is then
called form the reset entry point (either in common or in board code).
This patch is based on code by Sascha Hauer <s.hauer@pengutronix.de>.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
OMAP3 is the only architecture which has a arch_init_lowlevel in
which it invalidates the dcache. This can easily be done in
board_init_lowlevel aswell. Since on OMAP3 we are always executed
in SRAM we'll never need a board specific lowlevel_init. So the
easiest way of getting rid of this special handling is to just
rename the function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
OMAP3 is the only architecture which has a arch_init_lowlevel in
which it invalidates the dcache. This can easily be done in
board_init_lowlevel aswell. Since on OMAP3 we are always executed
in SRAM we'll never need a board specific lowlevel_init. So the
easiest way of getting rid of this special handling is to just
rename the function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add functions to read the barebox_arm_head, check barebox magicword
and read out the barebox image size.
Create a inital partion of 1Mb to access the barebox image on nand.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Change clock init to allow early gpio access. Add support for 4460 clocks.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
based on: [U-Boot] [PATCH v 4/5] omap4: support TPS programming
TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.
VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.
Signed-off-by: F. Gasnier fabrice.gasnier@cenosys.com
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With pbl support enabled most boards need a pbl-y for their lowlevel
stuff.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Use the prefetch engine to improve NAND performance. The howto
is derived from the Kernel. Unlike the kernel we do not make
the access mode configurable.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of passing several options into the nand register function
it is much more straight forward to just pass the platformdata.
While at it, rename the function to omap_add_gpmc_nand_device to
better describe what it does.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- dev_ready is supposed to return whether the device is ready or
not, not to poll until the device is ready.
- dev_ready should return true for ready and false for not ready
- waitpin polarity is not needed (at least the kernel does not have it)
- wait_mon_mask must be 32bit.
The code was unused since no board specified a wait pin, so no breakage
included. This also removes the now unused timeout variable from
platformdata.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Jan Luebbe
Vicente
Sascha Hauer
Teresa Gámez
Jean-Christophe PLAGNIOL-VILLARD
Jan Weitzel