A problem when using 2nd stage booting on mvebu is that the first bootloader
already switched the register window location from 0xd0000000 to
0xf1000000 by writing to 0xd0000080. When the second bootloader also
tries to do this switch it writes to the wrong location resulting in an
exception and so a boot failure.
For this reason the base address of the register window is passed in the
barebox header and picked up from there by early code. In a further
patch bootm is taught to put the actual position of the window there for
the second bootloader to finally make second stage booting work.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This commit switches the RaspberryPi arch over to probe Barebox
from the builtin DT and enables multi-image builds.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Makes more space available for the malloc area and will allow
to switch to multi-image later on.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch contains the barebox implementation for the ARM
"Power State Coordination Interface" (PSCI).
The interface is aimed at the generalization of code in the following
power management scenarios:
* Core idle management.
* Dynamic addition and removal of cores, and secondary core boot.
* big.LITTLE migration.
* System shutdown and reset.
In practice, all that's currently implemented is a way to enable the
secondary core one some SoCs.
With PSCI the Kernel is either started in nonsecure or in Hypervisor
mode and PSCI is used to apply power to the secondary cores.
The start mode is passed in the global.bootm.secure_state variable. This
enum can contain "secure" (Kernel is started in secure mode, means no
PSCI), "nonsecure" (Kernel is started in nonsecure mode, PSCI available)
or "hyp" (Kernel is started in hyp mode, meaning it can support
virtualization).
We currently only support putting the secure monitor code into SDRAM,
which means we always steal some amount of memory from the Kernel.
To keep things simple for now we simply keep the whole barebox binary in
memory
The PSCI support has been tested on i.MX7 only so far. The only
supported operations are CPU_ON and CPU_OFF.
The PSCI and secure monitor code is based on the corresponding U-Boot
code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
PBL is another feature, which needs some love to work on ARM64.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
So far it was hardcoded for each board if defenv-1 or defenv-2 is used.
Make this a user choice so that a particular board no longer enforces
a defenv type.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Don't allow it to be selected in a ARM64 build.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We don't yet have an implementation for those two features on ARM64, so move
them to a place where they are only selected for a 32bit barebox.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
None of the available boards for mvebu has any environment additions, so
this is safe.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Board specific ATAGs might be passed to vendor provided kernels via the
ARM_BOARD_APPEND_ATAG option. In this case, the board specific ATAGs will
be appended to the end of the ATAG list.
Anyway, some vendor provided kernels might crop the ATAG list at ATAG_MEM,
also chopping off the board specific ATAGs, see linux squash_mem_tags() as
reference. The Kindle-3 kernel is one example.
This conflict might be solved by a) making ATAG_MEM optional which might break
the existing behavour around squash_mem_tags() or b) by allowing the insertion
of board specific ATAGs in front of ATAG_MEM which violates the requirement
from Documentation/arm/Booting to order ATAGs by increasing address.
Add option to insert board specific ATAGs in front of ATAG_MEM.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Claiming that all of PXA has CLK implemented, while only PXA3XX
selects the relevant clock implementations causes lots of build
failures for the other PXA architectures.
Fix it by moving the HAVE_CLK select to the one PXA arch, that
actually has it.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch adds Raspberry Pi 2 support in barebox. The features should
be the same like the current RPi status in barebox.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch changes the most part of mach-bcm2835 to mach-bcm283x. This
prepares to add RPi2 support which is a bcm2836. This patch changes the
Kconfig entry namens to BCM283X for drivers only. These drivers should
working the same in bcm2836.
While updating defconfig I added LED support/trigger option.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To allow PXA3xx nand driver to be reused on Marvell Armada 370/XP,
prepare to provide a common clock for the NAND driver on PXA3xx.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
To be able to use dump_stack() without support exception handling the
definition of dump_stack has to move to a file that is actually compiled
without ARM_EXCEPTIONS.
Fixes: d332597c7c ("ARM: make exception handling optional")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add semihosting API implementation and implement a filesystem driver
to access debugging host filesystem using it.
Tested on Freescale SabreSD board (i.MX6Q) using OpenOCD
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In the current multi image build process the DTBs end up uncompressed
in the PBL. This can be annoying because the PBL is often very size
constrained.
This patch allows to put the DTBs in as lzo compressed binary into
the PBL. Since lzo offers quite good compression ratios for DTBs no
other compression algorithm has been implemented for now.
Boards which want to use the compressed DTBs only have to change
the __dtb_ prefix in the DTB name to __dtb_z_. Also they should select
ARM_USE_COMPRESSED_DTB to make sure barebox supports uncompressing
the DTB.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
SoCFPGA is completely multi-image enabled and probes the barebox
from a built-in DT, so there is no point in building a barebox
image that isn't able to probe from DT.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
AT91 has a custom barebox head that doesn't support Thumb2.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current supported Rockchip board is initialized from a
builtin DTB and I suppose all future boards will do the same.
Fixes various missing functions and prototypes in Rockchip clk
driver.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
I stumbled across this option a few times already and always found it
to be at least confusing when and why it should be enabled.
Since commit b7451329b5 (ARM: OMAP3: invalidate L2 cache using ROM API)
it is actually unused and only adds confusion. Better remove it.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
useful to use it for testing on qemu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We already have arch/arm/mach-versatile/include/mach/debug_ll.h
but HAS_DEBUG_LL is missed.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are only a few users of BUILTIN_DTB left, but those should
alsways fill thr name properly. Avoids lots of failures in the
randconfig builds.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It doesn't make sense to allow building in a single DTB into a
multiimage barebox, so we can spare the user this option.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Remove OFDEVICE dependency from PINCTRL. It won't do
much then, so add a comment to Kconfig when PINCTRL is
selected without OFDEVICE
- Let Architectures only select PINCTRL instead of the
particular driver. Change the drivers to 'default y if $SOC'
to make sure the drivers are still compiled if the corresponding
SoC is selected
This fixes Kconfig warnings like:
warning: (PINCTRL_ARMADA_370 && PINCTRL_ARMADA_XP && PINCTRL_DOVE && PINCTRL_KIRKWOOD) selects PINCTRL which has unmet direct dependencies (OFDEVICE)
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This driver is based on mach-at91/gpio.c and linux pinctrl driver.
The driver contains the gpio and pinctrl parts (like in linux) because the two parts
share some structures and logics.
Signed-off-by: Raphaël Poggi <poggi.raph@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Jan Luebbe
Sascha Hauer
Oleksij Rempel
Uwe Kleine-König
Lucas Stach
Raphael Poggi
Alexander Kurz
Alexander Aring
Sebastian Hesselbarth
Andrey Smirnov
Lucas Stach
Andrey Panov
Jean-Christophe PLAGNIOL-VILLARD
Antony Pavlov