omap3 has a soc specific reset function, make sure it calls common_reset
so that the proper CPU flags are set.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In addition, collapse adjacent comment blocks into one and remove
extraneous blank lines.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Needed so that the linker can throw it away when unused. This is needed
at least on current master for being able to enable pbl support for omap3
boards.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On some SoCs (for example AM35xx), the ROM bootloader passes useful
information in r0 when jumping to barebox.
To avoid overwriting this in the generic reset code, we introduce
common_reset as a C function and as an assembler macro. This is then
called form the reset entry point (either in common or in board code).
This patch is based on code by Sascha Hauer <s.hauer@pengutronix.de>.
Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
OMAP3 is the only architecture which has a arch_init_lowlevel in
which it invalidates the dcache. This can easily be done in
board_init_lowlevel aswell. Since on OMAP3 we are always executed
in SRAM we'll never need a board specific lowlevel_init. So the
easiest way of getting rid of this special handling is to just
rename the function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
OMAP3 is the only architecture which has a arch_init_lowlevel in
which it invalidates the dcache. This can easily be done in
board_init_lowlevel aswell. Since on OMAP3 we are always executed
in SRAM we'll never need a board specific lowlevel_init. So the
easiest way of getting rid of this special handling is to just
rename the function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
No need to do this so early. We can't print anything right
now anyway, so there is no need to setup vectors.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
There is no need to call a_init before relocation, so rename
the function to omap3_core_init and call it from board code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
The X-loader startup relocates to SRAM anyway, so there
is no need to be runnable from flash for the clock code.
This config is disabled in all defconfigs anyway, so remove
it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sanjeev Premi <premi@ti.com>
Add OMAP3 architecture specific dcache flush back in.
Commit 78104ae181 isolates
the cache handling to appropriate handlers, but certain
architectures may need special handling esp during boot
time.
without this patch, building barebox with
omap3530_beagle_per_uart_defconfig
and attempting to use peripheral download with pusb/pserial
will fail as OMAP ROM code depends on 2nd stage bootloaders
to clean up things.
Discussion Thread: http://www.spinics.net/lists/u-boot-v2/msg01286.html
Cc: Michael <mgr@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[Patch 11/17] U-Boot-V2:ARM:OMAP3: Add support for OMAP3 Silicon files
This patch introduces support for OMAP3430 - provides for generic OMAP3 files.
Signed-off-by: Nishanth Menon<x0nishan@ti.com>
Sascha Hauer
Robert P. J. Day
Jan Luebbe
Nishanth Menon
Jean-Christophe PLAGNIOL-VILLARD
Nishanth Menon