The mmci implementation uses some specific arm amba functions, so add a
depends on ARM_AMBA.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We need #include "mmci.h" only and not #include <mmci.h>
which don't exists.
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some controller such as the ARM AMBA pl181 can not handle more than 16bits
data length request.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Switch from local mailbox code to using the newly created clock device.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With commit c2ef47887 mci.f_max default value is
only set when pdata is available.
Fix this with always setting the mci.f_max default
value and overrite it when pdata available.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can specify the devname in the board
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
At least i.MX53 has errata ENGcm12360:
Occurs when a pending command which issues busy is completed.
For a command with R1b response, the proper software sequence
is to poll the DLA for R1b commands to determine busy
state completion. The DLA polling is not working properly for
the ESDHC module. This is relevant for all eSDHC ports (eSDHC1-4 ports)
DLA bit in PRSSTAT register cannot be
polled to wait for busy state completion.
Updated block guide to reflect that DLA is not applicable to detect
busy state, instead, should poll bit 24 in PRSSTAT register (DLSL[0] bit)
to check that wait busy state is over.
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The driver is already capable of 8 bit buswidth support, so advertise
it to actually make use of it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to the SD Host Controller Specification Version 3.00, the ADMA error
status bit is on the wrong bit. Fix this.
While at it, add the missing standard error status bits.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MXS specific devices have some common infrastructure in the kernel
known as STMP devices. We have the same in barebox, but with a
mxs_ prefix instead of a stmp_ prefix. As some STMP devices are
also found on i.MX6 move the common infrastructure out of MXS
specific files and use the stmp_ prefix.
This is done in preparation for i.MX6 NAND support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MMC/SD cards normally have a DOS/GPT partition table, but sometimes
barebox uses the unpartitioned area to store its environment. Add
devicetree partition parsing also for SD/MMC cards so that we have
a way to describe the partition in the devicetree.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The tran_speed field as decoded from csd is valid in most cases,
so use it to determine the maximum clock we can support. It is
not valid though for MMC highspeed cards, in this case the
csd contains invalid values and we have to set tran_speed explicitly
to the maximum speed. As the values passed into mci_set_clock are
now based on tran_speed we no longer have to limit the rate to
tran_speed in mci_set_clock.
The (intended) effect of this patch is that highspeed MMC cards are
no longer limited to non highspeed rates.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In devinfo for the card also print:
- capabilities for host and card
- current bus width
- current clock
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use MMC_CAP_ names instead of MMC_MODE_. This makes it more
clear that these are capabilities of host/card and do not refer
to the current mode. These are in line with the Linux Kernel
except for MMC_CAP_MMC_HIGHSPEED_52MHZ which could be fixed
later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We already have the possibility to register a mci with a certain
filename to get persistent names. However, the device needed to
find the probe parameter still has the name 'mcix'. This patch
changes this by registering the mci device with the same name
as the filename.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since the info is device specific and not driver specific, attach
the callback to the device. This makes it possible to have a info
callback for a device which does not have a driver attached.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some MMC cards support boot partitions. These are special regions
on the MMC card intended to put a bootloader on.
This patch adds support for these partitions, they are accessible
as /dev/diskx.boot[0|1].
Additionally the partitions can be configured bootable using a
device parameter. This can be used to mark the user area or one
of the boot partitions as bootable.
Since this feature is mostly seen on eMMC cards it is made optional
to lower the size impact for boards which do not have eMMC.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This updates the i.MX esdhc divider settings to FSLs U-Boot.
Current timings work fine for SD cards, but not for eMMC.
Although the calculation is fine according to the datasheet and reading from
eMMC works, writing is broken. Atleast on i.MX53/tqma53.
With this patch the result is the same, but uses different divider values to
achieve it.
While at it, replace the udelay with a busy-loop.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This gives the SDHCI specific registers a common name and moves
them to a separate file for use by other SDHCI like drivers.
The SDHCI spec has some 16bit and 8bit registers. The i.MX accesses
these as 32bit registers. These register defines now are named after
the SDHCI registers they combine into one, for example:
SDHCI_HOST_CONTROL__POWER_CONTROL__BLOCK_GAP_CONTROL
is the 32bit version of the SDHCI registers HOST_CONTROL, POWER_CONTROL
and BLOCK_GAP_CONTROL.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Using the MXS MCI driver with an eight bit capable eMMC results into the
'devinfo' message the interface uses '0' bits for data transfer:
barebox:/ devinfo mxs_mci0
resources:
num : 0
start : 0x80034000
size : 0x00002000
driver: mxs_mci
bus: platform
Interface
Min. bus clock: 1476 Hz
Max. bus clock: 48000000 Hz
Current bus clock: 24000000 Hz
Bus width: 0 bit
The eight bit interface width is stored internally as value '2'. And a two bit
'2' ends up into 0xfffffffe when used as an array index. Using an unsigned
field instead fixes this issue:
barebox:/ devinfo mxs_mci0
resources:
num : 0
start : 0x80034000
size : 0x00002000
driver: mxs_mci
bus: platform
Interface
Min. bus clock: 1476 Hz
Max. bus clock: 48000000 Hz
Current bus clock: 24000000 Hz
Bus width: 8 bit
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
