9
0
Fork 0
Commit Graph

3 Commits

Author SHA1 Message Date
Sascha Hauer 77322aa896 Treewide: remove address of the Free Software Foundation
The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-09-17 10:57:41 +02:00
Juergen Beisert d61e266d24 phyCORE-i.MX27: Keep frequency multiplier enabled to be able to do a warmstart
commit 7d25a0552dd3a4b65412ae1cbf8f9ca8a88b5d27
Author: Juergen Beisert <jbe@pengutronix.de>
Date:   Thu Nov 25 17:49:11 2010 +0100

    Keep frequency multiplier enabled to be able to do a warmstart

    The wachtdog's reset does only reset the ARM core, not the whole silicon.
    But the PLLs seems to do some strange things: It seems they switch back to
    the low frequency reference when the watchdog barks. But in the case the
    frequency multiplier is off (not used due to 26 MHz reference usage) the
    machine stops, because the PLLs are stopping due to the lack of a reference
    frequency. As the power on reset will set the FPM_EN bit again, a power cycle
    brings the machine back to life.
    By keeping the frequency multiplier enabled, also a warmstart triggered by the
    watchdog can restart the machine now.

    Signed-off-by: Juergen Beisert <jbe@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-08-25 11:59:24 +02:00
Juergen Beisert b531c53e74 Switch the i.MX27's PLL in a safe manner
Changing PLL settings is somehow tricky on the i.MX27: Whenever the clock
speed of the main PLL is changed, the clock stops for about 100 us until the
PLL locks into the new frequency. While this clock stop, also the SDRAM
controller cannot refresh the memory, because it uses the same clock source.
This can lead into data loss and random system crashes.

This patch divides the PLL setting in two steps. First step is to re-program
the PLL and clock settings to values possible at a core supply of 1.25 V.
Second step is to increase the core power supply to 1.45 V and switch the
CPU clock to the specified 400 MHz.

Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-12 22:10:35 +02:00