These CPUs are called "i.MX", but they are of type STM378x from SigmaTel. They
do not share any devices with the other i.MX CPUs, so we need a separate
architecute directory to handle them without an ifdef hell in the native i.MX
files.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Adding MCI card support for S3C2440 CPUs. This is for reference only, as there
is currently no user in the barebox tree. Maybe one with access to the A9M2440
development kit can check it on his/her system.
Checked here with my own S3C2440 based system which is not in the barebox tree.
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Guessing the size of an attached harddisk (access via x86 BIOS) was needed
due to the fact, barebox can't query this information from the BIOS easily.
But with the SD/MMC cards, there will be a second user of the generic disk
handling routines. And with this media it is very easy to know its size.
This patch provides a workaround to keep the guessing feature if the size of
the registered disk is 0. If it is not 0, the given value will be used instead.
Note: This is in preparation to add MCI card support, which can be handled
like a disk drive.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
via
default ARCH_IMX_INTERNAL_BOOT_NAND
and not default y on ARCH_IMX_INTERNAL_BOOT_NAND
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Makes the internal boot source configurable.
Also changes section names slightly so that .flash_header_0x1000 isn't
matched to .flash_header_0x100* etc.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
commit 5bd9c57d575126448c7d325547538a55e5cd81d6
Author: Juergen Beisert <jbe@pengutronix.de>
Date: Fri Sep 24 14:51:42 2010 +0200
Fix watchdog's register size for the i.MX27 CPU
The watchdog registers on the i.MX27 CPU are 16 bit registers. This patch
just fixes the access macro.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
commit 60b66d0c59013da3294d0b5fb09b937a8b73cf14
Author: Juergen Beisert <jbe@pengutronix.de>
Date: Fri Sep 24 15:00:04 2010 +0200
The i.MX27 has no second level cache, remove include file
Just a little bit cleanup.
Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Until now, the main function of the sandbox port wants to use the libc
getopt(), but as we have a getopt() implementation in barebox as well,
it is silently used instead. This works in the usual case, but if an
error occurs (i.e. by using an unknown argument) in getopt(), the
implementation tries to write to the console, which is not initialized
and thus breaks with a null pointer exception.
This patch changes the main function to use getopt_long() instead of
getopt(). This makes us use the implementation in glibc and while being
there, we get long options, which makes us look more professional...
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Following steps lead to compilation error (barebox v2010.09.0):
1. make a9m2440_defconfig (or a9m2410) ARCH=arm
2. make CROSS_COMPILE=arm-linux- ARCH=arm
This patch should fix problems.
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
AT91sam9g20 is an evolution of the at91sam9260 with a faster clock
speed.
We created a new board for this device but based the chip support
directly on 9260 files with little updates.
Here is the chip page on Atmel wabsite:
http://atmel.com/dyn/products/product_card.asp?part_id=4337
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as not all board support it
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
before if you specify id = 0 the next available id will be taken
otherwise fail if already registered now as in linux we use -1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
as refer in this patch "arm & sh: factorised duplicated clkdev.c"
factorise some generic infrastructure to assist looking up struct clks
for the ARM & SH architecture.
as the code is identical at 99% in linux
move it also as preparing for the SH adding
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
that use the device name + id to found it's clock
to use the right match as we fix the dev_name macro
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
and make init.h availlable for assembly too
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
this will reduce and simplify defconfigs maintainance
it will also save some disk space
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
this rework is done in order to add a phylib and allow to have phy driver support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add OMAP3 architecture specific dcache flush back in.
Commit 78104ae181 isolates
the cache handling to appropriate handlers, but certain
architectures may need special handling esp during boot
time.
without this patch, building barebox with
omap3530_beagle_per_uart_defconfig
and attempting to use peripheral download with pusb/pserial
will fail as OMAP ROM code depends on 2nd stage bootloaders
to clean up things.
Discussion Thread: http://www.spinics.net/lists/u-boot-v2/msg01286.html
Cc: Michael <mgr@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>