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4 Commits

Author SHA1 Message Date
Beniamino Galvani 32a2a673c6 clk: gate: add flags argument to clock gate constructor
This adds a clk_gate_flags argument to clock gate creation functions
to allow the introduction of new clock gate modifiers.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-04-29 08:15:24 +02:00
Sascha Hauer f4c7536514 clk: clk-gate: pass flags to initializers
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-03-28 21:03:02 +01:00
Steffen Trumtrar 508b996a62 ARM: zynq: add support for ethernet
Add support for the ethernet device 0 on the Zynq7000 SoC.
The GEM is compatible to/the same one as the macb on at91.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-04-03 17:21:51 +02:00
Steffen Trumtrar 097513b8f8 ARM: zynq: add clk support for zynq7000
This adds support for the clocktree on zynq7000 SoCs.
The patch is based on clocks.c from the larger patch
	ARM: zynq: add suppport for Zynq 7000 SoC
by Josh Cartwright.

The driver in that patch is converted to a platform_driver and code to
enable plls was added.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-03-27 09:23:49 +01:00