The imx53 SOC features 128kB of internal SRAM which is commonly used in
early stages of barebox to store the stack. Avoid magic numbers while
addressing this RAM.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All i.MX images are nowadays built with the imx-image tool, so we do not
need the header files and Kconfig options anymore. Remove them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Fix the DDR init sequence the same way as done by aee0013e53b339a5
from U-boot in order to prevent the boot hang under reboot stress test.
Quoting this commit log:
"Currently by running the following test:
=> setenv bootcmd reset
=> save
=> reset
, we observe a hang after approximately 20-30 minutes of stress reboot test.
Investigation of this issue revealed that when a single DDR chip select is used,
the hang does not happen. It only happens when the two chip selects are active.
MX53 reference manual states at "28.6.2 Memory ZQ calibration sequence":
"The controller must keep the memory lines quiet (except for CK) for the ZQ
calibration time as defined in the Jedec (512 cycles for ZQCL after reset, 256
for other ZQCL and 64 for ZQCS)."
According to the SDE_0 and SDE_1 bit descriptions from register ESDCTL_ESDCTL:
"Writing 1 to SDE0 or SDE1 will initiate power up delays as JEDEC defines.
Power up delays are a function of the configured memory type (DDR2/DDR3/LPDDR2)"
So make sure to activate one chip select at time (CS0 first and then CS1 later),
so that the required JEDEC delay is respected for each chip select.
With this change applied the board has gone through three days of reboot stress
test without any hang."
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The environment on the QSB is configured via devicetree, but in
the code there's also a /dev/env0 registered which is unused. Remove
it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This file originates in Linux. Linux has it under include/linux/
directory since commit dccd2304cc90.
Let's move it to the same place as well in barebox.
This commit was generated by the following commands:
find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:'
git mv include/sizes.h include/linux/
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The compatible changed when we switched to the upstream
DTs, so the initcalls would not be executed on the START-R
board.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is similar to what we do on imx6 and makes sure we
apply the errata workarounds early.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
It's often useful to get some information about a barebox image
before starting or flashing it. This patch introduces barebox
Image MetaData (IMD). When enabled a barebox image will contain
a list of tags containing the desired information. We have tags
for:
- the barebox release (2014.07.0-00160-g035de50-dirty)
- the build timestamp (#741 Mon Jul 28 15:08:54 CEST 2014)
- the board model the image is intended for
- the device tree toplevel compatible property
Also there is an additional generic key-value store which stores
parameters for which no dedicated tag exists. In this patch it
is used for the memory size an image supports.
Since there is no fixed offset in a barebox image which can be
used for storing the information, the metadata is stored somewhere
in the image and found by iterating over the image. This works
for most image types, but obviously not for SoC images which are
encoded or encrypted in some way.
There is a 'imd' tool compiled from the same sources for barebox,
for the compile host and for the target, so the metadata information
is available whereever needed.
For device tree boards the model and of_compatible tags are automatically
generated.
Example output of the imd tool for a Phytec phyFLEX image:
build: #889 Wed Jul 30 16:08:54 CEST 2014
release: 2014.07.0-00167-g6b2070d-dirty
parameter: memsize=1024
of_compatible: phytec,imx6x-pbab01 phytec,imx6dl-pfla02 fsl,imx6dl
model: Phytec phyFLEX-i.MX6 Duallite Carrier-Board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The doxygen documentation is long outdated. Remove it. It will
be replaced with sphinx based documentation later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX barebox update handlers take an optional dcd table as argument.
This can be used to add the correct dcd data to the image before flashing
it.
This mechanism is quite complicated and largely unused, so remove it. With
this it is only possible to flash the exact image passed to barebox_update,
which is what is mostly done anyway.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Mostly to make it clear that boarddata needs to be
something we can dereference.
As this is a pretty invasive change, use the opportunity
to make the signature 64bit safe.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For a version 1.0 board the rest of loco_late_init should be executed
to completely configure the board.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Otherwise it won't get set in a multiimage build.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- configure the MC34708 properly so that USB can work
(the sequence is taken from u-boot)
- add the required defines to the mc13xxx include file
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This renames the Freescale and Phytec board directories and defconfig
files to a common naming scheme. The board directories are named
<vendor>-<board> and the defconfig files are named
<vendor>-<board>_defconfig. Also the DataModul realq7 is renamed to its
Marketing Name eDM-QMX6.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>