The FSF address has changed; The FSF site says that
address is
Free Software Foundation
51 Franklin Street, Fifth Floor
Boston, MA 02110-1301
USA
(see http://www.fsf.org/about/contact/)
Instead of updating it each time the address changes,
just drop it completely treewide.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
I assume I am the only person knowing that barebox is able to
merge devicetrees. This feature seems broken for a while now since
trying to merge devicetress results in:
unflatten: too many end nodes
Remove this feature to save the complexity.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This patch does probably too much, but it's hard (and very
cumbersome/time consuming) to break it out. What is does is this:
* each command has one short description, e.g. "list MUX configuration"
* made sure the short descriptions start lowercase
* each command has one usage. That string contains just the
options, e.g. "[-npn]". It's not part of the long help text.
* that is, it doesn't say "[OPTIONS]" anymore, every usable option
is listed by character in this (short) option string (the long
description is in the long help text, as before)
* help texts have been reworked, to make them
- sometimes smaller
- sometimes describe the options better
- more often present themselves in a nicer format
* all long help texts are now created with BUSYBOX_CMD_HELP_
macros, no more 'static const __maybe_unused char cmd_foobar_help[]'
* made sure the long help texts starts uppercase
* because cmdtp->name and cmdtp->opts together provide the new usage,
all "Usage: foobar" texts have been removed from the long help texts
* BUSYBOX_CMD_HELP_TEXT() provides the trailing newline by itself, this
is nicer in the source code
* BUSYBOX_CMD_HELP_OPT() provides the trailing newline by itself
* made sure no line gets longer than 77 characters
* delibertely renamed cmdtp->usage, so that we can get compile-time
errors (e.g. in out-of-tree modules that use register_command()
* the 'help' command can now always emit the usage, even without
compiled long help texts
* 'help -v' gives a list of commands with their short description, this
is similar like the old "help" command before my patchset
* 'help -a' gives out help of all commands
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The old output of "help" was just producing a long list, that usually
scrolled of the screen (even on a X11 terminal). This list is more
compact, and also sorted by groups.
The old output format (plus grouping) is now available with 'help -v'.
Example:
Information commands:
?, devinfo, help, iomem, meminfo, version
Boot commands:
boot, bootm, go, loadb, loads, loadx, loady, saves, uimage
...
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Mostly to make it clear that boarddata needs to be
something we can dereference.
As this is a pretty invasive change, use the opportunity
to make the signature 64bit safe.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For memory reaching the end of the address space
phys + bank->size overflows to 0. Fix this by right shifting
phys and bank->size before adding them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Sean Cross <xobs@kosagi.com>
- If we have no memory registered in mmu_init() it's a critical bug.
panic in this case.
- If we do not have a ttb when dma_alloc_coherent or remap_range is
called it's also a critical bug. Panic in this case.
- if find_pte is called with an address outside our memory banks dump
the memory banks and the address to give more clue what went wrong.
Also add some hints what might went wrong to the code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
BUG() uses printf which is not available in pbl, so do not use it here.
This becomes necessary when multiple CPU architectures are compiled in.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The cache-v7 code uses assembler instructions which do not
exist on before v7, so explicitely pass armv7-a to this file
to make the compiler happy.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The multi image startup process used to have three binaries involved:
- The lowlevel board code to initialize SDRAM
- the uncompressor
- the regular (compressed) barebox binary
Drop the uncompressor and put the uncompress code into the lowlevel
board code binary. This makes the startup process easier.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We want to check whether boarddata contains a valid dtb if it's inside
valid memory. This includes the base of SDRAM, so use '>=' instead of '>'.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
A lot of files rely on include/driver.h including include/of.h (and
this including include/errno.h. include the files explicitly so we can
eventually get rid of including of.h from driver.h
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Drivers currently cannot implement explicit cache handling and rely on
running the same code before and after mmu_initcall() without crashing.
Depending on the chosen config options, the cache functions are not yet
setup and using them early on ends in a null pointer dereference.
The RPi's mailbox driver is such a case; it requires cache handling once
the MMU is fully set up and yet the RPi setup needs to use the driver to
get the memory size before mem_initcall() and hence mmu_initcall().
Fix this by checking the cache_fns pointer before dereferencing it.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When using CONFIG_MMU_EARLY combined with CONFIG_PBL_IMAGE, the barebox
setup reuses the MMU setup from the PBL, but doesn't setup the cache
functions.
Set these up to guarantee proper early cache handing before mmu_initcall().
Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The data caches should be invalided once during startup. This should
also be done when we do not have the MMU enabled in barebox because
the Kernel does not invalidate the caches during start.
To make this sure this patch enables the arm_early_mmu_cache_invalidate
function even if MMU support is disabled. Additionally this patch adds
calls to arm_early_mmu_cache_invalidate in start.c and uncompress.c.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This adds the make infrastructure to build multiple SoC or
board specific images from a single barebox binary.
The basic idea is that we no longer have a single pbl, but instead
multiple pbls, one per image if necessary. Each pbl is defined
by its entry function so that each pbl can do exactly what a given
board needs. Additionally the pbls together with a self extracting
barebox binary can be encapsulated in specific image formats.
squashed in build fixes from Lucas Stach for make version >= 3.82:
Split Multimage Makefile rule in explicit and implicit parts
Fixes build with make version >=3.82
Frome the make 3.82 NEWS file:
* WARNING: Backward-incompatibility!
In previous versions of make it was acceptable to list one or more explicit
targets followed by one or more pattern targets in the same rule and it
worked "as expected". However, this was not documented as acceptable and if
you listed any explicit targets AFTER the pattern targets, the entire rule
would be mis-parsed. This release removes this ability completely: make
will generate an error message if you mix explicit and pattern targets in
the same rule.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Addionally to having a builtin DTB provide the possibility for
the board to provide a dtb via boarddata.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some SoCs come up with invalid entries in the data cache. This can
lead to memory corruption when we enable them later, so invalidate
the caches early.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Lucas Stach <l.stach@pengutronix.de>
At least the iMX6 boot rom seems to jump into barebox with a non
invalidated d-cache which causes data corruption when
v7_mmu_cache_flush() executed by arm_early_mmu_cache_flush() overrides
stack or other valid data.
That's why the cache must be invalided for this processors explicitly
(e.g. in barebox_arm_reset_vector()). Operation differs from flush only
in one instruction so that patch modifies the existing
v7_mmu_cache_flush() function slightly by adding an optional argument.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Registers 'r0' till 'r3' are scratch registers and do not need to be
restored.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Although conclusions in 50d1b2de8e "ARM
v7: Fix register corruption in v7_mmu_cache_off" are correct, the
implemented fix is not complete because the following failure can
happen:
1. d-cache contains the cache line around 'sp'
2. v7_mmu_cache_off() disables cache
3. early v7_mmu_cache_flush() pushes 'lr' on uncached stack
4. v7_mmu_cache_flush() flushes d-cache and can override stack written
by step 3.
5. v7_mmu_cache_flush() pops 'lr' out of cache and jumps to it which
might be random data now.
Patch avoids step 3 which is easy because 'lr' is never modified by the
function. By using the 'r12' scratch register instead of 'r10', the
whole initial 'push' can be avoided.
Patch moves also the 'DMB' operation so that it is executed after data
has been pushed on stack.
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Kirkwood Marvell SoC uses a Marvell-specific implementation of an
ARMv5TE compatible ARM core, the Feroceon. This patch introduces a
Kconfig option that allows to select this CPU type.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
We PAGE_ALIGN the size in dma_alloc_coherent so do it also when free the memory.
Use PAGE_SIZE instead of magic numbers.
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Add rules to generate dtb files in arch/arm/dts/
- add an initcall which unflattens and probes the internal devicetree
- Add skeleton devicetree
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The comment above barebox_arm_entry promises to preserve the boarddata
variable passed to it which can then later get back with
barebox_arm_boarddata(). This function was missing so far, add it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
For making the same binary executable on different SoCs which have
different DRAM addresses we have to be independent of the compile
time link address.
This patch adds relocatable binary support for the ARM architecture.
With this two new functions are available. relocate_to_current_adr
will fixup the binary to continue executing from the current position.
relocate_to_adr will copy the binary to a given address, fixup the
binary and continue executing from there.
For the PBL and the real image relocatable support can be enabled
independently. This is done to (hopefully) better cope with setups
where the PBL runs from SRAM or ROM and the real binary does not.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
With relocatable binaries the vector addresses cannot be supplied by
the linker. This adds support for fixing them up during runtime.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Since recently with MMU_EARLY support it may happen that setup_c
runs with data caches enabled, so we have to make sure the caches
are flushed before we jump to the new binary.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When we have multi cpu support compiled in we need the cpu architecture
early so that we can pick the correct cacheflush function. Make it available
as static inline function and add a comment above it that this function
normally should not be used.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
reset is confusing with the cpu reset and impossible to grep
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Antony Pavlov
Holger Schurig
Sascha Hauer
Lucas Stach
张忠山
Alexander Shiyan
Andre Heider
Jan Luebbe
Enrico Scholz
Thomas Petazzoni
Jan Weitzel
Jean-Christophe PLAGNIOL-VILLARD