phyFLEX boards beginning with 1362.2 have a workaround for this
i.MX6 bug:
ERR006282 ROM code uses nonreset PFDs to generate clocks, which may
lead to random boot failures
On these boards the SD4_DAT3 pin os connected to the CMIC. The CMIC
will reset the board after 10s when the pin isn't toggled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
TX_CLK line is approx. 54mm longer than other TX lines which adds
a delay of 0.36ns. RGMII need a delay of min. 1.0ns. This mean we have to add
a delay of 0.64ns. We choose 0.78 to have a little gap. This can be done by
setting GTX pad skew value to 11100
Also add a delay for the RX delay lines, needed for the Duallite variant.
=> Set register 2.8 (RGMII Clock Pad Skew) to 0x039F.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
This renames the Freescale and Phytec board directories and defconfig
files to a common naming scheme. The board directories are named
<vendor>-<board> and the defconfig files are named
<vendor>-<board>_defconfig. Also the DataModul realq7 is renamed to its
Marketing Name eDM-QMX6.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>