In v4.2-rc3 the "fsl,imx1-gpt" compatible was replaced with
"fsl,imx21-gpt" so i.MX27 currently ends up without clocksource. Fix
this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Part of the barebox code and variables are put in separate sections
(.barebox* and .initcall*). When this code is compiled as position
independent code then the compiler creates corresponding .rela.barebox* and
.rela.initcall* sections with the relocation table entries.
These sections don't match the .rela.data* wildcard in the linker script.
As a result, they are not added to the .rela section during linking but are
added individually after it instead. And when the EFI binary is created
from the ELF binary, these sections are not copied.
This has two side effects:
1. The corresponding relocations are not handled by the generic relocation
code. 'fixup_tables()' was added to do these relocations manually.
2. In the DYNAMIC section, the RELASZ entry contains the total size of
relocations in bytes. This includes the .rela.barebox* and .rela.initcall*
sections. This value is not modified when the EFI binary is created. So the
value is too large.
The generic relocation code in _relocate() used this value when iterating
over all relocation entries. With the wrong RELASZ value it iterates beyond
the end of the .rela section into uninitialized memory. After power-on this
memory is zero and the relocation code interprets this as 'nothing to do',
so there is no visible effect. After a soft reset, random data in that area
may produce a seemingly valid relocation entry, a random address is
modified and barebox crashes.
This patch adds the .rela.barebox* and .rela.initcall* sections to the
normal .rela section. The RELASZ now contains the correct size and the
generic relocation code works correctly. 'fixup_tables()' must be removed
at the same time to avoid relocating these entries twice.
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The binary image generated by barebox contains an instruction at the
very beginning to jump over the header. However, when the image is
written to a SD card and the first 512 bytes are skipped in order to
preserve the partition table then this jump instruction is lost. Instead
of relying on the jump instruction at the image beginning calculate
the image entry from the i.MX header instead of relying on the beginning
of the image being the entry point.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
All i.MX images are nowadays built with the imx-image tool, so we do not
need the header files and Kconfig options anymore. Remove them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX6 a single chipselect can have 4GiB. In this case the calculation
for CS0_end overflows the 7 bit field. Clamp it to 127, the maximum
supported value.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On i.MX6 a single chipselect can have 4GiB, which overflows a 32bit
type, so imx6_mmdc_sdram_size() must return a u64 to support this case.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The current vector table setup has some shortcomings. First of all
currently the case when the high vectors are inside SDRAM (that is,
SDRAM reaches the end of the address space) is not supported. In this
case we create a secondary page table for the section containing the
vectors which gets overwritten by the general SDRAM secondary page
table entries creation afterwards. On ARMv7 and later the exception
table setup can be improved: Here the vector table address is configurable
in the VBAR register. We can use this register to skip remapping the
vector table.
With this patch we first try to use the VBAR register before doing
something else. Also, when we have to use the high vectors we first
try a request_sdram_region to test if the vector table memory is already
mapped. While at it sprinkle some comments into the code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The last 64KiB of address space may be used for the vector table at
0xffff0000, so we cannot use it for barebox. The easiest way to archieve
this is to never use the last 64KiB of memory.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When SDRAM reaches to the end of the address space the comparison
membase + memsize evaluates to 0, so pc - membase < memsize can never
be true. Fix this by substracting membase on both sides of the
comparison.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CCM has reset status bits with more detailed information than the
watchdog. Set reset source with higher priority.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
According to commit f6b6f3c7b2bb7d6277801882afdced6f2b10fc17 from
git://git.freescale.com/imx/uboot-imx.git:
Also set Prefetch offset to 15, since it improves
memcpy performance by 35%. Don't enable Incr double
Linefill enable since it adversely affects memcpy
performance by about 32MB/s and reads by 90MB/s. Tested
with 4K to 16MB sized src and dst aligned buffer.
This commit ports those chagnes from U-Boot.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
I.MX6Q Plus parts have r3p2 revision of PL310 so double linefill
errata no longer applies for all of the i.MX6Q SoCs. Change the code to
use PL310's revision inforation to determine if workaround needs to be
applied.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Use constants instead of magic numbers for PL301 registers bits in
imx6_mmu_init()
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
In v4.2-rc3 the "fsl,imx1-gpt" compatible was replaced with
"fsl,imx21-gpt" so i.MX27 currently ends up without clocksource. Fix
this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Call clk_enable on mmdc_ch0_axi_podf in order to properly increase
reference counters for all of the nodes in this particular clock
path. Otherwise it becomes possible for peripherals, located on other
branches stemming from "periph", to shut down the whole clock tree (up
to "pll2_bus") when they try to manage their own local clocks.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Make sure that Barebox specific .dtsi files are included after .dtsi
files imported from Linux kernel. This way those local .dtsi files can
reference phandles defined in Linux kernel files.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Alexander Stein
Michael Olbrich
Andrey Smirnov
Antony Pavlov
Peter Mamonov