This adds USB gadget support to the i.MX chipidea driver. Basically
we have to add a register function to the fsl udc driver and call
this from the chipidea driver if device mode is selected.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
CFI Flash is currently handled outside the mtd layer which makes it
a special case. Integrate it into mtd so that we get rid of this
special status.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
not enable as on qemu this generate a undefined instruction exception
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Instead of dereferencing struct mtd_info members directly use
the wrapper functions which have an additional check if the
callback exists if it is optional, like mark_bad or is_bad.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The Kernel has mtd_read, mtd_write, mtd_erase and mtd_block_markbad.
Add these functions to barebox aswell to make future mtd synchronizations
with the kernel easier.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
These are currently named mtd_read/write/erase. Functions with
the same name exist as global functions in the kernel. Rename
them to mtd_op_* to avoid name clashes with future mtd updates.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The kernel nowadays has mtd_read/write and other functions. In
barebox we also have these functions, but with a different prototype,
namely they correspond to the libmtd userspace functions. Rename
these functions to libmtd_* to avoid name clashes with future mtd
updates.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
HSIC needs some special setup for i.MX6. Most ugly detail is that
the HSIC needs help of the IOMUX to configure a pullup on the strobe
line. This has to be done after the ehci controller has started.
Fortunately there is only one muxing possibility for the HSIC ports
on i.MX6, so we can simply control the iomux from the usbmisc driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some controllers need an init hook after the USB controller is
started, so implement the post init hook for i.MX.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
calxeda use the generic driver but have it's own compatible cf Linux kernel
Documentation
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so when the first stage booloader of firmware provide the dtb
we can use it to probe the memory
also allow to print what we probe
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Having the board config file in /env/init has the problem that
the settings in /env/config are overwritten in the init sequence.
This moves the config-board files to /env/ and sources them explicitly
from /env/bin/init before sourcing /env/config
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
One memory initialization will be used on any CLPS711X-target,
so move it in the common location.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
NOR-flash is placed at address 0x0, so if MMU is turned on, initialization
will fails. This patch fix this problem.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
One lowlevel initialization will be used on any CLPS711X-target,
so move it in the common location.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This is a rework of CLPS711X low level initialization code which includes:
- Prepare for changing CPU PLL multiplier from board lowlevel code.
- Decrease initial memory size to 8MB. It is minimal known size.
- Fix SDRAM initialization comment about size.
- Turn off all peripherals on startup.
- Skip PLL initialization if CPU is running from external 13 MHz clock.
- Use correct CPU speed for older CPUs without PLL.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Some Intel SSDs can send a COMINIT after the initial COMRESET. This causes
the link to go down and we need to re-initialize the link.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
device_platform_driver() - Helper macro for drivers that don't do
anything special in module registration. This eliminates a lot of
boilerplate. Driver registration will called on device_initcall.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The different console implementations share a good amount of code,
share this in console_common.c.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
at 0x10011000 for a9 legacy otherwise at 0x1c110000
as the new board also support Cortex-A9
so this is working
qemu/arm-softmmu/qemu-system-arm -M vexpress-a15 -m 1024 -smp 1 -kernel build/vexpress/barebox -pflash build/vexpress/flash -nographic -cpu cortex-a9
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
so we can use it on vexpress to detect the hardware mapping
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The default setting for the imx28 watchdog is to do a power-off reset. If the
SoC is only powered via battery, then the watchdog powers the chip down, though.
According to the datasheet it should still be possible to execute a proper POR
with battery power, but testing showed otherwise.
When the watchdog power-off reset is disabled, a software reset is executed
instead. This works with and without battery power.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add the initrd start and end address to the DT, code comes from u-boot.
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
On ArchosG9 the second stage low-level init was the fallback default.
Now that the low-level init is forcibly enabled it has to be skipped
when already executed from first stage.
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
detect the cpu model to dynamise the periphs mapping
currently only tested on qemu but should work on real hardware
Cortex-A9
if you use 1GiB of ram you can run the same barebox on Cortex-A15 or Cortex-A9
otherwise use vexpress_ca9_defconfig where the TEXT_BASE is at 0x63f00000
when we will add the relocation support this defconfig will be drop
qemu/arm-softmmu/qemu-system-arm -M vexpress-a9 -m 1024 -smp 1 -kernel build/vexpress/barebox -pflash build/vexpress/flash0 -nographic
Cortex-A15
qemu/arm-softmmu/qemu-system-arm -M vexpress-a15 -m 1024 -smp 1 -kernel build/vexpress/barebox -pflash build/vexpress/flash0 -nographic
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- enable USB gadget and DFU
- enable MCI and probe at boot
- enable EXT4 and FAT filesystems
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Sascha Hauer
Alexander Shiyan
Jean-Christophe PLAGNIOL-VILLARD
Rob Herring
Steffen Trumtrar
Hubert Feurstein
Vicente Bergas
Eric Bénard