Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
This commit is contained in:
commit
a17617d655
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@ -161,42 +161,3 @@ ulong get_tbclk(void)
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||||||
{
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{
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||||||
return MXC_CLK32;
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return MXC_CLK32;
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}
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}
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void reset_cpu(ulong addr)
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{
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struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
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wdog->wcr = WDOG_ENABLE;
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while (1)
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;
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}
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#ifdef CONFIG_HW_WATCHDOG
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void mxc_hw_watchdog_enable(void)
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{
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struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
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u16 secs;
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/*
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* The timer watchdog can be set between
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* 0.5 and 128 Seconds. If not defined
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* in configuration file, sets 64 Seconds
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*/
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#ifdef CONFIG_SYS_WD_TIMER_SECS
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secs = (CONFIG_SYS_WD_TIMER_SECS << 1) & 0xFF;
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if (!secs) secs = 1;
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#else
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secs = 64;
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#endif
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setbits_le16(&wdog->wcr, (secs << WDOG_WT_SHIFT) | WDOG_ENABLE
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| WDOG_WDZST);
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}
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void mxc_hw_watchdog_reset(void)
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{
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struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
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writew(0x5555, &wdog->wsr);
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writew(0xAAAA, &wdog->wsr);
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}
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#endif
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@ -488,12 +488,6 @@ int get_clocks(void)
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return 0;
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return 0;
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}
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}
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void reset_cpu(ulong addr)
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{
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struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR;
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writew(4, &wdog->wcr);
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}
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#define RCSR_MEM_CTL_WEIM 0
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#define RCSR_MEM_CTL_WEIM 0
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#define RCSR_MEM_CTL_NAND 1
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#define RCSR_MEM_CTL_NAND 1
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#define RCSR_MEM_CTL_ATA 2
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#define RCSR_MEM_CTL_ATA 2
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@ -20,6 +20,16 @@
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#include <linux/linkage.h>
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#include <linux/linkage.h>
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.macro init_arm_errata
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/* ARM erratum ID #743622 */
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mrc p15, 0, r10, c15, c0, 1 /* read diagnostic register */
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orr r10, r10, #1 << 6 /* set bit #6 */
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/* ARM erratum ID #751472 */
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orr r10, r10, #1 << 11 /* set bit #11 */
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mcr p15, 0, r10, c15, c0, 1 /* write diagnostic register */
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.endm
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ENTRY(lowlevel_init)
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ENTRY(lowlevel_init)
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init_arm_errata
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mov pc, lr
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mov pc, lr
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ENDPROC(lowlevel_init)
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ENDPROC(lowlevel_init)
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@ -175,11 +175,6 @@ int cpu_mmc_init(bd_t *bis)
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}
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}
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#endif
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#endif
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void reset_cpu(ulong addr)
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{
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__raw_writew(4, WDOG1_BASE_ADDR);
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}
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u32 get_ahb_clk(void)
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u32 get_ahb_clk(void)
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{
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{
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struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
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struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
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|
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@ -58,7 +58,5 @@ extern void mx31_set_gpr(enum iomux_gp_func gp, char en);
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void mx31_uart1_hw_init(void);
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void mx31_uart1_hw_init(void);
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void mx31_uart2_hw_init(void);
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void mx31_uart2_hw_init(void);
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void mx31_spi2_hw_init(void);
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void mx31_spi2_hw_init(void);
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void mxc_hw_watchdog_enable(void);
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||||||
void mxc_hw_watchdog_reset(void);
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|
||||||
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#endif /* __ASM_ARCH_CLOCK_H */
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#endif /* __ASM_ARCH_CLOCK_H */
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@ -68,17 +68,6 @@ struct cspi_regs {
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u32 test;
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u32 test;
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};
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};
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|
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/* Watchdog Timer (WDOG) registers */
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#define WDOG_ENABLE (1 << 2)
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#define WDOG_WT_SHIFT 8
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#define WDOG_WDZST (1 << 0)
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|
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struct wdog_regs {
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|
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u16 wcr; /* Control */
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|
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u16 wsr; /* Service */
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u16 wrsr; /* Reset Status */
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|
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};
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|
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/* IIM Control Registers */
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/* IIM Control Registers */
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struct iim_regs {
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struct iim_regs {
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u32 iim_stat;
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u32 iim_stat;
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@ -687,7 +676,7 @@ struct esdc_regs {
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#define ARM_PPMRR 0x40000015
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#define ARM_PPMRR 0x40000015
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|
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#define WDOG_BASE 0x53FDC000
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#define WDOG1_BASE_ADDR 0x53FDC000
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|
||||||
/*
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/*
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* GPIO
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* GPIO
|
||||||
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|
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@ -80,7 +80,7 @@
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#define GPIO2_BASE_ADDR 0x53FD0000
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#define GPIO2_BASE_ADDR 0x53FD0000
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||||||
#define SDMA_BASE_ADDR 0x53FD4000
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#define SDMA_BASE_ADDR 0x53FD4000
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||||||
#define RTC_BASE_ADDR 0x53FD8000
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#define RTC_BASE_ADDR 0x53FD8000
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||||||
#define WDOG_BASE_ADDR 0x53FDC000
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#define WDOG1_BASE_ADDR 0x53FDC000
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||||||
#define PWM_BASE_ADDR 0x53FE0000
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#define PWM_BASE_ADDR 0x53FE0000
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||||||
#define RTIC_BASE_ADDR 0x53FEC000
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#define RTIC_BASE_ADDR 0x53FEC000
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||||||
#define IIM_BASE_ADDR 0x53FF0000
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#define IIM_BASE_ADDR 0x53FF0000
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||||||
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@ -292,15 +292,6 @@ struct cspi_regs {
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||||||
u32 test;
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u32 test;
|
||||||
};
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};
|
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|
||||||
/* Watchdog Timer (WDOG) registers */
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|
||||||
struct wdog_regs {
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|
||||||
u16 wcr; /* Control */
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|
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u16 wsr; /* Service */
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|
||||||
u16 wrsr; /* Reset Status */
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|
||||||
u16 wicr; /* Interrupt Control */
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|
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u16 wmcr; /* Misc Control */
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|
||||||
};
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|
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|
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struct esdc_regs {
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struct esdc_regs {
|
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u32 esdctl0;
|
u32 esdctl0;
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u32 esdcfg0;
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u32 esdcfg0;
|
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|
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@ -218,16 +218,6 @@
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*/
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*/
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#define WBED 1
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#define WBED 1
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||||||
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|
||||||
/*
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|
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* WEIM WCR
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|
||||||
*/
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|
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#define BCM 1
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|
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#define GBCD(x) (((x) & 0x3) << 1)
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|
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#define INTEN (1 << 4)
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#define INTPOL (1 << 5)
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#define WDOG_EN (1 << 8)
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|
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#define WDOG_LIMIT(x) (((x) & 0x3) << 9)
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|
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#define CS0_128 0
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#define CS0_128 0
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#define CS0_64M_CS1_64M 1
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#define CS0_64M_CS1_64M 1
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#define CS0_64M_CS1_32M_CS2_32M 2
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#define CS0_64M_CS1_32M_CS2_32M 2
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@ -37,13 +37,6 @@
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|
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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||||||
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#ifdef CONFIG_HW_WATCHDOG
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void hw_watchdog_reset(void)
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|
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{
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|
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mxc_hw_watchdog_reset();
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|
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}
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|
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#endif
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|
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|
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int dram_init(void)
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int dram_init(void)
|
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{
|
{
|
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/* dram_init must store complete ramsize in gd->ram_size */
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/* dram_init must store complete ramsize in gd->ram_size */
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@ -188,7 +181,7 @@ int board_late_init(void)
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pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
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pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
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#ifdef CONFIG_HW_WATCHDOG
|
#ifdef CONFIG_HW_WATCHDOG
|
||||||
mxc_hw_watchdog_enable();
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hw_watchdog_init();
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#endif
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#endif
|
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|
|
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return 0;
|
return 0;
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|
|
|
@ -36,13 +36,6 @@
|
||||||
|
|
||||||
DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
|
||||||
|
|
||||||
#ifdef CONFIG_HW_WATCHDOG
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|
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void hw_watchdog_reset(void)
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|
||||||
{
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|
||||||
mxc_hw_watchdog_reset();
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|
||||||
}
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|
||||||
#endif
|
|
||||||
|
|
||||||
int dram_init(void)
|
int dram_init(void)
|
||||||
{
|
{
|
||||||
/* dram_init must store complete ramsize in gd->ram_size */
|
/* dram_init must store complete ramsize in gd->ram_size */
|
||||||
|
@ -98,7 +91,7 @@ int board_late_init(void)
|
||||||
pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN);
|
pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN);
|
||||||
pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
|
pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
|
||||||
#ifdef CONFIG_HW_WATCHDOG
|
#ifdef CONFIG_HW_WATCHDOG
|
||||||
mxc_hw_watchdog_enable();
|
hw_watchdog_init();
|
||||||
#endif
|
#endif
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -489,8 +489,6 @@ int board_init(void)
|
||||||
/* address of boot parameters */
|
/* address of boot parameters */
|
||||||
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
|
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
|
||||||
|
|
||||||
lcd_enable();
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -48,6 +48,22 @@ static struct fb_videomode const claa_wvga = {
|
||||||
.vmode = FB_VMODE_NONINTERLACED
|
.vmode = FB_VMODE_NONINTERLACED
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static struct fb_videomode const dvi = {
|
||||||
|
.name = "DVI panel",
|
||||||
|
.refresh = 60,
|
||||||
|
.xres = 1024,
|
||||||
|
.yres = 768,
|
||||||
|
.pixclock = 15385,
|
||||||
|
.left_margin = 220,
|
||||||
|
.right_margin = 40,
|
||||||
|
.upper_margin = 21,
|
||||||
|
.lower_margin = 7,
|
||||||
|
.hsync_len = 60,
|
||||||
|
.vsync_len = 10,
|
||||||
|
.sync = 0,
|
||||||
|
.vmode = FB_VMODE_NONINTERLACED
|
||||||
|
};
|
||||||
|
|
||||||
void setup_iomux_lcd(void)
|
void setup_iomux_lcd(void)
|
||||||
{
|
{
|
||||||
/* DI2_PIN15 */
|
/* DI2_PIN15 */
|
||||||
|
@ -73,9 +89,26 @@ void setup_iomux_lcd(void)
|
||||||
gpio_direction_output(MX51EVK_LCD_BACKLIGHT, 1);
|
gpio_direction_output(MX51EVK_LCD_BACKLIGHT, 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
void lcd_enable(void)
|
int board_video_skip(void)
|
||||||
{
|
{
|
||||||
int ret = ipuv3_fb_init(&claa_wvga, 1, IPU_PIX_FMT_RGB565);
|
int ret;
|
||||||
|
char const *e = getenv("panel");
|
||||||
|
|
||||||
|
if (e) {
|
||||||
|
if (strcmp(e, "claa") == 0) {
|
||||||
|
ret = ipuv3_fb_init(&claa_wvga, 1, IPU_PIX_FMT_RGB565);
|
||||||
|
if (ret)
|
||||||
|
printf("claa cannot be configured: %d\n", ret);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* 'panel' env variable not found or has different value than 'claa'
|
||||||
|
* Defaulting to dvi output.
|
||||||
|
*/
|
||||||
|
ret = ipuv3_fb_init(&dvi, 0, IPU_PIX_FMT_RGB24);
|
||||||
if (ret)
|
if (ret)
|
||||||
printf("LCD cannot be configured: %d\n", ret);
|
printf("dvi cannot be configured: %d\n", ret);
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
|
@ -503,8 +503,6 @@ int board_init(void)
|
||||||
mxc_set_sata_internal_clock();
|
mxc_set_sata_internal_clock();
|
||||||
setup_iomux_i2c();
|
setup_iomux_i2c();
|
||||||
|
|
||||||
lcd_enable();
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -46,6 +46,21 @@ static struct fb_videomode const claa_wvga = {
|
||||||
.vmode = FB_VMODE_NONINTERLACED
|
.vmode = FB_VMODE_NONINTERLACED
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static struct fb_videomode const seiko_wvga = {
|
||||||
|
.name = "Seiko-43WVF1G",
|
||||||
|
.refresh = 60,
|
||||||
|
.xres = 800,
|
||||||
|
.yres = 480,
|
||||||
|
.pixclock = 29851, /* picosecond (33.5 MHz) */
|
||||||
|
.left_margin = 89,
|
||||||
|
.right_margin = 164,
|
||||||
|
.upper_margin = 23,
|
||||||
|
.lower_margin = 10,
|
||||||
|
.hsync_len = 10,
|
||||||
|
.vsync_len = 10,
|
||||||
|
.sync = 0,
|
||||||
|
};
|
||||||
|
|
||||||
void setup_iomux_lcd(void)
|
void setup_iomux_lcd(void)
|
||||||
{
|
{
|
||||||
mxc_request_iomux(MX53_PIN_DI0_DISP_CLK, IOMUX_CONFIG_ALT0);
|
mxc_request_iomux(MX53_PIN_DI0_DISP_CLK, IOMUX_CONFIG_ALT0);
|
||||||
|
@ -86,9 +101,26 @@ void setup_iomux_lcd(void)
|
||||||
gpio_direction_output(IOMUX_TO_GPIO(MX53_PIN_GPIO_1), 1);
|
gpio_direction_output(IOMUX_TO_GPIO(MX53_PIN_GPIO_1), 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
void lcd_enable(void)
|
int board_video_skip(void)
|
||||||
{
|
{
|
||||||
int ret = ipuv3_fb_init(&claa_wvga, 0, IPU_PIX_FMT_RGB565);
|
int ret;
|
||||||
|
char const *e = getenv("panel");
|
||||||
|
|
||||||
|
if (e) {
|
||||||
|
if (strcmp(e, "seiko") == 0) {
|
||||||
|
ret = ipuv3_fb_init(&seiko_wvga, 0, IPU_PIX_FMT_RGB24);
|
||||||
|
if (ret)
|
||||||
|
printf("Seiko cannot be configured: %d\n", ret);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* 'panel' env variable not found or has different value than 'seiko'
|
||||||
|
* Defaulting to claa lcd.
|
||||||
|
*/
|
||||||
|
ret = ipuv3_fb_init(&claa_wvga, 0, IPU_PIX_FMT_RGB565);
|
||||||
if (ret)
|
if (ret)
|
||||||
printf("LCD cannot be configured: %d\n", ret);
|
printf("CLAA cannot be configured: %d\n", ret);
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
|
@ -179,7 +179,7 @@ int board_init(void)
|
||||||
int board_late_init(void)
|
int board_late_init(void)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_HW_WATCHDOG
|
#ifdef CONFIG_HW_WATCHDOG
|
||||||
mxc_hw_watchdog_enable();
|
hw_watchdog_init();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
@ -0,0 +1,29 @@
|
||||||
|
Watchdog driver general info
|
||||||
|
|
||||||
|
CONFIG_HW_WATCHDOG
|
||||||
|
This enables hw_watchdog_reset to be called during various loops,
|
||||||
|
including waiting for a character on a serial port. But it
|
||||||
|
does not also call hw_watchdog_init. Boards which want this
|
||||||
|
enabled must call this function in their board file. This split
|
||||||
|
is useful because some rom's enable the watchdog when downloading
|
||||||
|
new code, so it must be serviced, but the board would rather it
|
||||||
|
was off. And, it cannot always be turned off once on.
|
||||||
|
|
||||||
|
CONFIG_WATCHDOG_TIMEOUT_MSECS
|
||||||
|
Can be used to change the timeout for i.mx31/35/5x/6x.
|
||||||
|
If not given, will default to maximum timeout. This would
|
||||||
|
be 128000 msec for i.mx31/35/5x/6x.
|
||||||
|
|
||||||
|
CONFIG_AT91SAM9_WATCHDOG
|
||||||
|
Available for AT91SAM9 to service the watchdog.
|
||||||
|
|
||||||
|
CONFIG_FTWDT010_WATCHDOG
|
||||||
|
Available for FTWDT010 to service the watchdog.
|
||||||
|
|
||||||
|
CONFIG_FTWDT010_HW_TIMEOUT
|
||||||
|
Can be used to change the timeout for FTWDT010.
|
||||||
|
|
||||||
|
CONFIG_IMX_WATCHDOG
|
||||||
|
Available for i.mx31/35/5x/6x to service the watchdog. This is not
|
||||||
|
automatically set because some boards (vision2) still need to define
|
||||||
|
their own hw_watchdog_reset routine.
|
|
@ -27,6 +27,9 @@ LIB := $(obj)libwatchdog.o
|
||||||
|
|
||||||
COBJS-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o
|
COBJS-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o
|
||||||
COBJS-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o
|
COBJS-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o
|
||||||
|
ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6))
|
||||||
|
COBJS-y += imx_watchdog.o
|
||||||
|
endif
|
||||||
COBJS-$(CONFIG_TNETV107X_WATCHDOG) += tnetv107x_wdt.o
|
COBJS-$(CONFIG_TNETV107X_WATCHDOG) += tnetv107x_wdt.o
|
||||||
COBJS-$(CONFIG_S5P) += s5p_wdt.o
|
COBJS-$(CONFIG_S5P) += s5p_wdt.o
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,66 @@
|
||||||
|
/*
|
||||||
|
* watchdog.c - driver for i.mx on-chip watchdog
|
||||||
|
*
|
||||||
|
* Licensed under the GPL-2 or later.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <common.h>
|
||||||
|
#include <asm/io.h>
|
||||||
|
#include <watchdog.h>
|
||||||
|
#include <asm/arch/imx-regs.h>
|
||||||
|
|
||||||
|
struct watchdog_regs {
|
||||||
|
u16 wcr; /* Control */
|
||||||
|
u16 wsr; /* Service */
|
||||||
|
u16 wrsr; /* Reset Status */
|
||||||
|
};
|
||||||
|
|
||||||
|
#define WCR_WDZST 0x01
|
||||||
|
#define WCR_WDBG 0x02
|
||||||
|
#define WCR_WDE 0x04 /* WDOG enable */
|
||||||
|
#define WCR_WDT 0x08
|
||||||
|
#define WCR_WDW 0x80
|
||||||
|
#define SET_WCR_WT(x) (x << 8)
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMX_WATCHDOG
|
||||||
|
void hw_watchdog_reset(void)
|
||||||
|
{
|
||||||
|
struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
|
||||||
|
|
||||||
|
writew(0x5555, &wdog->wsr);
|
||||||
|
writew(0xaaaa, &wdog->wsr);
|
||||||
|
}
|
||||||
|
|
||||||
|
void hw_watchdog_init(void)
|
||||||
|
{
|
||||||
|
struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
|
||||||
|
u16 timeout;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The timer watchdog can be set between
|
||||||
|
* 0.5 and 128 Seconds. If not defined
|
||||||
|
* in configuration file, sets 128 Seconds
|
||||||
|
*/
|
||||||
|
#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
|
||||||
|
#define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000
|
||||||
|
#endif
|
||||||
|
timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
|
||||||
|
writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT |
|
||||||
|
WCR_WDW | SET_WCR_WT(timeout), &wdog->wcr);
|
||||||
|
hw_watchdog_reset();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
void reset_cpu(ulong addr)
|
||||||
|
{
|
||||||
|
struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
|
||||||
|
|
||||||
|
writew(WCR_WDE, &wdog->wcr);
|
||||||
|
writew(0x5555, &wdog->wsr);
|
||||||
|
writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */
|
||||||
|
while (1) {
|
||||||
|
/*
|
||||||
|
* spin for .5 seconds before reset
|
||||||
|
*/
|
||||||
|
}
|
||||||
|
}
|
|
@ -290,27 +290,60 @@
|
||||||
"uimage=uImage\0" \
|
"uimage=uImage\0" \
|
||||||
"console_fsl=ttyAM0\0" \
|
"console_fsl=ttyAM0\0" \
|
||||||
"console_mainline=ttyAMA0\0" \
|
"console_mainline=ttyAMA0\0" \
|
||||||
|
"fdt_file=imx28-evk.dtb\0" \
|
||||||
|
"fdt_addr=0x41000000\0" \
|
||||||
|
"boot_fdt=try\0" \
|
||||||
|
"ip_dyn=yes\0" \
|
||||||
"mmcdev=0\0" \
|
"mmcdev=0\0" \
|
||||||
"mmcpart=2\0" \
|
"mmcpart=2\0" \
|
||||||
"mmcroot=/dev/mmcblk0p3 rw\0" \
|
"mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
|
||||||
"mmcrootfstype=ext3 rootwait\0" \
|
|
||||||
"mmcargs=setenv bootargs console=${console_mainline},${baudrate} " \
|
"mmcargs=setenv bootargs console=${console_mainline},${baudrate} " \
|
||||||
"root=${mmcroot} " \
|
"root=${mmcroot}\0" \
|
||||||
"rootfstype=${mmcrootfstype}\0" \
|
|
||||||
"loadbootscript=" \
|
"loadbootscript=" \
|
||||||
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
||||||
"bootscript=echo Running bootscript from mmc ...; " \
|
"bootscript=echo Running bootscript from mmc ...; " \
|
||||||
"source\0" \
|
"source\0" \
|
||||||
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
|
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
|
||||||
|
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
|
||||||
"mmcboot=echo Booting from mmc ...; " \
|
"mmcboot=echo Booting from mmc ...; " \
|
||||||
"run mmcargs; " \
|
"run mmcargs; " \
|
||||||
"bootm\0" \
|
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||||
|
"if run loadfdt; then " \
|
||||||
|
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||||
|
"else " \
|
||||||
|
"if test ${boot_fdt} = try; then " \
|
||||||
|
"bootm; " \
|
||||||
|
"else " \
|
||||||
|
"echo WARN: Cannot load the DT; " \
|
||||||
|
"fi; " \
|
||||||
|
"fi; " \
|
||||||
|
"else " \
|
||||||
|
"bootm; " \
|
||||||
|
"fi;\0" \
|
||||||
"netargs=setenv bootargs console=${console_mainline},${baudrate} " \
|
"netargs=setenv bootargs console=${console_mainline},${baudrate} " \
|
||||||
"root=/dev/nfs " \
|
"root=/dev/nfs " \
|
||||||
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
||||||
"netboot=echo Booting from net ...; " \
|
"netboot=echo Booting from net ...; " \
|
||||||
"run netargs; " \
|
"run netargs; " \
|
||||||
"dhcp ${uimage}; bootm\0"
|
"if test ${ip_dyn} = yes; then " \
|
||||||
|
"setenv get_cmd dhcp; " \
|
||||||
|
"else " \
|
||||||
|
"setenv get_cmd tftp; " \
|
||||||
|
"fi; " \
|
||||||
|
"${get_cmd} ${uimage}; " \
|
||||||
|
"if test ${boot_fdt} = yes; then " \
|
||||||
|
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
|
||||||
|
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||||
|
"else " \
|
||||||
|
"if test ${boot_fdt} = try; then " \
|
||||||
|
"bootm; " \
|
||||||
|
"else " \
|
||||||
|
"echo WARN: Cannot load the DT; " \
|
||||||
|
"fi;" \
|
||||||
|
"fi; " \
|
||||||
|
"else " \
|
||||||
|
"bootm; " \
|
||||||
|
"fi;\0"
|
||||||
|
|
||||||
#define CONFIG_BOOTCOMMAND \
|
#define CONFIG_BOOTCOMMAND \
|
||||||
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
||||||
|
|
|
@ -61,6 +61,7 @@
|
||||||
#define CONFIG_MXC_UART
|
#define CONFIG_MXC_UART
|
||||||
#define CONFIG_MXC_UART_BASE UART1_BASE
|
#define CONFIG_MXC_UART_BASE UART1_BASE
|
||||||
#define CONFIG_HW_WATCHDOG
|
#define CONFIG_HW_WATCHDOG
|
||||||
|
#define CONFIG_IMX_WATCHDOG
|
||||||
#define CONFIG_MXC_GPIO
|
#define CONFIG_MXC_GPIO
|
||||||
|
|
||||||
#define CONFIG_HARD_SPI
|
#define CONFIG_HARD_SPI
|
||||||
|
|
|
@ -119,24 +119,60 @@
|
||||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||||
"script=boot.scr\0" \
|
"script=boot.scr\0" \
|
||||||
"uimage=uImage\0" \
|
"uimage=uImage\0" \
|
||||||
|
"fdt_file=imx53-qsb.dtb\0" \
|
||||||
|
"fdt_addr=0x71000000\0" \
|
||||||
|
"boot_fdt=try\0" \
|
||||||
|
"ip_dyn=yes\0" \
|
||||||
"mmcdev=0\0" \
|
"mmcdev=0\0" \
|
||||||
"mmcpart=2\0" \
|
"mmcpart=2\0" \
|
||||||
"mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
|
"mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
|
||||||
"mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot} " \
|
"mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
|
||||||
"loadbootscript=" \
|
"loadbootscript=" \
|
||||||
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
||||||
"bootscript=echo Running bootscript from mmc ...; " \
|
"bootscript=echo Running bootscript from mmc ...; " \
|
||||||
"source\0" \
|
"source\0" \
|
||||||
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
|
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
|
||||||
|
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
|
||||||
"mmcboot=echo Booting from mmc ...; " \
|
"mmcboot=echo Booting from mmc ...; " \
|
||||||
"run mmcargs; " \
|
"run mmcargs; " \
|
||||||
"bootm\0" \
|
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||||
|
"if run loadfdt; then " \
|
||||||
|
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||||
|
"else " \
|
||||||
|
"if test ${boot_fdt} = try; then " \
|
||||||
|
"bootm; " \
|
||||||
|
"else " \
|
||||||
|
"echo WARN: Cannot load the DT; " \
|
||||||
|
"fi; " \
|
||||||
|
"fi; " \
|
||||||
|
"else " \
|
||||||
|
"bootm; " \
|
||||||
|
"fi;\0" \
|
||||||
"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
|
"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
|
||||||
"root=/dev/nfs " \
|
"root=/dev/nfs " \
|
||||||
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
||||||
"netboot=echo Booting from net ...; " \
|
"netboot=echo Booting from net ...; " \
|
||||||
"run netargs; " \
|
"run netargs; " \
|
||||||
"dhcp ${uimage}; bootm\0" \
|
"if test ${ip_dyn} = yes; then " \
|
||||||
|
"setenv get_cmd dhcp; " \
|
||||||
|
"else " \
|
||||||
|
"setenv get_cmd tftp; " \
|
||||||
|
"fi; " \
|
||||||
|
"${get_cmd} ${uimage}; " \
|
||||||
|
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||||
|
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
|
||||||
|
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||||
|
"else " \
|
||||||
|
"if test ${boot_fdt} = try; then " \
|
||||||
|
"bootm; " \
|
||||||
|
"else " \
|
||||||
|
"echo ERROR: Cannot load the DT; " \
|
||||||
|
"exit; " \
|
||||||
|
"fi; " \
|
||||||
|
"fi; " \
|
||||||
|
"else " \
|
||||||
|
"bootm; " \
|
||||||
|
"fi;\0"
|
||||||
|
|
||||||
#define CONFIG_BOOTCOMMAND \
|
#define CONFIG_BOOTCOMMAND \
|
||||||
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
||||||
|
@ -157,7 +193,7 @@
|
||||||
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
|
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
|
||||||
#define CONFIG_SYS_PROMPT "MX53LOCO U-Boot > "
|
#define CONFIG_SYS_PROMPT "MX53LOCO U-Boot > "
|
||||||
#define CONFIG_AUTO_COMPLETE
|
#define CONFIG_AUTO_COMPLETE
|
||||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
|
||||||
|
|
||||||
/* Print Buffer Size */
|
/* Print Buffer Size */
|
||||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||||
|
|
|
@ -83,10 +83,14 @@
|
||||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||||
"script=boot.scr\0" \
|
"script=boot.scr\0" \
|
||||||
"uimage=uImage\0" \
|
"uimage=uImage\0" \
|
||||||
|
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
|
||||||
|
"fdt_addr=0x11000000\0" \
|
||||||
|
"boot_fdt=try\0" \
|
||||||
|
"ip_dyn=yes\0" \
|
||||||
"console=" CONFIG_CONSOLE_DEV "\0" \
|
"console=" CONFIG_CONSOLE_DEV "\0" \
|
||||||
"fdt_high=0xffffffff\0" \
|
"fdt_high=0xffffffff\0" \
|
||||||
"initrd_high=0xffffffff\0" \
|
"initrd_high=0xffffffff\0" \
|
||||||
"mmcdev=0\0" \
|
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
|
||||||
"mmcpart=1\0" \
|
"mmcpart=1\0" \
|
||||||
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
|
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
|
||||||
"mmcargs=setenv bootargs console=${console},${baudrate} " \
|
"mmcargs=setenv bootargs console=${console},${baudrate} " \
|
||||||
|
@ -96,15 +100,46 @@
|
||||||
"bootscript=echo Running bootscript from mmc ...; " \
|
"bootscript=echo Running bootscript from mmc ...; " \
|
||||||
"source\0" \
|
"source\0" \
|
||||||
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
|
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
|
||||||
"mmcboot=echo Booting from mmc ...; " \
|
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
|
||||||
|
"mmcboot=echo Booting from mmc ...; " \
|
||||||
"run mmcargs; " \
|
"run mmcargs; " \
|
||||||
"bootm\0" \
|
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||||
|
"if run loadfdt; then " \
|
||||||
|
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||||
|
"else " \
|
||||||
|
"if test ${boot_fdt} = try; then " \
|
||||||
|
"bootm; " \
|
||||||
|
"else " \
|
||||||
|
"echo WARN: Cannot load the DT; " \
|
||||||
|
"fi; " \
|
||||||
|
"fi; " \
|
||||||
|
"else " \
|
||||||
|
"bootm; " \
|
||||||
|
"fi;\0" \
|
||||||
"netargs=setenv bootargs console=${console},${baudrate} " \
|
"netargs=setenv bootargs console=${console},${baudrate} " \
|
||||||
"root=/dev/nfs " \
|
"root=/dev/nfs " \
|
||||||
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
||||||
"netboot=echo Booting from net ...; " \
|
"netboot=echo Booting from net ...; " \
|
||||||
"run netargs; " \
|
"run netargs; " \
|
||||||
"dhcp ${uimage}; bootm\0" \
|
"if test ${ip_dyn} = yes; then " \
|
||||||
|
"setenv get_cmd dhcp; " \
|
||||||
|
"else " \
|
||||||
|
"setenv get_cmd tftp; " \
|
||||||
|
"fi; " \
|
||||||
|
"${get_cmd} ${uimage}; " \
|
||||||
|
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||||
|
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
|
||||||
|
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||||
|
"else " \
|
||||||
|
"if test ${boot_fdt} = try; then " \
|
||||||
|
"bootm; " \
|
||||||
|
"else " \
|
||||||
|
"echo WARN: Cannot load the DT; " \
|
||||||
|
"fi; " \
|
||||||
|
"fi; " \
|
||||||
|
"else " \
|
||||||
|
"bootm; " \
|
||||||
|
"fi;\0"
|
||||||
|
|
||||||
#define CONFIG_BOOTCOMMAND \
|
#define CONFIG_BOOTCOMMAND \
|
||||||
"mmc dev ${mmcdev};" \
|
"mmc dev ${mmcdev};" \
|
||||||
|
|
|
@ -15,6 +15,7 @@
|
||||||
#define CONFIG_MACH_TYPE 3529
|
#define CONFIG_MACH_TYPE 3529
|
||||||
#define CONFIG_MXC_UART_BASE UART4_BASE
|
#define CONFIG_MXC_UART_BASE UART4_BASE
|
||||||
#define CONFIG_CONSOLE_DEV "ttymxc3"
|
#define CONFIG_CONSOLE_DEV "ttymxc3"
|
||||||
|
#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb"
|
||||||
#define CONFIG_MMCROOT "/dev/mmcblk0p2"
|
#define CONFIG_MMCROOT "/dev/mmcblk0p2"
|
||||||
#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
|
#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
|
||||||
|
|
||||||
|
|
|
@ -152,43 +152,78 @@
|
||||||
#define CONFIG_SYS_TEXT_BASE 0x17800000
|
#define CONFIG_SYS_TEXT_BASE 0x17800000
|
||||||
|
|
||||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||||
"script=boot.scr\0" \
|
"script=boot.scr\0" \
|
||||||
"uimage=uImage\0" \
|
"uimage=uImage\0" \
|
||||||
"console=ttymxc1\0" \
|
"console=ttymxc1\0" \
|
||||||
"fdt_high=0xffffffff\0" \
|
"fdt_high=0xffffffff\0" \
|
||||||
"initrd_high=0xffffffff\0" \
|
"initrd_high=0xffffffff\0" \
|
||||||
"mmcdev=0\0" \
|
"fdt_file=imx6q-sabrelite.dtb\0" \
|
||||||
"mmcpart=2\0" \
|
"fdt_addr=0x11000000\0" \
|
||||||
"mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
|
"boot_fdt=try\0" \
|
||||||
"mmcargs=setenv bootargs console=${console},${baudrate} " \
|
"ip_dyn=yes\0" \
|
||||||
"root=${mmcroot}\0" \
|
"mmcdev=0\0" \
|
||||||
"loadbootscript=" \
|
"mmcpart=2\0" \
|
||||||
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
"mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
|
||||||
"bootscript=echo Running bootscript from mmc ...; " \
|
"mmcargs=setenv bootargs console=${console},${baudrate} " \
|
||||||
"source\0" \
|
"root=${mmcroot}\0" \
|
||||||
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
|
"loadbootscript=" \
|
||||||
"mmcboot=echo Booting from mmc ...; " \
|
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
||||||
"run mmcargs; " \
|
"bootscript=echo Running bootscript from mmc ...; " \
|
||||||
"bootm\0" \
|
"source\0" \
|
||||||
"netargs=setenv bootargs console=${console},${baudrate} " \
|
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
|
||||||
"root=/dev/nfs " \
|
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
|
||||||
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
"mmcboot=echo Booting from mmc ...; " \
|
||||||
"netboot=echo Booting from net ...; " \
|
"run mmcargs; " \
|
||||||
"run netargs; " \
|
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||||
"dhcp ${uimage}; bootm\0" \
|
"if run loadfdt; then " \
|
||||||
|
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||||
|
"else " \
|
||||||
|
"if test ${boot_fdt} = try; then " \
|
||||||
|
"bootm; " \
|
||||||
|
"else " \
|
||||||
|
"echo WARN: Cannot load the DT; " \
|
||||||
|
"fi; " \
|
||||||
|
"fi; " \
|
||||||
|
"else " \
|
||||||
|
"bootm; " \
|
||||||
|
"fi;\0" \
|
||||||
|
"netargs=setenv bootargs console=${console},${baudrate} " \
|
||||||
|
"root=/dev/nfs " \
|
||||||
|
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
||||||
|
"netboot=echo Booting from net ...; " \
|
||||||
|
"run netargs; " \
|
||||||
|
"if test ${ip_dyn} = yes; then " \
|
||||||
|
"setenv get_cmd dhcp; " \
|
||||||
|
"else " \
|
||||||
|
"setenv get_cmd tftp; " \
|
||||||
|
"fi; " \
|
||||||
|
"${get_cmd} ${uimage}; " \
|
||||||
|
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||||
|
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
|
||||||
|
"bootm ${loadaddr} - ${fdt_addr}; " \
|
||||||
|
"else " \
|
||||||
|
"if test ${boot_fdt} = try; then " \
|
||||||
|
"bootm; " \
|
||||||
|
"else " \
|
||||||
|
"echo WARN: Cannot load the DT; " \
|
||||||
|
"fi; " \
|
||||||
|
"fi; " \
|
||||||
|
"else " \
|
||||||
|
"bootm; " \
|
||||||
|
"fi;\0"
|
||||||
|
|
||||||
#define CONFIG_BOOTCOMMAND \
|
#define CONFIG_BOOTCOMMAND \
|
||||||
"mmc dev ${mmcdev};" \
|
"mmc dev ${mmcdev};" \
|
||||||
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
||||||
"if run loadbootscript; then " \
|
"if run loadbootscript; then " \
|
||||||
"run bootscript; " \
|
"run bootscript; " \
|
||||||
"else " \
|
"else " \
|
||||||
"if run loaduimage; then " \
|
"if run loaduimage; then " \
|
||||||
"run mmcboot; " \
|
"run mmcboot; " \
|
||||||
"else run netboot; " \
|
"else run netboot; " \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"fi; " \
|
"fi; " \
|
||||||
"else run netboot; fi"
|
"else run netboot; fi"
|
||||||
|
|
||||||
#define CONFIG_ARP_TIMEOUT 200UL
|
#define CONFIG_ARP_TIMEOUT 200UL
|
||||||
|
|
||||||
|
|
|
@ -21,13 +21,14 @@
|
||||||
#define CONFIG_MXC_UART_BASE UART1_BASE
|
#define CONFIG_MXC_UART_BASE UART1_BASE
|
||||||
#define CONFIG_CONSOLE_DEV "ttymxc0"
|
#define CONFIG_CONSOLE_DEV "ttymxc0"
|
||||||
#define CONFIG_MMCROOT "/dev/mmcblk1p2"
|
#define CONFIG_MMCROOT "/dev/mmcblk1p2"
|
||||||
|
#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb"
|
||||||
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
|
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
|
||||||
|
|
||||||
#include "mx6qsabre_common.h"
|
#include "mx6qsabre_common.h"
|
||||||
|
|
||||||
#define CONFIG_SYS_FSL_USDHC_NUM 3
|
#define CONFIG_SYS_FSL_USDHC_NUM 3
|
||||||
#if defined(CONFIG_ENV_IS_IN_MMC)
|
#if defined(CONFIG_ENV_IS_IN_MMC)
|
||||||
#define CONFIG_SYS_MMC_ENV_DEV 2 /* eMMC/uSDHC4 */
|
#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
|
||||||
#define CONFIG_SYS_MMC_ENV_PART 1 /* Boot partition 1 */
|
#define CONFIG_SYS_MMC_ENV_PART 1 /* Boot partition 1 */
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -52,6 +52,7 @@
|
||||||
|
|
||||||
#define CONFIG_MXC_GPIO
|
#define CONFIG_MXC_GPIO
|
||||||
#define CONFIG_HW_WATCHDOG
|
#define CONFIG_HW_WATCHDOG
|
||||||
|
#define CONFIG_IMX_WATCHDOG
|
||||||
|
|
||||||
#define CONFIG_MXC_SPI
|
#define CONFIG_MXC_SPI
|
||||||
#define CONFIG_DEFAULT_SPI_BUS 1
|
#define CONFIG_DEFAULT_SPI_BUS 1
|
||||||
|
|
|
@ -35,6 +35,7 @@
|
||||||
* Hardware watchdog
|
* Hardware watchdog
|
||||||
*/
|
*/
|
||||||
#ifdef CONFIG_HW_WATCHDOG
|
#ifdef CONFIG_HW_WATCHDOG
|
||||||
|
void hw_watchdog_init(void);
|
||||||
#if defined(__ASSEMBLY__)
|
#if defined(__ASSEMBLY__)
|
||||||
#define WATCHDOG_RESET bl hw_watchdog_reset
|
#define WATCHDOG_RESET bl hw_watchdog_reset
|
||||||
#else
|
#else
|
||||||
|
|
Loading…
Reference in New Issue