Resize the uboot to 1 MB, as that will be sufficient.
Increase the kernel size from 5MB to 8MB, as android kernel build images
are more than 5MB.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Resize the uboot to 1 MB, as that will be sufficient.
Increase the kernel size from 5MB to 8MB, as android kernel build images
are more than 5MB.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
NAND.u-boot-spl-os partition is sized for 2 x NAND_BLOCK_SIZE, so that
in future it can:
- split into redundant partitions "u-boot-spl-os" and "u-boot-spl-os.backup1"
- store large DTB(s)
Signed-off-by: Pekon Gupta <pekon@ti.com>
NAND.u-boot-spl-os partition is sized for 2 x NAND_BLOCK_SIZE, so that
in future it can:
- split into redundant partitions "u-boot-spl-os" and "u-boot-spl-os.backup1"
- store large DTB(s)
Signed-off-by: Pekon Gupta <pekon@ti.com>
Depending on the number of partitions available (say if QSPI also has a
table, or not) '9' is not the correct spot for the UBI image. It is
however put on the "file-system" partition, so use that.
Signed-off-by: Tom Rini <trini@ti.com>
The following commit[1] defined CPSW for CONFIG_QSPI_BOOT, but for other
configs CPSW remains disabled. Hence, doing a undef of CPSW whereever
required rather than defining it for only QSPI_BOOT.
[1] c812c28 configs: am43x-evm: change uboot offset
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Upon further inspection of relevant parts of the architecture, the
maximum SPL binary size is 220KiB.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
We do not support sub-page on NAND on any of these parts so we must
always provide the location of the VID header offset and this is always
our page size.
Signed-off-by: Tom Rini <trini@ti.com>
It has been observed that with default Kernel and dtd load address, if
dtb is not relocated on AM43x, Kernel doesn't boot - probably due to
Kernel image getting overwritten by dtb.
Fix it by relocating dtb as is done for other platforms so that defaults
will make AM43x boot.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
When porting the NAND and MMC boot CMD it was developer
error not porting over the contents of the NAND and MMC
boot commands as they existed in the tree.
Therefore need to update the common boot commands to what
was already available for the platforms.
Also removed the NANDARGS from the platform files so that
they do not cause confusion.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
[trini: Add omap5_common.h change]
Signed-off-by: Tom Rini <trini@ti.com>
Commonize in the ti_armv7_common.h the boot scripts for
USB, MMC and NAND.
Each board file can then select which BOOT_TARGETS are applicable
for the target board.
And any parameters based on that.
Finally removed the findfdt from the common file and made this more board
specific as omap4_common should not reference panda.
This implemenation was adopted from the tegra-common-post.h file.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
The fdt_high variable controls how high into memory the FDT can be moved
as part of booting the kernel. We had been disabling this feature as by
default we move to the very top of memory which can often be part of
highmem and so not visible to the kernel yet. However, in other cases
the kernel BSS can overwrite the FDT at the location we use, and we
wouldn't detect this case. The answer is to re-enable relocation, but
ensure it will be in kernel-visible memory still.
Signed-off-by: Tom Rini <trini@ti.com>
This patch adds CONFIG_SPL_NAND_DEVICE_WIDTH to specify bus-width of NAND device
CONFIG_SPL_NAND_DEVICE_WIDTH == 16: NAND device with x16 bus-width
CONFIG_SPL_NAND_DEVICE_WIDTH == 8: NAND device with x8 bus-width
Need for a separate CONFIG_xx arise from following situations.
(1) SPL NAND drivers does not have framework to parse ONFI parameter page.
(2) if !defined(CONFIG_SYS_NAND_SELF_INIT)
|- board_nand_init()
|- nand_scan()
|- nand_scan_ident()
|- nand_scan_tail()
This means board_nand_init() is called before nand_scan_ident(). So NAND
controller is initialized before the actual probing of NAND device.
However some controller (like GPMC) need to be specifically configured for
bus-width of NAND device.
In such cases, bus-width of the NAND device should be known in advance
of actual device probing. Hence, CONFIG_SPL_NAND_DEVICE_WIDTH is useful.
(3) Non-ONFI compliant devices need some mechanism to specify device bus-width
to driver.
Signed-off-by: Pekon Gupta <pekon@ti.com>
This patch
- Adds pin-mux for x8 parallel NAND device (MT29F4G08AB) present on AM43xx_EVM
- As above NAND device has blocksize=256k, pagesize=4k, oobsize=224, so by
design ROM code expects SPL to be flashed using BCH16 ECC scheme. Hence
CONFIG_NAND_OMAP_ECCSCHEME = OMAP_ECC_BCH16_CODE_HW is enabled.
- Specifies MTD partition table which needs same as kernel DTS for AM43xx_EVM.
- Populates other CONFIG_xx parameters required for NAND Boot on AM43xx
Signed-off-by: Pekon Gupta <pekon@ti.com>
This patch
- Groups all CONFIG_xx required for enabling parallel NAND on AM335x_EVM
into single file include/configs/am335x_evm.h
- Updates MTD partition table to include backup partitions for
u-boot, environment and u-boot-spl-os.
- Aligns MTD partitions (except for SPL partitions) such that partition offsets
and sizes remain constant for all NAND devices with blocksize=128k or 256k.
(because MTD partitions need to be aligned with blocksize boundary)
Signed-off-by: Pekon Gupta <pekon@ti.com>
With increase in NAND flash densities occurence of bit-flips has increased.
Thus stronger ECC schemes are required for detecting and correcting multiple
simultaneous bit-flips in same NAND page. But stronger ECC schemes have large
ECC syndrome which require more space in OOB/Spare.
This patch add support for BCH16_ECC:
(a) BCH16_ECC can correct 16 bit-flips per 512Bytes of data.
(b) BCH16_ECC generates 26-bytes of ECC syndrome / 512B.
Due to (b) this scheme can only be used with NAND devices which have enough
OOB to satisfy following equation:
OOBsize per page >= 26 * (page-size / 512)
Signed-off-by: Pekon Gupta <pekon@ti.com>
With increase in NAND flash densities occurence of bit-flips has increased.
Thus stronger ECC schemes are required for detecting and correcting multiple
simultaneous bit-flips in same NAND page. But stronger ECC schemes have large
ECC syndrome which require more space in OOB/Spare.
This patch add support for BCH16_ECC:
(a) BCH16_ECC can correct 16 bit-flips per 512Bytes of data.
(b) BCH16_ECC generates 26-bytes of ECC syndrome / 512B.
Due to (b) this scheme can only be used with NAND devices which have enough
OOB to satisfy following equation:
OOBsize per page >= 26 * (page-size / 512)
Signed-off-by: Pekon Gupta <pekon@ti.com>
Increase read only segment size so that more peheripheral support can be
added to SPL like Ethernet or USB. The OCMC ram size is 256K, so allocating
~220K for read only segment.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
omap_elm.h is a generic header used by OMAP ELM driver for all TI platfoms.
Hence this file should be present in generic folder instead of architecture
specific include folder.
Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5
Signed-off-by: Pekon Gupta <pekon@ti.com>
omap_gpmc.h is a generic header used by OMAP NAND driver for all TI platfoms.
Hence this file should be present in generic folder instead of architecture
specific include folder.
Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5
Signed-off-by: Pekon Gupta <pekon@ti.com>
OMAP NAND driver can detect Page-size and OOB-size of NAND device from ONFI
params or nand_id[] table. And based on that it defines ECC layout.
This patch
1) removes following board configs used for defining NAND ECC layout
- GPMC_NAND_ECC_LP_x16_LAYOUT (for large page x16 NAND)
- GPMC_NAND_ECC_LP_x8_LAYOUT (for large page x8 NAND)
- GPMC_NAND_ECC_SP_x16_LAYOUT (for small page x16 NAND)
- GPMC_NAND_ECC_SP_x8_LAYOUT (for small page x8 NAND)
2) removes unused #defines in common omap_gpmc.h depending on above configs
Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5
Signed-off-by: Pekon Gupta <pekon@ti.com>
This patch adds new CONFIG_NAND_OMAP_ECCSCHEME, replacing other distributed
CONFIG_xx used for selecting NAND ecc-schemes.
This patch aims at solving following issues.
1) Currently ecc-scheme is tied to SoC platform, which prevents user to select
other ecc-schemes also supported in hardware. like;
- most of OMAP3 SoC platforms use only 1-bit Hamming ecc-scheme, inspite
the fact that they can use higher ecc-schemes like 8-bit ecc-schemes with
software based error detection (OMAP_ECC_BCH4_CODE_HW_DETECTION_SW).
- most of AM33xx SoC plaforms use 8-bit BCH ecc-scheme for now, but hardware
supports BCH16 ecc-scheme also.
2) Different platforms use different CONFIG_xx to select ecc-schemes, which
adds confusion for user while migrating platforms.
- *CONFIG_NAND_OMAP_ELM* which enables ELM hardware engine, selects only
8-bit BCH ecc-scheme with h/w based error-correction (OMAP_ECC_BCH8_CODE_HW)
whereas ELM hardware engine supports other ecc-schemes also like; BCH4,
and BCH16 (in future).
- *CONFIG_NAND_OMAP_BCH8* selects 8-bit BCH ecc-scheme with s/w based error
correction (OMAP_ECC_BCH8_CODE_HW_DETECTION_SW).
- *CONFIG_SPL_NAND_SOFTECC* selects 1-bit Hamming ecc-scheme using s/w library
Thus adding new *CONFIG_NAND_OMAP_ECCSCHEME* de-couples ecc-scheme dependency
on SoC platform and NAND driver. And user can select ecc-scheme independently
foreach board.
However, selection some hardware based ecc-schemes (OMAP_ECC_BCHx_CODE_HW) still
depends on presence of ELM hardware engine on SoC. (Refer doc/README.nand)
Signed-off-by: Pekon Gupta <pekon@ti.com>
ELM hardware engine which is used for ECC error detection, is present on all
latest OMAP SoC (like OMAP4xxx, OMAP5xxx, DRA7xxx, AM33xx, AM43xx). Thus ELM
driver should be moved to common drivers/mtd/nand/ folder so that all SoC
having on-chip ELM hardware engine can re-use it.
This patch has following changes:
- mv arch/arm/include/asm/arch-am33xx/elm.h arch/arm/include/asm/omap_elm.h
- mv arch/arm/cpu/armv7/am33xx/elm.c drivers/mtd/nand/omap_elm.c
- update Makefiles
- update #include <asm/elm.h>
- add CONFIG_NAND_OMAP_ELM to compile driver/mtd/nand/omap_elm.c
and include in all board configs using AM33xx SoC platform.
Signed-off-by: Pekon Gupta <pekon@ti.com>
Introduce the usage of QSPI CH for DRA7xx instead of the default and
dummy CHSETTINGS. This CH is only valid for DRA7xx based devices and
is intended to speed up the boot for QSPI_1 device.
Change-Id: I9ab902f0597a758a48732b4dac18adc2e840f7ab
Signed-off-by: Carlos Leija <cileija@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Sourav Poddar
Tom Rini
Pekon Gupta
Dan Murphy
Afzal Mohammed
Mugunthan V N
Carlos Leija
Roger Quadros