Commit graph

9125 commits

Author SHA1 Message Date
Roger Quadros
3ac8d1ee12 usb: dwc3: Makefile: Don't build gadget code if USB_GADGET is disabled
It is pointless to build gadget driver if USB_GADGET is disabled.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
2016-05-27 15:39:49 -04:00
Beniamino Galvani
bfcef28ae4 arm: add initial support for Amlogic Meson and ODROID-C2
This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
board definition for ODROID-C2. This initial submission only supports
UART and Ethernet (through the existing Designware driver). DTS files
are the ones submitted to Linux arm-soc for 4.7 [1].

[1] https://patchwork.ozlabs.org/patch/603583/

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-27 15:39:47 -04:00
Beniamino Galvani
0e1a3e30de net: designware: fix descriptor layout and warnings on 64-bit archs
All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix
other warnings.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Use phys_addr_t not unsigned long long to test that we're within
DMA'able memory]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-05-27 15:39:46 -04:00
mario.six@gdsys.cc
71db3270db dm: gpio: pca953x: Support PCA953X with 40 GPIOs
A DM driver for PCA953x was recently introduced by Peng Fan, which lacked
support for the 40 GPIO versions.

This patch adds support for these chips.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Peng Fan  <van.freenix@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-27 09:56:20 -04:00
Tom Rini
6523dbf7cc Merge branch 'master' of git://git.denx.de/u-boot-mips 2016-05-25 20:22:48 -04:00
Paul Burton
df8ec55d52 dm: ns16550: Don't map_physmem for I/O ports
If the UART is to be accessed using I/O port accessors (inb & outb) then
using map_physmem doesn't make sense, since it operates in a different
memory space. Remove the call to map_physmem when
CONFIG_SYS_NS16550_PORT_MAPPED is defined, allowing I/O port addresses
to not be mangled by the incorrect mapping.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-26 01:34:13 +02:00
Paul Burton
0a222d53d8 fdt: Support for ISA busses
Support ISA busses in much the same way as Linux does. This allows for
ISA bus addresses to be translated, and only if CONFIG_OF_ISA_BUS is
selected in order to avoid including the code in builds which won't need
it.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-25 23:13:09 +02:00
Tom Rini
82f2a14491 Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2016-05-25 12:32:56 -04:00
Tom Rini
1b80e79586 Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2016-05-25 12:27:44 -04:00
Chen-Yu Tsai
795857df41 sunxi: power: add AXP809 support
The A80 uses the AXP809 as its primary PMIC.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-05-25 17:52:39 +02:00
Chen-Yu Tsai
511992695d sunxi: Implement poweroff support for axp818 pmic
Adds poweroff support for axp818 pmic.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-05-25 17:52:39 +02:00
Chen-Yu Tsai
15278ccb84 sunxi: power: axp818: Add support for switch SW
The AXP818 has a switchable output, SW. This is commonly used for
controlling power to the LCD backlight.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-05-25 17:52:39 +02:00
Chen-Yu Tsai
a696253c1d power: axp818: Fix typo for fldo2 Kconfig description
Description said eldo2 instead of fldo2, a copy-paste error.

Fixes: 38491d9c65 ("power: axp818: Add support for FLDOs")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-05-25 17:52:39 +02:00
Chen-Yu Tsai
aa23f539c8 power: axp221: Remove switch case to simplify axp_set_eldo
The ELDO enable bits and registers are contiguous for axp221. Instead
of a switch case testing against the index, just use the index to shift
the bit or register offset.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-05-25 17:52:39 +02:00
Masahiro Yamada
ae932cf67e clk: uniphier: add Media I/O clock driver support for PH1-LD11
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26 00:37:13 +09:00
Tom Rini
826d06dbdd Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2016-05-25 07:19:31 -04:00
Ying Zhang
8ef548d5f1 powerpc:t4240: MAC9 and MAC10 should not be identified as 1G interface in some case
When using rcw protocols to support 10G on MAC9 and MAC10, these MACs
should not be identified as 1G interface, otherwise, one MAC will be
listed as two Ethernet ports. For example, MAC9 will be listed as
FM1@TGEC1 and FM1@DTSEC9.

Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-05-24 17:11:03 -07:00
Tom Rini
fc15b9beed Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2016-05-24 13:42:03 -04:00
Tom Rini
2ee490a024 Merge branch 'master' of git://git.denx.de/u-boot-net
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	drivers/net/zynq_gem.c
2016-05-24 11:59:02 -04:00
Dan Murphy
0a71cd7729 net: phy: dp83867: Add SGMII helper for configuration
The code assumed that if the interface is not RGMII configured
then it must be SGMII configured.  This device has the ability
to support most of the MII interfaces.  Therefore add the
helper for SGMII and only configure the device if the interface is
configured for SGMII.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-05-24 11:42:05 -05:00
Dan Murphy
3ab72fe807 net: phy: Move is_rgmii helper to phy.h
Move the phy_interface_is_rgmii to the phy.h
file for all phy's to be able to use the API.

This now aligns with the Linux kernel based on
commit e463d88c36d42211aa72ed76d32fb8bf37820ef1

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-05-24 11:42:05 -05:00
Dan Murphy
085445ca41 net: phy: ti: Allow the driver to be more configurable
Not all devices use the same internal delay or fifo depth.
Add the ability to set the internal delay for rx or tx and the
fifo depth via the devicetree.  If the value is not set in the
devicetree then set the delay to the default.

If devicetree is not used then use the default defines within the
driver.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-05-24 11:42:04 -05:00
Dan Murphy
20671a9896 net: zynq_gem: Add the passing of the phy-handle node
Add the ability to pass the phy-handle node offset
to the phy driver.  This allows the phy driver
to access the DT subnode's data and parse accordingly.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-05-24 11:42:04 -05:00
Dan Murphy
cb3862277b drivers: net: cpsw: Add reading of DT phy-handle node
Add the ability to read the phy-handle node of the
cpsw slave.  Upon reading this handle the phy-id
can be stored based on the reg node in the DT.

The phy-handle also needs to be stored and passed
to the phy to access any phy data that is available.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-05-24 11:42:04 -05:00
Mugunthan V N
e4310566de drivers: net: cpsw: add support for reading mac address from efuse
Different TI platforms has to read with different combination to
get the mac address from efuse. So add support to read mac address
based on machine/device compatibles.

The code is taken from Linux drivers/net/ethernet/ti/cpsw-common.c
done by Tony Lindgren.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-05-24 11:42:03 -05:00
Mugunthan V N
66e740cbbd drivers: net: cpsw: fix get mdio base and gmii_sel reg from DT
Since dra7x platforms address bus is define as 64 bits to support
LAPE, fdtdec_get_addr() returns a invalid address for mdio based
and gmii_sel register address. Fixing this by using
fdtdec_get_addr_size_auto_noparent() which will derive address
cell and size cell from its parent.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-05-24 11:42:02 -05:00
Mugunthan V N
b2003c5458 drivers: net: cpsw: fix cpsw dp parse when num slaves as 1
On some boards number of slaves can be 1 when only one port
ethernet is pinned out. So do not break when slave_index and
num slaves check fails, instead continue to parse the next
child.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-05-24 11:42:02 -05:00
Mugunthan V N
73443b9e4c drivers: core: device: add support to check dt compatible for a device/machine
Provide an api to check whether the given device or machine is
compatible with the given compat string which helps in making
decisions in drivers based on device or machine compatible.

Idea taken from Linux.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2016-05-24 11:42:02 -05:00
Kevin Smith
24ae3961f8 net: phy: Add PHY driver for mv88e61xx switches
The previous mv88e61xx driver was a driver for configuring the
switch, but did not integrate with the PHY/networking system, so
it could not be used as a PHY by U-boot.  This is a complete
rework to support this device as a PHY.

Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-05-24 11:39:04 -05:00
Kevin Smith
83c05515d8 net: Remove unused mv88e61xx switch driver
No boards are using this driver.  Remove in preparation for a new
driver with integrated PHY support.

Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
2016-05-24 11:39:04 -05:00
Tom Rini
ec8fb48ce9 Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze 2016-05-24 08:20:43 -04:00
Michal Simek
1b008fdb06 phy: marvell: Do not reset phy after negotiation
The patch
"net: phy: do not read configuration register on reset"
(sha1: a058052c35)
was causing regression on zynq zc702 board where Marwell 88e1118
phy was resetted after negotiation was setup.
Phy reset is done pretty early in phy_connect_dev() and doens't need to
be called again in phy code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-05-24 13:17:59 +02:00
Michal Simek
7a673f0b06 phy: Wire return value from phy_config()
Fix zynq_gem driver to handle error from phy_config correctly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-05-24 13:17:59 +02:00
Michal Simek
b733c278d7 net: phy: Handle phy_startup() error codes properly
Propagate error code from genphy_update_link() to phy startup().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2016-05-24 13:17:59 +02:00
Michal Simek
ef5e821bd8 phy: Return correct error code when timeout happens
Return -ETIMEDOUT if timeout happens.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2016-05-24 13:17:59 +02:00
Michal Simek
55259e7cda net: xilinx: Handle error value from phy_startup()
Handle error returned by phy_startup() properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2016-05-24 13:17:55 +02:00
Michal Simek
905bca6c2d fpga: Fix typo in function comment
Trivial patch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-05-24 11:15:02 +02:00
Michal Simek
a6b9587bad gpio: zynq: Add support for reading gpio pin state
Add zynq_gpio_get_function() which return status on gpio pin.
This function enables gpio status command.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-05-24 11:15:00 +02:00
Tom Rini
6d54868eeb Merge branch 'master' of git://git.denx.de/u-boot-x86 2016-05-23 18:32:47 -04:00
Tom Rini
d7d0003112 Merge branch 'master' of git://git.denx.de/u-boot-mips 2016-05-23 11:51:37 -04:00
Martin Hejnfelt
5f89a15e16 omap3: Fix SPI registers on am33xx and am43xx
When the base registers are read from device tree the base is not
0x48030100 as the driver expects, but 0x48030000, resulting in
non functioning SPI. To deal with this, use same idea as how this
is done in the linux kernel (drivers/spi/spi-omap2-mcspi.c) and
add a structure with a field that is used to shift the registers
on these systems.

v2: Fixed commit subject line to correct cpu

Signed-off-by: Martin Hejnfelt <mh@newtec.dk>
2016-05-23 11:50:22 -04:00
Miao Yan
eece493a7a cmd: qfw: bring ACPI generation code into qfw core
Loading ACPI table from QEMU's fw_cfg interface is not x86 specific
(ARM64 may also make use of it). So move the code to common place.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23 15:18:00 +08:00
Miao Yan
1868659002 cmd: qfw: rename qemu_fw_cfg.[c|h] to qfw.[c|h]
Make file names consistent with CONFIG_QFW and CONFIG_CMD_QFW

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23 15:18:00 +08:00
Miao Yan
2e82e745a4 x86: qemu: move x86 specific operations out of qfw core
The original implementation of qfw includes several x86 specific
operations, like directly calling outb/inb and using some inline
assembly code which prevents it being ported to other architectures.

This patch adds callback functions and moves those to arch/x86/

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23 15:18:00 +08:00
Miao Yan
fcf5c04193 x86: qemu: split qfw command interface and qfw core
This patch splits qfw command interface and qfw core function into two
files, and introduces a new Kconfig option (CONFIG_QFW) for qfw core.

Now when qfw command interface is enabled, it will automatically select
qfw core. This patch also makes the ACPI table generation select
CONFIG_QFW.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-05-23 15:18:00 +08:00
Wills Wang
773f3b2538 ar933x: serial: Remove the explicit pinctrl setting
The correct pinctrl is handled automatically so we don't need to do it in
the driver.

Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21 01:36:38 +02:00
Wills Wang
5fabf2e7da ath79: spi: Remove the explicit pinctrl setting
The correct pinctrl is handled automatically so we don't need to do it in
the driver.

Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21 01:36:37 +02:00
Purna Chandra Mandal
5c99045699 drivers: mtd: add Microchip PIC32 internal non-CFI flash driver.
PIC32 internal flash devices are parallel NOR flash divided into
number of banks to allow erase-programming in one while fetch and
execution continues on other. As the flash banks are memory mapped
stored code can be executed directly from flash (XIP), also there
is additional hardware logic to prefetch and cache contents to
improve execution performance. These flash can also be used to
store user data (like environment).
Flash erase and programming are handled by on-chip NVM controller.

Driver implemented driver model but MTD is not really support.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-21 01:25:50 +02:00
Wills Wang
b85dc46072 drivers: spi: add spi support for QCA/Atheros ath79 SOCs
This patch add a compatible spi driver for ath79 series SOC.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21 01:25:50 +02:00
Wills Wang
60b49761e9 drivers: serial: add serial driver for ar933x SOC
This patch add support for ar933x serial.

Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-21 01:25:50 +02:00