This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).
Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Some old GNU assemblers, such as v2.14 (ELDK 3.1.1), v2.16 (ELDK 4.1.0),
warns illegal global symbol references by bal (and jal also) instruction.
This does not happen with the latest binutils v2.18.
Here's an example on gth2_config:
mips_4KC-gcc -D__ASSEMBLY__ -g -Os -D__KERNEL__ -DTEXT_BASE=0x90000000 -I/home/skuribay/devel/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isy
stem /opt/eldk311/usr/bin/../lib/gcc-lib/mips-linux/3.3.3/include -pipe -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -pipe -msoft-float -march=4kc -mtune=4k
c -EB -c -o cache.o cache.S
cache.S: Assembler messages:
cache.S:243: Warning: Pretending global symbol used as branch target is local.
cache.S:250: Warning: Pretending global symbol used as branch target is local.
In principle, gas might be sensitive to global symbol references in PIC
code because they should be processed through GOT (global offset table).
But if `bal' instruction is used, it results in PC-based offset jump.
This is the cause of this warning.
In practice, we know it doesn't matter whether PC-based reference or GOT-
based. As for this case, both will work before/after relocation. But let's
fix the code.
This patch explicitly sets up a target address, then jump there.
Here's an example of disassembled code with/without this patch.
90000668: 1485ffef bne a0,a1,90000628 <mips_cache_reset+0x20>
9000066c: ac80fffc sw zero,-4(a0)
90000670: 01402821 move a1,t2
-90000674: 0411ffba bal 90000560 <mips_init_icache>
-90000678: 01803021 move a2,t4
-9000067c: 01602821 move a1,t3
-90000680: 0411ffcc bal 900005b4 <mips_init_dcache>
-90000684: 01a03021 move a2,t5
-90000688: 03000008 jr t8
-9000068c: 00000000 nop
+90000674: 01803021 move a2,t4
+90000678: 8f8f83ec lw t7,-31764(gp)
+9000067c: 01e0f809 jalr t7
+90000680: 00000000 nop
+90000684: 01602821 move a1,t3
+90000688: 01a03021 move a2,t5
+9000068c: 8f8f81e0 lw t7,-32288(gp)
+90000690: 01e0f809 jalr t7
+90000694: 00000000 nop
+90000698: 03000008 jr t8
+9000069c: 00000000 nop
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Current trick to pick up GNU assembler minor version uses a dot(.) as a
delimiter, and take the second field to obtain minor version number. But
as can be expected, this doesn't work with a version string which has
dots more than needs.
Here's an example:
$ mips-linux-gnu-as --version | grep 'GNU assembler'
GNU assembler (Sourcery G++ Lite 4.2-129) 2.18.50.20080215
$ mips-linux-gnu-as --version | grep 'GNU assembler' | cut -d. -f2
2-129) 2
$
This patch restricts the version format to 2.XX.XX... This will work
in most cases.
$ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+'
2.18.50.20080215
$ mips-linux-gnu-as --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2
18
$
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Current assembler codes are inconsistent in the way of register jump
instruction usage; some use jr, some use j. Of course GNU as allows both
usages, but as can be expected from `Jump Register' the mnemonic `jr' is
more intuitive than `j'. For example, Linux doesn't have `j <reg>' usage
at all.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Cache operations have to take line address (addr), not start_addr.
I noticed this bug when debugging ping failure.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Add setup_c0_status from Linux. For the moment we disable interrupts, set
CU0, mark the kernel mode, and clear ERL and EXL. This is good enough for
reset-time configuration and will work well across most processors.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Without this change, we'll be suffering from deffered WATCH exception
once Status.EXL is cleared. Make sure Cause.WP is cleared.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
We do Hit_Writeback_Inv_D and Hit_Invalidate_I. You might think that you
don't need to do Hit_Invalidate_I, but flush_cache() needs it since this
function is used not only in U-Boot specfic programs but also at loading
target binaries.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Currently we do 1) Index_Store_Tag_I, 2) Fill and 3) Index_Store_Tag_I
again per a loop for I-cache initialization. But according to 'See MIPS
Run', we're encouraged to use three separate loops rather than combining
them *for both I- and D-cache*. This patch tries to fix this.
In accordance with fixing above, mips_init_[id]cache are separated from
mips_cache_reset(), and rewrite cache loops are completely rewritten with
useful macros.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This patch replaces the current function definitions with NESTED, LEAF
and END macro. They specify some more additional information about the
function; an alignment of symbol, type of symbol, stack frame usage, etc.
These information explicitly tells the assembler and the debugger about
the types of code we want to generate.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
The initial intension of having mips_cache_lock() was to use the cache
as memory for temporary stack use so that a C environment can be set up
as early as possible.
But now mips_cache_lock() follow lowlevel_init(). We've already have the
real memory initilaized at this point, therefore we could/should use it.
No reason to lock at all.
Other problems:
Cache locking is not consistent across MIPS implementaions. Some imple-
mentations don't support locking at all. The style of locking varies -
some support per line locking, others per way, etc. Some parts use bits
in status registers instead of cache ops. Current mips_cache_lock() is
not necessarily general-purpose.
And this is worthy of special mention; once U-Boot/MIPS locks the lines,
they are never get unlocked, so the code relies on whatever gets loaded
after U-Boot to re-initialize the cache and clear the locks. We're sup-
posed to have CFG_INIT_RAM_LOCK and unlock_ram_in_cache() implemented,
but leave the situation as it is for a long time.
For these reasons, I proposed the removal of mips_cache_lock() from the
global start-up code.
This patch adds CFG_INIT_RAM_LOCK_MIPS to make existing users aware that
*things have changed*. If he wants the same behavior as before, he needs
to have CFG_INIT_RAM_LOCK_MIPS in his config file.
If we don't have any regression report through several releases, then
we'll remove codes entirely.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Acked-by: Andrew Dyer <amdyer@gmail.com>
This reduces the build time by ~10%. Here's the gth2_config example.
BEFORE AFTER
real 0m31.441s 0m27.833s
user 0m24.766s 0m23.045s
sys 0m10.425s 0m7.468s
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
au1x00_eth.c: In function 'au1x00_miiphy_write':
au1x00_eth.c:139: warning: 'return' with no value, in function returning non-void
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
au1x00_eth.c: In function 'au1x00_enet_initialize':
au1x00_eth.c:246: error: 'au1x00_miiphy_read' undeclared (first use in this function)
au1x00_eth.c:246: error: (Each undeclared identifier is reported only once
au1x00_eth.c:246: error: for each function it appears in.)
au1x00_eth.c:246: error: 'au1x00_miiphy_write' undeclared (first use in this function)
au1x00_eth.c: In function 'au1x00_miiphy_write':
au1x00_eth.c:298: warning: 'return' with no value, in function returning non-void
make[1]: *** [au1x00_eth.o] Error 1
Fixed by moving these two functions forward.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Now we load $gp with _GLOBAL_OFFSET_TABLE_, but this is incorrect use.
As a general principle, we should use _gp for $gp.
Thanks to linker script's help we fortunately have _gp which equals to
_GLOBAL_OFFSET_TABLE_. But once _gp gets out of alignment, we will not
be able to access to GOT entires, global variables and procedure entry
points. The right thing to do is to use _gp.
This patch also introduce a new symbol `.gpword _GLOBAL_OFFSET_TABLE_'
which holds the offset from _gp. When updating GOT entries, we use this
offset and _gp to calculate the final _GLOBAL_OFFSET_TABLE_.
This patch is originally submitted by Vlad Lungu <vlad@comsys.ro>, then
I made some change to leave over num_got_entries.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc: Vlad Lungu <vlad@comsys.ro>
This is a compatibility step that allows both the older form
and the new form to co-exist for a while until the older can
be removed entirely.
All transformations are of the form:
Before:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
After:
#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Modifications are based on the linux kernel approach and
support two use cases:
1) Add O= to the make command line
'make O=/tmp/build all'
2) Set environement variable BUILD_DIR to point to the desired location
'export BUILD_DIR=/tmp/build'
'make'
The second approach can also be used with a MAKEALL script
'export BUILD_DIR=/tmp/build'
'./MAKEALL'
Command line 'O=' setting overrides BUILD_DIR environent variable.
When none of the above methods is used the local build is performed and
the object files are placed in the source directory.
Incorrect gcc options (big endian -BE switch) were used for
dbau1550_el which is a little endian build; also get rid of reference
to non-existant cpu/mips/little/liblittle.a library
* Adjust MIPS compiler options at run-time depending on tools version
("-march=4kc -mtune=4kc -Wa,-mips_allow_branch_to_undefined" for new,
"-mcpu=4kc" for old tools)
Fix Intel 28F128J3 ID in include/flash.h
* Patch by Masami Komiya, 09 Jan 2004:
add support for TB0229 board (NEC VR4131 MIPS processor)
* Patch by Leon Kukovec, 12 Dec 2003:
changed extern __inline__ into static __inline__ in
include/linux/byteorder/swab.h
fixes for Davicom DM9102A Ethernet Chip (#define CONFIG_TULIP_FIX_DAVICOM):
- TX and RX deskriptors must be quad-word aligned
- does not work with only one TX deskriptor
- standard reset method does not work
* Patch by Masami Komiya, 08 Dec 2003:
add RTL8139 ethernet driver
* Patches by Ed Okerson, 07 Dec 2003:
- fix ethernet for the AU1x00 processors in little-endian mode.
- extend memsetup.S for the AU1x00 processors in BE and LE modes
environment variable which can set to "100", "133", or "150". The
CPU clock will be configured accordingly upon next reboot. Other
values are ignored. In case of an invalid or undefined "cpuclk"
value, the compile-time default CPU clock speed will be used.
* Enable Quad-UART on BMS2003 board (initialize the PCMCIA memory
window that is used to access the UART registers by the Linux driver)
* Patch by Reinhard Meyer, 20 Dec 2003:
Fix clock calculation for the MPC5200 for higher clock frequencies
(above 2**32 / 10 = 429.5 MHz).
- board/mpl/common/common_util.c
* implement support for BZIP2 compressed images
* various cleanups (printf -> puts, ...)
- board/mpl/common/flash.c
* report correct errors to upper layers
* check the erase fail and VPP low bits in status reg
- board/mpl/vcma9/cmd_vcma9.c
- board/mpl/vcma9/flash.c
* various cleanups (printf -> puts, ...)
- common/cmd_usb.c
* fix typo in comment
- cpu/arm920t/usb_ohci.c
* support for S3C2410 is missing in #if line
- drivers/cs8900.c
* reinit some registers in case of error (cable missing, ...)
- fs/fat/fat.c
* support for USB/MMC devices is missing in #if line
- include/configs/MIP405.h
- include/configs/PIP405.h
* enable BZIP2 support
* enlarge malloc space to 1MiB because of BZIP2 support
- include/configs/VCMA9.h
* enable BZIP2 support
* enlarge malloc space to 1MiB because of BZIP2 support
* enable USB support
- lib_arm/armlinux.c
* change calling convention of ARM Linux kernel as
described on http://www.arm.linux.org.uk/developer/booting.php
* Patch by Thomas Lange, 14 Nov 2003:
Split dbau1x00 into dbau1000, dbau1100 and dbau1500 configs to
support all these AMD boards.
* Patch by Thomas Lange, 14 Nov 2003:
Workaround for mips au1x00 physical memory accesses (the au1x00
uses a 36 bit bus internally and cannot access physical memory
directly. Use the uncached SDRAM address instead of the physical
one.)
Wolfgang Denk
Shinya Kuribayashi
Vlad Lungu
Shinya Kuribayashi
Jon Loeliger
Jon Loeliger
Wolfgang Denk
Marian Balakowicz
Wolfgang Denk
Wolfgang Denk
wdenk