Commit graph

12565 commits

Author SHA1 Message Date
Paul Kocialkowski
95de1e2f26 usb: musb-new: CONFIG_MUSB prefix replacement with CONFIG_USB_MUSB
USB-related options are usually prefixed with CONFIG_USB and platform-specific
adaptation for the MUSB controller already have a CONFIG_USB_MUSB prefix, so
this switches all MUSB-related options to a CONFIG_USB_MUSB prefix, for
consistency.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2015-08-05 17:20:34 +02:00
Simon Glass
96a8d409a7 efi: Add 64-bit payload support
Most EFI implementations use 64-bit. Add a way to build U-Boot as a 64-bit
EFI payload. The payload unpacks a (32-bit) U-Boot and starts it. This can
be enabled for x86 boards at present.

Signed-off-by: Simon Glass <sjg@chromium.org>
Improvements to how the payload is built:
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:44:07 -06:00
Simon Glass
476476e73b efi: Add support for loading U-Boot through an EFI stub
It is useful to be able to load U-Boot onto a board even if is it already
running EFI. This can allow access to the U-Boot command interface, flexible
booting options and easier development.

The easiest way to do this is to build U-Boot as a binary blob and have an
EFI stub copy it into RAM. Add support for this feature, targeting 32-bit
initially.

Also add a way to detect when U-Boot has been loaded via a stub. This goes
in common.h since it needs to be widely available so that we avoid redoing
initialisation that should be skipped.

Signed-off-by: Simon Glass <sjg@chromium.org>
Improvements to how the payload is built:
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:44:06 -06:00
Ben Stoltz
cd326a32c9 x86: Add definitions for the x86-efi board and plumb it in
Add configuration and Kconfig changes for this board.

Signed-off-by: Ben Stoltz <stoltz@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:44:06 -06:00
Simon Glass
f05ad9ba4c Add a way to skip relocation
When running U-Boot as an EFI application we cannot relocate since we do not
have relocation information. U-Boot has already been relocated to a suitable
address.

Add a global_data flag to control skipping relocation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:43:46 -06:00
Simon Glass
82bc22ac8f x86: minnowmax: Drop the old PCI settings
These are now in the device tree so we don't need to use the CONFIG options.
Drop them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:42:42 -06:00
Simon Glass
1f2be4cea4 x86: Drop CONFIG_DCACHE_RAM_MRC_VAR_SIZE from header file
This is provided in Kconfig so we don't need it here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:42:42 -06:00
Simon Glass
dcfe4a54ed x86: Move CONFIG_X86_SERIAL to Kconfig
Move this config option to Kconfig and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:42:42 -06:00
Simon Glass
ca4435ef28 x86: Move Chrome OS options to defconfig
Drop these from the header file and use Kconfig instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:42:42 -06:00
Simon Glass
3f416f336e dm: Add a return value comment to device_get_child()
At present this function does not specify its return value. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:42:42 -06:00
Simon Glass
5f48d798eb pci: Add a constant for an invalid interrupt
Rather than using 0xff in the code, add a constant.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:42:41 -06:00
Simon Glass
867a6ac86d efi: Add start-up library code
When running as an EFI application, U-Boot must request memory from EFI,
and provide access to the boot services U-Boot needs.

Add library code to perform these tasks. This includes efi_main() which is
the entry point from EFI. U-Boot is built as a shared library.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:42:41 -06:00
Simon Glass
b0b403d954 Reserve the top 16 flag bits for architecture-specific use
Add a convention that the generic global_data only occupy the bottom 16 bits
of the flags word, so that there is less chance of a conflict. At present the
x86 flags conflict.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:42:40 -06:00
Simon Glass
5598facbd2 Bring in __aligned_u64 and friends to linux/types.h
These will be used for efi.h both for U-Boot running as an EFI application
and as a payload. They come from Linux 4.1.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:42:40 -06:00
Simon Glass
5efa28139c elf: Add a few definitions for 64-bit relocation
Provide the types necessary to relocate 64-bit images.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-05 08:42:40 -06:00
Bin Meng
fe3fbd3024 x86: bayleybay: Configure PCI IRQ
Add PCI IRQ routing information in the board device tree and enable
writing PIRQ routing table and MP table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-05 08:42:39 -06:00
Bin Meng
9b911bed78 x86: Add Intel Bayley Bay board support
Intel Bayley Bay board is a BayTrail based board. Add this board
with existing baytrail fsp support.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-05 08:42:39 -06:00
Bin Meng
456ee909d6 x86: minnowmax: Remove smsc47x superio codes
On Intel BayTrail SoC, there is a legacy UART (I/O 0x3f8) integrated
into the SoC which is enabled by the FSP. Remove the smsc47x superio
initialization codes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-05 08:42:39 -06:00
Tom Rini
e22b1a5494 Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2015-08-04 12:21:45 -04:00
Vitaly Andrianov
8889e98415 configs: ti_armv7_keystone2: replace addr_uboot with loadaddr
This patch replaces not existing addr_uboot environment variable by
loadaddr at get_uboot_net and burn_uboot_xxx commands. Otherwise these
commands are broken.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
2015-08-03 15:58:37 -04:00
Nikhil Badola
e16b604ecf armv8/ls2085ardb: Add USB support for ls2085ardb
Add USB XHCI support for ls2085rdb platform

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:39 -07:00
Nikhil Badola
94e8cd805b armv8/ls2085aqds: Add USB support for ls2085aqds
Add USB XHCI support for ls2085qds platform

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:39 -07:00
York Sun
56848428a8 drivers/ddr/fsl: Adjust bstopre value
By default the bstopre value has been set to 0x100, used to be 1/4
value of refint. Modern DDR has increased the refresh time. Adjust
to 1/4 of refresh interval dynamically. Individual board can still
override this value in board ddr file, or to use auto-precharge.

Signed-off-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:38 -07:00
Minghuan Lian
ed5b580b38 drivers/pci: Add function to find an extended capability
PCIe extends device's configuration space to 4k and provides
extended capability. The patch adds function to find them.
The code is ported from Linux PCIe driver.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:38 -07:00
Prabhakar Kushwaha
87457d118f drivers/fsl-mc: flib changes for mc 8.0.0
MC firware version 8.0.0 contains new command flags. This patch
contains modifications in FLIB files to support the new command flags.

Signed-off-by: Itai Katz <itai.katz@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:37 -07:00
Alex Porosanu
c406551736 drivers/crypto/fsl: enable raw data instead of von Neumann data
The sampling of the oscillator can be done in multiple modes for
generating the entropy value. By default, this is set to von
Neumann. This patch changes the sampling to raw data, since it
has been discovered that the generated entropy has a better
'quality'.

Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:37 -07:00
Alex Porosanu
17649e1b94 drivers/crypto/fsl: change starting entropy delay value
The entropy delay (the length in system clocks of each
entropy sample) for the RNG4 block of CAAM is dependent
on the frequency of the SoC. By elaborate methods, it
has been determined that a good starting value for all
platforms integrating the CAAM IP is 3200. Using a
higher value has additional benefit of  speeding up
the process of instantiating the RNG, since the entropy
delay will be increased and instantiation of the RNG
state handles will be reattempted by the driver. If the
starting value is low, for certain platforms, this can
lead to a quite lengthy process.
This patch changes the starting value of the length of
the entropy sample to 3200 system clocks.
In addition to this change, the attempted entropy delay
values are now printed on the console upon initialization
of the RNG block.

Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:37 -07:00
Alex Porosanu
026a3f1b7c drivers/crypto/fsl: disable RNG oscillator maximum frequency check
The rtfrqmax & rtfrqmin set the bounds of the expected frequency of the
oscillator, when SEC runs at its maximum frequency. For certain platforms
(f.i. T2080), the oscillator is very fast and thus if the SEC runs at
a lower than normal frequency, the ring oscillator is incorrectly detected
as being out of bounds.

This patch effectively disables the maximum frequency check, by setting a
high enough maximum allowable frequency for the oscillator. The reasoning
behind this is that usually a broken oscillator will run too slow
(i.e. not run at all) rather than run too fast.

Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com>
Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:37 -07:00
Alison Wang
6a17365b65 armv7/ls1021a/etsec: Enable Tx Data and TxBD snooping
To improve eTSEC performance on LS1021A Rev2.0,
snooping of all transmit frames from memory and
all transmit BD memory accesses in enabled.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:37 -07:00
Tang Yuantian
99e1bd4241 armv7/ls1021atwr: added deep sleep support in uboot
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:36 -07:00
gaurav rana
562583deb3 armv7/lS1021atwr: Enable bootscript for secure boot
Enable bootscript support in secure boot for establishing
chain of trust on LS1021atwr.

Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:36 -07:00
Zhuoyu Zhang
5b72524246 armv7/ls1021a: Reserve secure code into RAM instead of OCRAM
For ls1021a, Reserve secure code in to memory in case OCRAM
is needed by other usage.

Signed-off-by: Zhuoyu Zhang <Zhuoyu.Zhang@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:36 -07:00
Tom Rini
7a1af7a79b Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2015-08-02 07:40:37 -04:00
Peng Fan
f0ff57b0b2 imx: mx6ul_14x14_evk add basic board support
1. Add USDHC, I2C, UART, 74LV, USB, QSPI support.
2. Support SPL
3. CONFIG_MX6UL_14X14_EVK_EMMC_REWORK is introduced, this board default
   supports sd for usdhc2, but can do hardware rework to make usdhc2 support
   emmc.

Boot Log:
U-Boot SPL 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59)
reading u-boot.img
reading u-boot.img

U-Boot 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59 +0800)

CPU:   Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz)
CPU:   Commercial temperature grade (0C to 95C)CPU:   Thermal invalid data, fuse: 0x0
 - invalid sensor device
 Reset cause: POR
 Board: MX6UL 14x14 EVK
 I2C:   ready
 DRAM:  512 MiB
 MMC:   FSL_SDHC: 0, FSL_SDHC: 1
 *** Warning - bad CRC, using default environment

 In:    serial
 Out:   serial
 Err:   serial
 Net:   CPU Net Initialization Failed
 No ethernet found.
 Hit any key to stop autoboot:  0

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-08-02 11:05:09 +02:00
Peng Fan
6f4b65eda9 imx: imx6_spl add mx6ul support
i.MX6UL's DRAM space starts from 0x80000000, same to i.MX6SX, so use
same address with i.MX6SX.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-08-02 11:05:09 +02:00
Peng Fan
94bd1d1430 mx6_common: Fix LOADADDR and SYS_TEXT_BASE for i.MX6UL
DRAM space starts from 0x80000000 for i.MX6UL, so need to
fix LOADADDR, SYS_TEXT_BASE.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-08-02 11:05:08 +02:00
Peng Fan
436cf40f05 imx: mx6ul remove errata for i.MX6UL
Since i.MX6UL use A7 core, but not A9 core, we do not need
the erratas for i.MX6UL.

Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-08-02 11:05:07 +02:00
Nikita Kiryanov
d5af92315b sf: kconfig: add kconfig options for spi flashes
Add kconfig options for various SPI flashes and use them in cm-fx6 defconfig.

Cc: Jagan Teki <jteki@openedev.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2015-08-02 10:51:39 +02:00
Nikita Kiryanov
b2f2eea0a7 usb: kconfig: usb keyboard kconfig
Add Kconfig options for USB keyboard and use them for cm-fx6.

Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2015-08-02 10:51:39 +02:00
Nikita Kiryanov
919e802c86 arm: mx6: usb: kconfig: add USB_EHCI_MX6 kconfig option
Add USB_EHCI_MX6 option to menuconfig and use it when migrating cm-fx6 usb
config to defconfig.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2015-08-02 10:51:39 +02:00
Nikita Kiryanov
7d731e3a9a arm: mx6: cm-fx6: move CMD configs to defconfig
Move CONFIG_CMD_* options that can be selected in menuconfig to cm-fx6
defconfig.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2015-08-02 10:51:37 +02:00
Nikita Kiryanov
4377859aa6 arm: mx6: cm-fx6: make it possible to not init display
Implement a cm-fx6 specific board_video_skip() to provide the option to not
initialize the display.

The new function does not init display if the environment variable "panel" is
not defined, or if it is set to an unsupported value.

Collateral changes:
- Don't use the global displays array (it's CONFIG_IMX_VIDEO_SKIP specific).
- Don't use detect_hdmi(), since env controlled init makes it unnecessary.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2015-08-02 10:51:37 +02:00
Peng Fan
361b715bbf imx: mx6qpsabreauto: Add MX6QP SABREAUTO CPU3 board support
1. Add DDR script for mx6qpsabreauto board.
2. On CPU3 board, enet RGMII tx clock is from internal PLL. Set the GPR5[9]
   and init the enet pll output to 125Mhz.
3. On CPU3 board, SW1ABC=VDDSOC_IN, SW2=VDDARM_IN.

Build target: mx6qpsabreauto_config

Boot Log:
U-Boot 2015.07-rc2-00071-gfd985ff (Jun 29 2015 - 22:10:55 +0800)

CPU:   Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz)
CPU:   Automotive temperature grade (-40C to 125C) at 34C
Reset cause: POR
Board: MX6Q-Sabreauto revA
I2C:   ready
DRAM:  2 GiB
PMIC:  PFUZE100 ID=0x10
Flash: 32 MiB
NAND:  0 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

No panel detected: default to HDMI
Display: HDMI (1024x768)
In:    serial
Out:   serial
Err:   serial
Net:   FEC [PRIME]
Hit any key to stop autoboot:  0

Note:
In this patch, we still add a new config mx6qpsabreauto_config,
since SPL is not supported now, and IMX_CONFIG is needed at
build time, so add this config. Future, when SPL is converted,
this config can be removed.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-08-02 10:47:52 +02:00
Peng Fan
e6fc8995d6 imx: mx6sabresd/sabreauto runtime setting fdt_file
Detect the SOC and board variant at runtime and change the dtb name,
but not hardcoding the fdt_file env variable.

Take the following patch as a reference.
Íd58699b157df75f1aa0b363ea9c21add21a0c
"mx6cuboxi: Load the correct 'fdtfile' variable"

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-08-02 10:47:05 +02:00
Tom Rini
8968b914be Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2015-07-31 20:16:21 -04:00
Shengzhou Liu
ff7ea2d18b powerpc/t1023rdb: add support for T1023RDB RevC
Add support for NOR flash and GPIO/I2C switch control on RevC.
- NOR support
- bank0/bank4 switch
- SD/eMMC switch
- board version

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-31 08:50:18 -07:00
Aneesh Bansal
5050f6f0e5 powerpc/mpc85xx: SECURE BOOT-Copy Boot Script on RAM
For running Chain of Trust when doing Secure Boot from NAND,
the Bootscript header and bootscript must be copied from NAND
to RAM(DDR).
The addresses and commands for the same have been defined.

Signed-off-by: Saksham Jain <saksham@freescale.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-31 08:50:18 -07:00
Aneesh Bansal
467a40dfe3 powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041
Secure Boot Target is added for NAND for P3041.
For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC.
In case of secure boot, this default address maps to Boot ROM.
The Boot ROM code requires that the bootloader(U-boot) must lie
in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF.

In case of NAND Secure Boot, CONFIG_SYS_RAMBOOT is enabled and CPC is
configured as SRAM. U-Boot binary will be located on SRAM configured
at address 0xBFF00000.
In the U-Boot code, TLB entries are created to map the virtual address
0xFFF00000 to physical address 0xBFF00000 of CPC configured as SRAM.

Signed-off-by: Saksham Jain <saksham@freescale.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-31 08:50:18 -07:00
Tom Rini
cc35734358 Merge branch 'master' of git://git.denx.de/u-boot-tegra 2015-07-29 18:58:39 -04:00
Jaiprakash Singh
7842950f7c powerpc/T102xRDB: Enable ifc nand ecc encode and decode
IFC nand ecc encode and decode mode are not correctly
set in CSOR register during nand initialization.Enable
ecc encode/decode in 4-bit mode

Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-28 14:41:16 -07:00
Priyanka Jain
4b6067ae9d powerpc/T104xD4RDB: Add T104xD4RDB boards support
T1040D4RDB is a Freescale reference board that hosts the T1040 SoC.
    T1040D4RDB is re-designed T1040RDB board with following changes :
    - Support of DDR4 memory
    - Support of 0x66 serdes protocol which can support following interfaces
        - 2 RGMII's on DTSEC4, DTSEC5
        - 1 SGMII on DTSEC3
    - Support of QE-TDM

    Similarily T1042D4RDB is a Freescale reference board that hosts the T1040
    SoC. T1042D4RDB is re-designed T1042RDB board with following changes :
    - Support of DDR4 memory
    - Support for 0x86 serdes protocol which can support following interfaces
        - 2 RGMII's on DTSEC4, DTSEC5
        - 3 SGMII on DTSEC1, DTSEC2 & DTSEC3
    - Support of DIU

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-28 14:40:57 -07:00
Tom Warren
873e3ef90b T210: Add support for 64-bit T210-based P2571 board
Based on Venice2, incorporates Stephen Warren's
latest P2571 pinmux table.

With Thierry Reding's 64-bit build fixes, this
will build and and boot in 64-bit on my P2571
(when used with a 32-bit AVP loader).

Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-07-28 10:30:20 -07:00
Tom Warren
7aaa5a60ce ARM: Tegra210: Add support to common Tegra source/config files
Derived from Tegra124, modified as appropriate during T210
board bringup. Cleaned up debug statements to conserve
string space, too. This also adds misc 64-bit changes
from Thierry Reding/Stephen Warren.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2015-07-28 10:30:20 -07:00
Tom Warren
6c43f6c8d9 ARM: Tegra210: Add SoC code/include files for T210
All based off of Tegra124. As a Tegra210 board is brought
up, these may change a bit to match the HW more closely,
but probably 90% of this is identical to T124.

Note that since T210 is a 64-bit build, it has no SPL
component, and hence no cpu.c for Tegra210.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-07-28 10:30:19 -07:00
Thierry Reding
f41f0a1918 ARM: tegra: Use architected timer on ARMv8
ARMv8 requires an architected timer to be present, so it can be used
instead of the Tegra US timer. This allows for better code reuse.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-07-28 10:30:18 -07:00
Thierry Reding
6527268d6e ARM: tegra: Disable SPL and non-cached memory on 64-bit
For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in
AArch64 mode so that we don't need the SPL. Non-cached memory is not
implemented (yet) for 64-bit ARM.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2015-07-28 10:30:18 -07:00
Bin Meng
7e378b8bfc Fix incorrect comments in linker_lists.h
This corrects several typos in the comment block as well as some
indentions and nits in the linker_lists.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-07-28 10:36:23 -06:00
Tom Rini
66d10c18bf Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze 2015-07-28 11:31:21 -04:00
Michal Simek
6fe6f13509 ARM: zynqmp: Wire up SATA for the board
Enable SATA for the ZynqMP targets.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:27 +02:00
Michal Simek
cb7ea82059 ARM: zynqmp: Wire up ethernet controllers
Wire up ethernet controllers and enable MII and BOOTP options.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:27 +02:00
Michal Simek
6d6e3dbefe ARM: zynq: Add support for zc770-xm011
Add xm011 DTS file and related configs and configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:26 +02:00
Siva Durga Prasad Paladugu
b0d18beedb zynqmp: Provide option to enable uart dcc support for zynqmp
Provide option to enable uart dcc support for zynqmp
This config can be enabled as per board config file.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:20 +02:00
Siva Durga Prasad Paladugu
f994bdfe13 Kconfig: zynqmp: Move CONFIG_SYS_TEXT_BASE to defconfig
Move CONFIG_SYS_TEXT_BASE of ZynqMP_ep to its
respective defconfig

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:19 +02:00
Siva Durga Prasad Paladugu
0b54a9dd09 zynqmp: Define ep config for ZynqMP
Define a new config "zynqmp_ep" for ZynqMP instead
of xilinx_zynqmp. This defconfig supports all emulation
platforms of ZynqMP. Also renamed TARGET_XILINX_ZYNQMP
to ARCH_ZYNQMP.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:19 +02:00
Stephen Warren
8b5c738b85 pxe: add AArch64 image support
The sysboot and pxe commands currently support either U-Boot formats or
raw zImages. Add support for the AArch64 Linux port's native image format
too.

As with zImage support, there is no auto-detection of the native image
format. Rather, if the image is auto-detected as a U-Boot format, U-Boot
will try to interpret it as such. Otherwise, U-Boot will fall back to a
raw/native image format, if one is enabled.

My belief is that CONFIG_CMD_BOOTZ won't ever be enabled for any AArch64
port, hence there's never a need to differentiate between CONFIG_CMD_
_BOOTI and _BOOTZ at run-time; compile-time will do. Even if this isn't
true, we want to prefer _BOOTI over _BOOTZ when defined, since _BOOTI is
definitely the native format for AArch64.

Change-Id: I83c5cc7566032afd72516de46f4e5eb7a780284a
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-07-27 15:53:48 -07:00
Simon Glass
ba52199422 tegra124: Expand SPL space by 8KB
We are getting very close to running out of space in SPL, and with the
currently Chrome OS gcc 4.9 we exceed the limit. Add a litle more space.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-07-27 14:03:07 -07:00
Yegor Yefremov
0a0db402d1 am3517_evm: add FIT support
Enable DTS support (CONFIG_OF_LIBFDT) and select
CONFIG_FIT in defconfig.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-07-27 15:03:14 -04:00
Nishanth Menon
b38ecd6fbe configs: k2*_evm: rename skernel binary names to generated file names
using http://git.ti.com/keystone-linux/boot-monitor/trees/master as
reference (tag K2_BM_15.07) the generated files do not have evm
extensions by default. So dont use -evm extension.

Reviewed-by: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-07-27 15:03:12 -04:00
Nishanth Menon
bad773f486 configs: ti_armv7_keystone2: switch to using kernel zImage
Switch to using zImage instead of uImage. and while at it, start using
bootz as default. While at it, get rid of BOOTIMAGE define and start
using Linux upstream dtb file names.

Reviewed-by: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-07-27 15:03:12 -04:00
Nishanth Menon
fd72d31897 configs: ti_armv7_keystone2: switch addresses to generic addresses
Use the defaults defined in DEFAULT_LINUX_BOOT_ENV

Reviewed-by: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-07-27 15:03:11 -04:00
Nishanth Menon
e07cff1158 configs: ti_armv7_keystone2: start using armv7_common
Try to maintain as much commonality by conditionally including stuff
in armv7_common as necessary and removing the common defines from
keystone2 header.

Note: as part of this change, all keystone2 platforms will now start
using the generic u-boot prompt instead of the custom prompt.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-07-27 15:03:10 -04:00
Nishanth Menon
e8428d6ffa configs: rename ks2_evm into ti_armv7_keystone2
rename the keystone2 common header into an keystone2 architecture
specific header which can then reuse the common ti_armv7 config headers.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Acked-By: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-07-27 15:02:19 -04:00
Nishanth Menon
59d4cd2297 board: ks2_evm: get rid of bogus CONFIG_LINUX_BOOT_PARAM_ADDR
CONFIG_LINUX_BOOT_PARAM_ADDR is not a valid configuration option. Do
just like what the rest of the world does.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Acked-By: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-07-27 15:02:18 -04:00
Nishanth Menon
7f2f44da48 configs: ti: armv7_common: enable Thumb mode for all
Commit bd2c4522c2 ("ti: armv7: enable EXT support in SPL (using
ti_armv7_common.h)") enabled thumb mode only for SPL builds, however,
All TI armv7 platforms do support thumb, and there is no reason why the
space savings cannot be exploited for u-boot as well.

Reported-by: Murali Karicheri <m-karicheri2@ti.com>
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-07-27 15:02:17 -04:00
Nishanth Menon
9a0f4004ca configs: split ti_armv7_common into a omap generic header
TI armv7 based SoCs are based on two architectures - one based on OMAP
generation architecture and others based on Keystone architecture.

Many of the options are architecture specific, however a lot are common
with v7 architecture. So, step 1 will be to move out OMAP specific stuff
from ti_armv7_common into a ti_armv7_omap.h header which is then used
by all the relevant architecture headers.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-07-27 15:02:17 -04:00
Paul Kocialkowski
8845ad4f2e nokia_rx51: Typo in CONFIG_MUSB_HCD fixup
CONFIG_MUSB_HDC should be CONFIG_MUSB_HCD to have any effect.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2015-07-27 15:02:16 -04:00
Adam YH Lee
1584e4f45f Update the rootfs type to ext4 for Overo and Pepper
Gumstix is migrating from ext3 to ext4 file system.

Signed-off-by: Adam YH Lee <adam.yh.lee@gmail.com>
Acked-by: Ash Charles <ashcharles@gmail.com>
2015-07-27 15:02:15 -04:00
Antonio Borneo
f9fa4a25cc stm32f429: use 180 MHz system clock
Mainline Linux kernel commit
338a6aaabc02fa63b70441dd0e1b70aea64673c6 (ARM: dts: Introduce
STM32F429 MCU) in arch/arm/boot/dts/stm32f429.dtsi
requires U-Boot to set system clock to 180 MHz.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
To: Albert Aribaud <albert.u.boot@aribaud.net>
To: Tom Rini <trini@konsulko.com>
To: Kamil Lulko <rev13@wp.pl>
Cc: u-boot@lists.denx.de
2015-07-27 15:02:15 -04:00
Antonio Borneo
089fddfde2 stm32f429: pass the device unique ID in DTB
Read device unique ID and set environment variable "serial#".
Value would then be passed to kernel through DTB.

To read ID from DTB, kernel is required to have commit:
3f599875e5202986b350618a617527ab441bf206 (ARM: 8355/1: arch: Show
the serial number from devicetree in cpuinfo)
This commit is already mainline since v4.1-rc1.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
To: Albert Aribaud <albert.u.boot@aribaud.net>
To: Tom Rini <trini@konsulko.com>
To: Kamil Lulko <rev13@wp.pl>
Cc: u-boot@lists.denx.de
2015-07-27 15:02:14 -04:00
Paul Kocialkowski
2cb81b6bcd siemens-am33x-common: Hardcoded value instead of non-included define
The config file for the siemens-am33x-common was using OMAP_I2C_STANDARD, which
is defined in a header that is not included in the config header. In most cases,
it was being included by the code using CONFIG_SYS_OMAP24_I2C_SPEED, but it
might not always be the case.

In particular, when introducing I2C SPL support in omap-common's boot-common.c,
the header is missing and including it breaks other devices.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2015-07-27 15:02:05 -04:00
Paul Kocialkowski
60c7c30aa0 omap-common: Common boot code OMAP3 support and cleanup
This introduces OMAP3 support for the common omap boot code, as well as a
major cleanup of the common omap boot code.

First, the omap_boot_parameters structure becomes platform-specific, since its
definition differs a bit across omap platforms. The offsets are removed as well
since it is U-Boot's coding style to use structures for mapping such kind of
data (in the sense that it is similar to registers). It is correct to assume
that romcode structure encoding is the same as U-Boot, given the description
of these structures in the TRMs.

The original address provided by the bootrom is passed to the U-Boot binary
instead of a duplicate of the structure stored in global data. This allows to
have only the relevant (boot device and mode) information stored in global data.
It is also expected that the address where the bootrom stores that information
is not overridden by the U-Boot SPL or U-Boot.

The save_omap_boot_params is expected to handle all special cases where the data
provided by the bootrom cannot be used as-is, so that spl_boot_device and
spl_boot_mode only return the data from global data.

All of this is only relevant when the U-Boot SPL is used. In cases it is not,
save_boot_params should fallback to its weak (or board-specific) definition.
save_omap_boot_params should not be called in that context either.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2015-07-27 15:02:03 -04:00
Masahiro Yamada
7e3f94e145 nds32: include <asm/arch-*/*.h> instead of <asm/arch/*.h>
There are only two SoC-specific headers for this architecture:
 - arch/nds32/include/asm/arch-ag101/ag101.h
 - arch/nds32/include/asm/arch-ag102/ag102.h

Those two have different file names, so there is no advantage to
include them via symbolic linked directory.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-07-27 15:01:59 -04:00
rev13@wp.pl
6b33056836 stm32f429-discovery: Use ttyS0 as the console device
Mainline kernel will be using this device name as well.

Signed-off-by: Kamil Lulko <rev13@wp.pl>
2015-07-27 15:01:56 -04:00
Paul Kocialkowski
d6fc0cefd8 config: ti_omap5_common: Palmas power support in SPL
Palmas power support is required for OMAP5 devices such as the OMAP5 uEVM, that
need to e.g. enable MMC power at SPL stage.

This is especially important when booting from a peripheral (such as USB, UART),
where the bootrom will not enable power for the MMC device that will hold the
main U-Boot.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-07-27 15:01:51 -04:00
Otavio Salvador
5b94ce2c34 cgtqmx6eval: Use standard boot script
Use more standard boot scripts and also add the capability of
booting via NFS.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26 12:36:32 +02:00
Otavio Salvador
6731bc8db4 cgtqmx6eval: Add SATA support
Add SATA support.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26 12:36:10 +02:00
Otavio Salvador
6d551f2705 cgtqmx6eval: Add splash screen support
Add LVDS and HDMI support.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26 12:35:56 +02:00
Otavio Salvador
95246ac709 cgtqmx6eval: Add USB support
Add USB support.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26 12:29:53 +02:00
Otavio Salvador
4c9929d63a cgtqmx6eval: Add PMIC support
cgtqmx6eval has a PFUZE100 FSL PMIC connected to I2C2.

Add support for it.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26 12:29:13 +02:00
Otavio Salvador
862187b7cd cgtqmx6eval: Add thermal support
Add thermal support so that we can see the following message on boot:

CPU:   Industrial temperature grade (-40C to 105C) at 33C

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26 12:24:44 +02:00
Otavio Salvador
d6ec45da30 cgtqmx6eval: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26 12:21:58 +02:00
Otavio Salvador
72d21256fb cgtqmx6eval: Use default prompt
Remove the custom prompt and use the default instead.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26 12:21:58 +02:00
Fabio Estevam
44f98f9c8e warp: Add MAX77696 support
Warp has a MAX77696 PMIC connected via I2C1 bus.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-07-26 12:12:04 +02:00
Fabio Estevam
a643acd44c power: pmic: Add support for MAX77696 PMIC
Add support for MAX77696 PMIC.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-07-26 12:11:33 +02:00
Fabio Estevam
6918f974cf thermal: Fix comments
It seems that many comments were copied from the I2C uclass, so adjust
the comments for the thermal class.

Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-26 12:11:33 +02:00
Stefan Roese
452308c02b arm: mx6: tqma6: Add WRU-IV baseboard for the TQMa6 SoM
This patch adds support for the "OHB System AG" baseboard
with is equipped with the TQMa6S SoM.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Stefano Babic <sbabic@denx.de>
2015-07-26 12:05:22 +02:00
Tom Rini
26473945ad Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2015-07-25 09:04:18 -04:00
Hans de Goede
de1502c937 sunxi: Enable CMD_USB and USB_STORAGE by default on sunxi
Start using the new Kconfig options which are available for these now,
and simply always enable them by selecting them as sunxi builds always
include USB support.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-07-25 11:22:54 +02:00
Tom Rini
6f4e050639 Merge git://git.denx.de/u-boot-usb 2015-07-24 16:39:56 -04:00
Stefan Roese
5a9749ee12 arm: marvell: Increase MAXARGS to 32
This makes more complex U-Boot scripts possible.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-24 09:48:07 +02:00
Stefan Roese
7853c508e4 arm: mvebu: db-88f6820-gp: Add SDIO/MMC SPL boot support
This patch adds the configuration options to boot via SDIO/MMC on the
Marvell DB-88F6820-GP Armada A38x board. The default boot device
is still SPI NOR flash.

To enable MMC booting on this board 2 things need to be changes:
a) Change kwbimage.cfg
   BOOT_FROM   sdio
b) In the config header select
   #define CONFIG_SPL_BOOT_DEVICE	SPL_BOOT_SDIO_MMC_CARD

The generated image needs to be copied to the first bootable MMC
partition:

dd if=u-boot-spl.kwb of=/dev/sdX1

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <eibach@gdsys.de>
2015-07-24 09:47:02 +02:00
Tom Rini
413978d118 Merge git://git.denx.de/u-boot-uniphier 2015-07-23 11:46:05 -04:00
Masahiro Yamada
3365b4eb55 ARM: UniPhier: add PH1-sLD3 SoC support
The init code for UMC (Unified Memory Controller) and PLL has not
been mainlined yet, but U-boot proper should work.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-07-23 23:42:22 +09:00
Masahiro Yamada
ad6670ee12 ARM: UniPhier: update CONFIG_BOOTARGS
Both "earlyprintk" and "loglevel=8" should be useful for the
development.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-07-23 23:42:13 +09:00
Masahiro Yamada
e037db0c34 ARM: UniPhier: add environment variable for TFTP boot
The command "run tftpboot" downloads some files onto the RAM
via TFTP and boots the kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-07-23 23:42:01 +09:00
Masahiro Yamada
421376ae42 ARM: UniPhier: add environment sets for non-FIT Linux boot
Currently, the environment variables "norboot" and "nandboot" only
work with CONFIG_FIT, but we do not want to depend on CONFIG_FIT to
boot the kernel.

This commit adds environments useful for booting Linux with separate
uImage + ramdisk + DTB.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-07-23 23:41:53 +09:00
Tom Rini
3c9cc70d71 Merge git://git.denx.de/u-boot-marvell 2015-07-23 09:02:28 -04:00
Stefan Roese
9e30b31d20 arm: mvebu: db-88f6820: Add SPL support with DDR init code
This patch adds SPL support for the Marvell DB-88F6820-GP board.
With this change, the bin_hdr from the original Marvell U-boot
is not needed any more on this board. The sources from bin_hdr
(SERDES/PHY and DDR setup) are now integrated in mainline
U-Boot. And this patch enables them for this board.

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:39:35 +02:00
Stefan Roese
ff9112df8b arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directory
With the upcoming addition of the Armada 38x DDR support, which is not
compatible to the Armada XP DDR init code, we need to introduce a new
directory infrastructure. To support multiple Marvell DDR controller.

This will be the new structure:

     drivers/ddr/marvell/axp
     Supporting Armada XP (AXP) devices (and perhaps Armada 370)

     drivers/ddr/marvell/a38x
     Supporting Armada 38x devices (and perhaps Armada 39x)

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:38:30 +02:00
Anton Schubert
e863f7f051 arm: mvebu: add Armada XP SATA support
This patch initializes the SATA address windows on Armada XP and
allows it to work with the existing mvsata_ide driver.
It also adds the necessary configuration for the db-mv784mp-gp board.

Signed-off-by: Anton Schubert <anton.schubert@gmx.de>
Tested-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-23 08:30:58 +02:00
Masahiro Yamada
6b9f9eadff linux_compat: handle __GFP_ZERO in kmalloc()
Currently, kzalloc() returns zero-filled memory, while kmalloc()
simply ignores the second argument and never fills the memory
area with zeros.

I want kmalloc(size, __GFP_ZERO) to behave as kzalloc() does,
which will make it easier to add more memory allocator variants.

With the introduction of __GFP_ZERO flag, going forward, kzmalloc()
variants can fall back to kmalloc() enabling the __GFP_ZERO flag.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-07-22 07:30:44 -06:00
Masahiro Yamada
ebc3328ccc linux_compat: move vzalloc() to header file as an inline function
The vzalloc(size) is equivalent to kzalloc(size, 0).  Move it to
include/linux/compat.h as an inline function in order to avoid the
function call overhead.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-22 07:30:39 -06:00
Masahiro Yamada
3721eaf28e linux_compat: remove cpu_relax() define
The macro cpu_relax() is defined by several headers in different
ways.

arch/{arm,avr32,mips}/include/asm/processor.h defines it as follows:
  #define cpu_relax()	barrier()

On the other hand, include/linux/compat.h defines it as follows:
  #define cpu_relax() do {} while (0)

If both headers are included from the same source file, the warning
  warning: "cpu_relax" redefined [enabled by default]
is displayed.

It effectively makes it impossible to include <linux/compat.h>
from some sources.  Drop the latter.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-07-22 07:30:37 -06:00
Paul Kocialkowski
a588d99ac1 usb: CONFIG_USB_FASTBOOT prefix replacement for consistency
FASTBOOT is defined both by CONFIG_USB_FUNCTION_FASTBOOT AND CONFIG_CMD_FASTBOOT, so it doesn't
make much sense to have a CONFIG_USB_FASTBOOT prefix for fastboot-specific options, especially
given that other config options for fastboot use the CONFIG_FASTBOOT prefix.

This replaces the CONFIG_USB_FASTBOOT prefix with CONFIG_FASTBOOT, for consistency.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2015-07-22 08:57:54 +02:00
Jiandong Zheng
d00bf78121 implement Fastboot via USB OTG on bcm28155_ap boards
Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
2015-07-22 08:57:54 +02:00
Steve Rae
05a950cf59 g_dnl: add missing declaration
Signed-off-by: Steve Rae <srae@broadcom.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Test HW: Exynos 4210 (trats), Exynos 5422 (Odroid XU3)
2015-07-22 08:57:54 +02:00
Paul Kocialkowski
8d2f0039f0 usb: board_usb_init and board_usb_cleanup calls in the fastboot command
Each USB download function command calls board_usb_init before registering the
USB gadget and board_usb_cleanup after de-registering it. On devices currently
using fasboot, musb-new is usually initialized earlier, but some other boards
might need the board_usb_init call to properly initialize musb-new.

This requires adding an argument (the USB controller index) to the fastboot
command, as it is currently done with other USB download gadget functions.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>

Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
2015-07-22 08:57:53 +02:00
Paul Kocialkowski
17da3c0c8c usb: Fastboot function config for better consistency with other functions
USB download gadget functions such as thor and dfu have a separate config option
for the USB gadget part of the code, independent from the command part.
This switches the fastboot USB gadget to the same scheme, for better
consistency.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>

Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
2015-07-22 08:57:53 +02:00
Paul Kocialkowski
01acd6abbd usb: USB download gadget and functions config options coherent naming
This introduces a coherent scheme for naming USB download gadget and functions
config options. The download USB gadget config option is moved to
CONFIG_USB_GADGET_DOWNLOAD for better consistency with other gadgets and each
function's config option is moved to a CONFIG_USB_FUNCTION_ prefix.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>

Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
2015-07-22 08:57:53 +02:00
Nikhil Badola
2f47324255 include: usb: Map USB controller base addresses for LS2085A
Map USB XHCI controller base addresses for LS2085A SOC

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
2015-07-22 08:55:45 +02:00
Nikhil Badola
909a1ab2f0 include: usb: Move USB controller base address mapping
Move USB controller Base address mapping from ls102xa immap
to fsl xhci header. This is required to remove any warnings when
controller base addresses are mapped for multiple platforms
in their respective files.

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
2015-07-22 08:55:45 +02:00
Nikhil Badola
667f4dd90f drivers: usb: fsl: Implement Erratum A-009116 for XHCI controller
This adjusts (micro)frame length to appropriate value thus
avoiding USB devices to time out over a longer run

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
2015-07-22 08:55:45 +02:00
Ramneek Mehresh
081a1b730d ls1021aqds: Enable USB IP support
Enable USB IP support for both EHCI and XHCI for
ls1021aqds platform

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2015-07-22 08:55:45 +02:00
Ramneek Mehresh
10a2864494 ls1021atwr: Enable USB IP support
Enable USB IP support for both EHCI and XHCI for
ls1021atwr platform

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2015-07-22 08:55:45 +02:00
Ramneek Mehresh
ba92ee06a5 usb: fsl: Add XHCI driver support
Add xhci driver support for all FSL socs

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2015-07-22 08:55:45 +02:00
Ramneek Mehresh
792651f030 usb: xhci: keystone: Remove common dwc3 drv functions calls
Remove all redundant dwc3 driver function calls that
are defined by dwc3 driver

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2015-07-22 08:55:44 +02:00
Ramneek Mehresh
2770448c8c usb: xhci: omap: Remove common dwc3 drv functions calls
Remove all redundant dwc3 driver function calls that
are defined by dwc3 driver

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2015-07-22 08:55:44 +02:00
Ramneek Mehresh
552d60cc22 usb: xhci: exynos: Remove common dwc3 drv functions calls
Remove all redundant dwc3 driver function calls that
are defined by dwc3 driver

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2015-07-22 08:55:44 +02:00
Ramneek Mehresh
dc9cdf859e usb: dwc3: Add DWC3 controller driver support
Add support for DWC3 XHCI controller driver

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2015-07-22 08:55:44 +02:00
Simon Glass
b86f795a37 net: Allow drivers to return -ENOSYS with the write_hwaddr() method
Some drivers may want to implement this method for some of their devices but
not for others. So it is not possible to just leave the operation out of
the table. Drivers could get around this by masquerading as two separate
drivers but that seems unpleasant.

Allow the driver to return an error when it does not want to process the
write_hwaddr() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:41 -06:00
Simon Glass
4a41cc1578 x86: minnowmax: Drop the cache line size hack
Now that the RTL8169 driver warning is fixed we can drop this. The incorrect
value is causing problems with USB EHCI.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-07-21 17:39:40 -06:00
Simon Glass
abb59cffcf dm: usb: Adjust the USB_DEVICE() macro naming
In Linux USB_DEVICE() is used to declare a USB device by vendor/device ID.
We should follow the same convention in U-Boot. Rename the existing
USB_DEVICE() macro to U_BOOT_USB_DEVICE() and bring in the USB_DEVICE()
macro from Linux for use in U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:40 -06:00
Simon Glass
c8c2797c38 dm: usb: eth: Support driver model with USB Ethernet
At present USB Ethernet does not work with CONFIG_DM_ETH. Add driver model
support to this feature, so that it can work alongside other Ethernet
devices with driver model.

It was found that quite a bit of code is common in most of the USB Ethernet
drivers. Add this code to the common layer to reduce the amount of duplicate
code needed in USB Ethernet drivers when CONFIG_DM_ETH is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
2015-07-21 17:39:40 -06:00
Simon Glass
a1ca92eaaf dm: eth: Avoid blocking on packet reception
Some devices can take a long time to work out whether they have a new packet
or now. For example the ASIX USB Ethernet dongle can take 5 seconds to do
this, since it waits until it gets a new packet on the wire before allowing
the USB bulk read packet to be submitted.

At present with driver mode the Ethernet receive code reads 32 packets. This
can take a very long time if we must wait for all 32 packets. The old code
(before driver model) worked by reading a single set of packets from the USB
device, then processing all the packets with in. It would be nice to use
the same behaviour with driver model.

Add a flag to the receive method which indicates that the driver should try
to find a packet if available, by consulting the hardware. When the flag is
not set, it should just return any packet data it has already received. If
there is none, it should return -EAGAIN so that the loop will terminate.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:40 -06:00
Simon Glass
b483915ffd dm: usb: Correct the struct usb_driver_entry comment
The function documentation is incorrect. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
2015-07-21 17:39:39 -06:00
Simon Glass
4b515e4fc5 dm: pci: Add a function to get the BDF for a device
It is useful to be able to find the full PCI address (bus, device and
function) for a PCI device. Add a function to provide this.

Adjust the existing code to use this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:39 -06:00
Simon Glass
aba9296249 dm: pci: Add support for PCI driver matching
At present all PCI devices must be present in the device tree in order to
be used. Many or most PCI devices don't require any configuration other than
that which is done automatically by U-Boot. It is inefficent to add a node
with nothing but a compatible string in order to get a device working.

Add a mechanism whereby PCI drivers can be declared along with the device
parameters they support (vendor/device/class). When no suitable driver is
found in the device tree the list of such devices is consulted to determine
the correct driver. If this also fails, then a generic driver is used as
before.

The mechanism used is very similar to that provided by Linux and the header
file defintions are copied from Linux 4.1.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2015-07-21 17:39:38 -06:00
Hans de Goede
b2f219b081 dm: usb: Allow usb host drivers to implement usb_reset_root_port
Allow usb uclass host drivers to implement usb_reset_root_port, this is
used by single port usb hosts which do not emulate a hub, such as otg
controllers.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:36 -06:00
Hans de Goede
bb52b367f6 dm: Export device_remove_children / device_unbind_children
These functions are useful to remove all children from an usb bus before
rescanning the bus. Give them a better name and export them.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:35 -06:00
Hans de Goede
8802f56349 usb: Add an usb_device parameter to usb_reset_root_port
Add an usb_device parameter to usb_reset_root_port so that it knows which
root-port it is resetting. This is necessary for proper device-model support
for usb_reset_root_port.

Also remove a duplicate declaration of usb_reset_root_port() from usb.h .

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:35 -06:00
Hans de Goede
9eb72dd1f4 usb: usb_setup_device: Drop unneeded portnr function argument
Drop the unneeded portnr function argument, the portnr is part of the
usb_device struct which is passed via the dev argument.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:35 -06:00
Hans de Goede
6bfe80e754 usb: Drop device-model specific copy of usb_legacy_port_reset
The device-model usb_legacy_port_reset function calls the device-model
usb_port_reset function which is a 1 on 1 copy of the non dm
usb_legacy_port_reset and this is the only use of usb_port_reset in all
of u-boot.

Drop both, and alway use the usb_legacy_port_reset() version in
common/usb.c .

Also while at it make it static as it is only used in common/usb.c .

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:34 -06:00
Simon Glass
85aeda4a62 test: Add a macro to check that a value is not an error pointer
Some functions can return ERR_PTR(errval). Add a unit test macro to check
that no error is returned in a pointer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:33 -06:00
Simon Glass
fb8a5ffc77 led: Return -ENODEV if the LED device cannot be found
We normally use -ENODEV for a missing device, rather than -ENOENT. The
latter is reserved for when we have a device but cannot find something
within it.

Also avoid looking at the root LED device since it is only a container.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:32 -06:00
Simon Glass
1704d083b3 dm: reset: Allow reset_walk() to return
Add a new reset_walk_halt() function to cause a reset and then halt on
failure. The reset_walk() function returns an error code.

This is needed for testing since otherwise U-Boot will halt in the middle
of a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:31 -06:00
Simon Glass
97f3ee34b6 dm: Add platform data advice and admonishment
We should guide people more strongly towards device tree to avoid the
proliferation of platform data structures. Add documentation to the driver
model README, and also the platform data header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:30 -06:00
Simon Glass
f26c8a8e77 dm: Add a clock uclass
Clocks are an important feature of platforms and have become increasing
complex with time. Most modern SoCs have multiple PLLs and dozens of clock
dividers which distribute clocks to on-chip peripherals.

Some SoC implementations have a clock API which is private to that SoC family,
e.g. Tegra and Exynos. This is useful but it would be better to have a
common API that can be understood and used throughout U-Boot.

Add a simple clock API as a starting point. It supports querying and setting
the rate of a clock. Each clock is a device. To reduce memory and processing
overhead the concept of peripheral clocks is provided. These do not need to
be explicit devices - it is possible to write a driver that can adjust the
I2C clock (for example) without an explicit I2C clock device. This can
dramatically reduce the number of devices (and associated overhead) in a
complex SoC.

Clocks are referenced by a number, and it is expected that SoCs will define
that numbering themselves via an enum.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:29 -06:00
Simon Glass
f9917454d5 dm: Add a system reset uclass
It is common for system reset to be available at multiple levels in modern
hardware. For example, an SoC may provide a reset option, and a board may
provide its own reset for reasons of security or thoroughness. It is useful
to be able to model this hardware without hard-coding the behaviour in the
SoC or board. Also there is a distinction sometimes between resetting just
the CPU (leaving GPIO state alone) and resetting all the PMICs, just cutting
power.

To achieve this, add a simple system reset uclass. It allows multiple devices
to provide reset functionality and provides a way to walk through them,
requesting a particular reset type until is it provided.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:29 -06:00
Simon Glass
070d00b8dc dm: spl: Allow device tree/driver model in board_init_f()
Add an spl_init() function that does basic init such that board_init_f() can
use simple malloc(), device tree and driver model. Each one is set up only
if enabled for SPL.

Note: We really should refactor SPL such that there is a single
board_init_f() and rename the existing weak board_init_f() functions
provided by boards, calling them from the single board_init_f().

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:28 -06:00
Simon Glass
c4af6732c4 lib: Add function to extract a number from the end of a string
Split out the code in fdtdec which finds a number at the end of a string. It
can be useful in other situations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:28 -06:00
Simon Glass
1acab96d97 Add rivest cipher 4 (rc4) implementation
Add an implementation of RC4. This will be used by Rockchip booting but may
be useful in other situations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:28 -06:00
Simon Glass
6c51df6859 dm: Add support for RAM drivers
Add support for a driver which sets up DRAM and can return information about
the amount of RAM available. This is a first step towards moving RAM init
to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:27 -06:00
Simon Glass
6c69c7fb57 dm: pmic: Add functions to adjust PMIC registers
It is a common requirement to update some PMIC registers. Provide some
simple convenience functions to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-07-21 17:39:27 -06:00
Simon Glass
083fc83a4e dm: power: Add a function to set up all regulators
The device tree provides information about which regulators should be
on at boot, or always on. Use this to set them up automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-07-21 17:39:26 -06:00
Simon Glass
3b55d30f6f dm: pmic: Split output from function
The regulator_autoset() function mixes printf() output and PMIC adjustment
code. It provides a boolean to control the output. It is better to avoid
missing logic and output, and this permits a smaller SPL code size. So
split the output into a separate function.

Also rename the function to have a by_name() suffix, since we would like
to be able to pass a device when we know it, and thus avoid the name
search.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-07-21 17:39:26 -06:00
Simon Glass
7837ceab1e dm: power: Add regulator flags to centralise auto-set logic
Decide when the regulator is set up whether we want to auto-set the voltage
or current. This avoids the complex logic spilling into the processing code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-07-21 17:39:26 -06:00
Simon Glass
6dc714102b mmc: Add structure comments for dwmmc
It took a little while to figure this out, so this patch adds documentation
to help the next person who needs to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:25 -06:00
Simon Glass
e7ecf7cb5a dm: mmc: Add an MMC uclass
Add basic support for MMC, providing a uclass which can set up an MMC
device. This allows MMC drivers to move to using driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:25 -06:00
Simon Glass
5917112c9e dm: Add support for LEDs
Add a simple uclass for LEDs, so that these can be controlled by the device
tree and activated when needed. LEDs are referred to by their label.

This implementation requires a driver for each type of LED (e.g GPIO, I2C).

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:24 -06:00
Simon Glass
5725128507 dm: Add support for generic system controllers (syscon)
Many SoCs have a number of system controllers which are dealt with as a
group by a single driver. It is a pain to have to add lots of compatible
strings and/or separate drivers for each. Instead we can identify the
controllers by a number and request the address of the one we want.

Add a simple implementation of this which can be used by SoC driver code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:24 -06:00
Simon Glass
6f98b7504f dm: Add support for register maps (regmap)
Add a simple implementaton of register maps, supporting only direct I/O
for now. This can be enhanced later to support buses which have registers,
such as I2C, SPI and PCI.

It allows drivers which can operate with multiple buses to avoid dealing
with the particulars of register access on that bus.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:23 -06:00
Simon Glass
efa677fb48 dm: gpio: Add dm_gpio_request() to manually request a GPIO
This function can be used for testing to manually request a GPIO for use,
without resorting to the legacy GPIO API.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:23 -06:00
Simon Glass
32ec159844 dm: gpio: Add dm_gpio_lookup_name() to look up a GPIO name
Provide a driver-model function to look up a GPIO name. Make the standard
function use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:23 -06:00
Simon Glass
132f9bfc9e dm: core: Correct device_get_child_by_of_offset() parameter
This parameter is named 'seq' but should be named 'of_offset'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:23 -06:00
Simon Glass
2693047acd dm: core: Add a function to find any device from device tree
In some rare cases it is useful to be able to locate a device given a device
tree node offset. An example is when you have an alias that points to a node
and you want to find the associated device. The device may be SPI, MMC or
something else, but you don't need to know the uclass to find it.

Add a function to do a global search for a device, given its device tree
offset.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:22 -06:00
Simon Glass
304fbef156 dm: Move the tree/uclass dump code into its own file
In SPL it is sometimes useful to be able to obtain a dump of the current
driver model state. Since commands are not available, provide a way to
directly call the functions to output this information.

Adjust the existing commands to use these functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:22 -06:00
Simon Glass
d0d7361462 debug_uart: Remove use of asmlinkage
This does not actually help any current arch. For x86 it makes it harder
to call (requires stack) and for ARM it has no effect. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:21 -06:00
Simon Glass
c9689ca318 Add a way of checking the position of a structure member
U-Boot uses structures for hardware access so it is important that these
structures are correct. Add a way of asserting that a structure member is
at a particular offset. This can be created using the datasheet for the
hardware.

This implementation uses Static_assert() since BUILD_BUG_ON() only works
within functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:21 -06:00
Simon Glass
c3c4c00563 fdt: Add fdt_first/next_region() functions
These have been sent upstream but not accepted to libfdt. For now, bring
these into U-Boot to enable fdtgrep to operate. We will use fdtgrep to
cut device tree files down for SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:20 -06:00
Simon Glass
8f6e2e1ee1 fdt: Add a function to remove unused strings from a device tree
Property names are stored in a string table. When a node property is
removed, the string table is not updated since other nodes may have a
property with the same name.

Thus it is possible for the string table to build up a number of unused
strings. Add a function to remove these. This works by building a new device
tree from the old one, adding strings one by one as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:20 -06:00
Simon Glass
5b9d44df23 mkimage: Display a better list of available image types
Offer to display the available image types in help. Also, rather than
hacking the genimg_get_type_id() function to display a list of types,
do this in the tool. Also, sort the list.

The list of image types is quite long, and hard to discover. Print it out
when we show help information.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:20 -06:00
Tom Rini
b217c89e85 Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2015-07-20 17:12:52 -04:00
Haikun Wang
0c42a8de85 armv8/ls2085ardb: Enable DSPI flash support for LS2085ARDB
Enable DSPI flash related configurations for LS2085ARDB.

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:39 -07:00
Haikun Wang
b7774b0522 armv8/ls2085aqds: Enable DSPI flash support for LS2085AQDS
Enable DSPI flash related configurations.

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:39 -07:00
Wang Dongsheng
340848b185 arm/ls102xa: Add PSCI support for ls102xa
Base on PSCI services, implement CPU_ON/CPU_OFF for ls102xa platform.

Tested on LS1021AQDS, LS1021ATWR.
Test CPU hotplug times: 60K
Test kernel boot times: 1.2K

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:38 -07:00
Prabhakar Kushwaha
97421bd2c0 board/ls2085a: Increase kernel_size value in env variable
Linux itb image size has been increased from 30MB.

So updating kernel_size to 40MB in env variable.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:38 -07:00
Prabhakar Kushwaha
9527931507 board/ls2085rdb: Export functions for standalone AQ FW load apps
Export functions required by Aquntia PHY firmware load application.
functions are memset, strcpy, mdelay, mdio_get_current_dev,
phy_find_by_mask, mdio_phydev_for_ethname and miiphy_set_current_dev

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:37 -07:00
Stuart Yoder
39da644ea8 armv8/fsl-lsch3: partition stream IDs
Stream IDs on ls2085a devices are not hardwired and are
programmed by sw.  There are a limited number of stream IDs
available, and the partitioning of them is scenario dependent.
This header defines the partitioning between legacy, PCI,
and DPAA2 devices.

Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:37 -07:00
Prabhakar Kushwaha
1f1c25c745 drivers: fsl-mc: Update flibs to mc-0.6.0.1
Update flibs changes to mc-0.6.0.1 for dpmang, dprc, dpni and dpio objects
Also rename qbman_portal_ce/ci_paddr to qbman_portal_ce/ci_offset in
dpio_attr. These are now offsets from the SoC QBMan portals base.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:36 -07:00
J. German Rivera
c1000c12d3 drivers/fsl-mc: Autoload AOIP image from NOR flash
Load AIOP image from NOR flash into DDR so that the MC firmware
the MC fw can start it at boot time

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:36 -07:00
Stuart Yoder
b0ba9d48a4 armv8/ls2085a: enable debug server
Signed-off-by: Stuart Yoder <stuart.yoder at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:36 -07:00
Prabhakar Kushwaha
5c05508971 armv8/fsl-lsch3: Support 256M mem split for MC & dbg-srvr
The agreed split of the top of memory is 256M for debug server and 256M
 for MC. This patch implements the split.

 In addition, the MC mem must be 512MB aligned, so the amount of memory
 to hide must be 512MB to achieve that alignment.

Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:36 -07:00
York Sun
fc7b3855e1 armv8/ls2085ardb: Fix SPD address error on early boards
Board rev C and earlier has duplicated SPD address on 2nd DDR
controller slots. It is fixed on rev D and later. SPD addresses
need to be updated accordingly.

Signed-off-by: York Sun <yorksun at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
2015-07-20 11:44:35 -07:00
York Sun
b92557cd3f driver/ddr/fsl: Add a hook to update SPD address
In case SPD address changes between board revisions, updating SPD
address can be called from board file.

Signed-off-by: York Sun <yorksun at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
2015-07-20 11:44:35 -07:00
Prabhakar Kushwaha
ff1b8e3f55 armv8/ls2085a: Avoid hard-coding for board name print
LS2085A supports 6 personalities i.e. LS2045AE, LS2045A, LS2080AE,
LS2080A, LS2085AE and LS2085A personlities.

Instead of hard-coding, board name should change as per selected
personality.

Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:35 -07:00
Bhupesh Sharma
34cc75469f armv8/ls2085a: Increase the supported kernel size
Increases the kernel size supported for LS2085A platforms:-
 - Update environment variables
 - Add ramdisk_size in bootargs env variable
 - Define  CONFIG_SYS_BOOTM_LEN to 64MB

Signed-off-by: Bhupesh Sharma <bhupesh.sharma at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:34 -07:00
Prabhakar Kushwaha
4012350dea armv8/ls2085rdb: Update PCA9547PW slave address
Primary Mux on I2C1 controller has slave address as 0x75.
So update its address.

Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:34 -07:00
Prabhakar Kushwaha
252b17e0ec armv8/ls2085a: Update LS2085a PCIe compatible
Compatible field "fsl,20851a-pcie" is not correct.
So update it to "fsl,ls2085a-pcie"

Signed-off-by: Minghuan Lian <Minghuan.Lian at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:33 -07:00
Priyanka Jain
6581440c1d armv8/ls2085a: Enable "date" command for QDS and RDB
Enable "date" command for QDS and RDB boards

Signed-off-by: Priyanka Jain <Priyanka.Jain at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:33 -07:00
Yangbo Lu
5a4d744c90 armv8/ls2085ardb: add hwconfig setting for eSDHC
Add hwconfig setting for eSDHC since it shares some pins with other
IP block.

Signed-off-by: Yangbo Lu <yangbo.lu at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:33 -07:00
Prabhakar Kushwaha
3484d95307 armv8/ls2085ardb: Add eth & phy firmware loading support
Add support for board eth initialization and support for loading phy
firmware. PHY firmware needs to be loaded from board_eth_init() because
all the MACs are not initialized by ldpaa_eth driver.

Signed-off-by: pankaj chauhan <pankaj.chauhan at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:33 -07:00
Masahiro Yamada
965fab1adf libfdt: fix description of fdt_get_string()
Looks like this comment was copied from that of
fdt_get_string_index().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Fixes: 5094eb408a ("fdt: Add functions to retrieve strings")
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-20 07:21:47 -06:00
Andre Przywara
5c1cf89f8c fdt: prevent clearing memory node if there are no banks
Avoid clearing the reg property in the memory DT node if no memory
banks have been specified for a board (CONFIG_NR_DRAM_BANKS == 0).
This allows boards to let U-Boot skip the DT memory tinkering in case
other firmware has already setup the node properly before.
This should be safe as all callers of fdt_fixup_memory_banks that use
a computed <banks> value put at least 1 in there.
Add some documentation comments to the header file.

Signed-off-by: Andre Przywara <osp@andrep.de>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-20 07:21:47 -06:00
Stefano Babic
f448c5d320 Merge branch 'master' of git://git.denx.de/u-boot 2015-07-17 11:22:56 +02:00
Tom Rini
605e15db2b Merge git://git.denx.de/u-boot-x86 2015-07-15 10:41:20 -04:00
Bin Meng
6c89663cb1 pci: Configure expansion ROM during auto config process
Currently PCI expansion ROM address is assigned by a call to
pciauto_setup_rom() outside of the pci auto config process.
This does not work when expansion ROM is on a device behind
PCI bridge where bridge's memory limit register was already
programmed to a value that does not cover the newly assigned
expansion ROM address. To fix this, we should configure the
ROM address during the auto config process.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-14 18:03:20 -06:00
Simon Glass
b9da5086b8 dm: x86: baytrail: Correct PCI region 3 when driver model is used
Commit afbbd413a fixed this for non-driver-model. Make sure that the driver
model code handles this also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-07-14 18:03:19 -06:00
Simon Glass
b71f9dca89 dm: x86: minnowmax: Move PCI to use driver model
Adjust minnowmax to use driver model for PCI. This requires adding a device
tree node to specify the ranges, removing the board-specific PCI code and
ensuring that the host bridge is configured.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-14 18:03:19 -06:00
Simon Glass
d5359f2e4d dm: spi: Enable environment for minnowmax
Enable a SPI environment and store it in a suitable place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-07-14 18:03:19 -06:00
Bin Meng
a452002259 x86: Configure VESA parameters before loading Linux kernel
Store VESA parameters to Linux setup header so that vesafb driver
in the kernel could work.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Jian Luo <jian.luo4@boschrexroth.de>
2015-07-14 18:03:19 -06:00